r600g: implement MSAA color resolve
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94b634eca0
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0f86915c53
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@ -1491,3 +1491,64 @@ void util_blitter_copy_buffer(struct blitter_context *blitter,
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blitter_unset_running_flag(ctx);
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pipe_so_target_reference(&so_target, NULL);
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}
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/* probably radeon specific */
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void util_blitter_resolve_color_custom(struct blitter_context *blitter,
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struct pipe_resource *dst,
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unsigned dst_level,
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unsigned dst_layer,
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struct pipe_resource *src,
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unsigned src_layer,
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void *custom_blend)
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{
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struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter;
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struct pipe_context *pipe = ctx->base.pipe;
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struct pipe_framebuffer_state fb_state;
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struct pipe_surface *srcsurf, *dstsurf, surf_tmpl;
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blitter_set_running_flag(ctx);
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blitter_check_saved_vertex_states(ctx);
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blitter_check_saved_fragment_states(ctx);
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/* bind states */
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pipe->bind_blend_state(pipe, custom_blend);
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pipe->bind_depth_stencil_alpha_state(pipe, ctx->dsa_keep_depth_stencil);
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pipe->bind_vertex_elements_state(pipe, ctx->velem_state);
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pipe->bind_fs_state(pipe, blitter_get_fs_col(ctx, 1, FALSE));
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memset(&surf_tmpl, 0, sizeof(surf_tmpl));
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surf_tmpl.format = dst->format;
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surf_tmpl.u.tex.level = dst_level;
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surf_tmpl.u.tex.first_layer = dst_layer;
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surf_tmpl.u.tex.last_layer = dst_layer;
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surf_tmpl.usage = PIPE_BIND_RENDER_TARGET;
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dstsurf = pipe->create_surface(pipe, dst, &surf_tmpl);
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surf_tmpl.u.tex.level = 0;
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surf_tmpl.u.tex.first_layer = src_layer;
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surf_tmpl.u.tex.last_layer = src_layer;
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srcsurf = pipe->create_surface(pipe, src, &surf_tmpl);
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/* set a framebuffer state */
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fb_state.width = src->width0;
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fb_state.height = src->height0;
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fb_state.nr_cbufs = 2;
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fb_state.cbufs[0] = srcsurf;
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fb_state.cbufs[1] = dstsurf;
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fb_state.zsbuf = NULL;
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pipe->set_framebuffer_state(pipe, &fb_state);
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blitter_set_common_draw_rect_state(ctx);
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blitter_set_dst_dimensions(ctx, src->width0, src->height0);
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blitter->draw_rectangle(blitter, 0, 0, src->width0, src->height0,
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0, 0, NULL);
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blitter_restore_fb_state(ctx);
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blitter_restore_vertex_states(ctx);
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blitter_restore_fragment_states(ctx);
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blitter_unset_running_flag(ctx);
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pipe_surface_reference(&srcsurf, NULL);
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pipe_surface_reference(&dstsurf, NULL);
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}
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@ -300,6 +300,14 @@ void util_blitter_custom_depth_stencil(struct blitter_context *blitter,
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unsigned sample_mask,
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void *dsa_stage, float depth);
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void util_blitter_resolve_color_custom(struct blitter_context *blitter,
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struct pipe_resource *dst,
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unsigned dst_level,
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unsigned dst_layer,
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struct pipe_resource *src,
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unsigned src_layer,
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void *custom_blend);
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/* The functions below should be used to save currently bound constant state
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* objects inside a driver. The objects are automatically restored at the end
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* of the util_blitter_{clear, copy_region, fill_region} functions and then
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@ -669,8 +669,8 @@ boolean evergreen_is_format_supported(struct pipe_screen *screen,
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return retval == usage;
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}
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static void *evergreen_create_blend_state(struct pipe_context *ctx,
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const struct pipe_blend_state *state)
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static void *evergreen_create_blend_state_mode(struct pipe_context *ctx,
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const struct pipe_blend_state *state, int mode)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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struct r600_pipe_blend *blend = CALLOC_STRUCT(r600_pipe_blend);
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@ -706,7 +706,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
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blend->cb_target_mask = target_mask;
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if (target_mask)
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color_control |= S_028808_MODE(V_028808_CB_NORMAL);
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color_control |= S_028808_MODE(mode);
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else
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color_control |= S_028808_MODE(V_028808_CB_DISABLE);
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@ -756,6 +756,13 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
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return rstate;
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}
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static void *evergreen_create_blend_state(struct pipe_context *ctx,
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const struct pipe_blend_state *state)
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{
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return evergreen_create_blend_state_mode(ctx, state, V_028808_CB_NORMAL);
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}
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static void *evergreen_create_dsa_state(struct pipe_context *ctx,
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const struct pipe_depth_stencil_alpha_state *state)
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{
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@ -2989,6 +2996,17 @@ void evergreen_fetch_shader(struct pipe_context *ctx,
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ve->fetch_shader, RADEON_USAGE_READ);
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}
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void *evergreen_create_resolve_blend(struct r600_context *rctx)
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{
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struct pipe_blend_state blend;
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struct r600_pipe_state *rstate;
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memset(&blend, 0, sizeof(blend));
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blend.rt[0].colormask = 0xf;
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rstate = evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_RESOLVE);
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return rstate;
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}
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void *evergreen_create_db_flush_dsa(struct r600_context *rctx)
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{
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struct pipe_depth_stencil_alpha_state dsa = {{0}};
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@ -42,6 +42,8 @@ enum r600_blitter_op /* bitmask */
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R600_DISABLE_RENDER_COND,
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R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
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R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND
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};
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static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
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@ -288,6 +290,82 @@ static void r600_copy_first_sample(struct pipe_context *ctx,
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pipe_sampler_view_reference(&src_view, NULL);
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}
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static boolean is_simple_resolve(const struct pipe_resolve_info *info)
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{
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unsigned dst_width = u_minify(info->dst.res->width0, info->dst.level);
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unsigned dst_height = u_minify(info->dst.res->height0, info->dst.level);
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return info->dst.res->format == info->src.res->format &&
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dst_width == info->src.res->width0 &&
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dst_height == info->src.res->height0 &&
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info->dst.x0 == 0 &&
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info->dst.y0 == 0 &&
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info->dst.x1 == dst_width &&
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info->dst.y1 == dst_height &&
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info->src.x0 == 0 &&
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info->src.y0 == 0 &&
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info->src.x1 == dst_width &&
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info->src.y1 == dst_height;
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}
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static void r600_color_resolve(struct pipe_context *ctx,
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const struct pipe_resolve_info *info)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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struct pipe_screen *screen = ctx->screen;
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struct pipe_resource *tmp, templ;
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struct pipe_box box;
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assert((info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA);
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if (is_simple_resolve(info)) {
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r600_blitter_begin(ctx, R600_COLOR_RESOLVE);
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util_blitter_resolve_color_custom(rctx->blitter,
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info->dst.res, info->dst.level, info->dst.layer,
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info->src.res, info->src.layer,
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rctx->custom_blend_resolve);
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r600_blitter_end(ctx);
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return;
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}
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/* resolve into a temporary texture, then blit */
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templ.target = PIPE_TEXTURE_2D;
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templ.format = info->src.res->format;
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templ.width0 = info->src.res->width0;
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templ.height0 = info->src.res->height0;
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templ.depth0 = 1;
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templ.array_size = 1;
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templ.last_level = 0;
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templ.nr_samples = 0;
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templ.usage = PIPE_USAGE_STATIC;
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templ.bind = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW;
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templ.flags = 0;
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tmp = screen->resource_create(screen, &templ);
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/* XXX use scissor, so that only the needed part of the resource is resolved */
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r600_blitter_begin(ctx, R600_COLOR_RESOLVE);
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util_blitter_resolve_color_custom(rctx->blitter,
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tmp, 0, 0,
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info->src.res, info->src.layer,
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rctx->custom_blend_resolve);
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r600_blitter_end(ctx);
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/* this is correct for upside-down blits too */
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u_box_2d(info->src.x0,
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info->src.y0,
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info->src.x1 - info->src.x0,
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info->src.y1 - info->src.y0, &box);
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r600_blitter_begin(ctx, R600_COPY_TEXTURE);
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util_blitter_copy_texture(rctx->blitter, info->dst.res, info->dst.level,
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~0, info->dst.x0, info->dst.y0, info->dst.layer,
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tmp, 0, 0, &box);
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r600_blitter_end(ctx);
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pipe_resource_reference(&tmp, NULL);
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}
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static void r600_resource_resolve(struct pipe_context *ctx,
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const struct pipe_resolve_info *info)
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{
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@ -313,6 +391,8 @@ static void r600_resource_resolve(struct pipe_context *ctx,
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if ((info->mask & PIPE_MASK_ZS) ||
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util_format_is_pure_integer(info->src.res->format)) {
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r600_copy_first_sample(ctx, info);
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} else {
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r600_color_resolve(ctx, info);
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}
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}
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@ -162,6 +162,9 @@ static void r600_destroy_context(struct pipe_context *context)
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if (rctx->custom_dsa_flush) {
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rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
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}
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if (rctx->custom_blend_resolve) {
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rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_resolve);
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}
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util_unreference_framebuffer_state(&rctx->framebuffer);
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r600_context_fini(rctx);
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@ -254,6 +257,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
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if (evergreen_context_init(rctx))
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goto fail;
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rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
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rctx->custom_blend_resolve = evergreen_create_resolve_blend(rctx);
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rctx->has_vertex_cache = !(rctx->family == CHIP_CEDAR ||
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rctx->family == CHIP_PALM ||
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rctx->family == CHIP_SUMO ||
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@ -326,6 +326,8 @@ struct r600_context {
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boolean has_vertex_cache;
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unsigned r6xx_num_clause_temp_gprs;
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void *custom_dsa_flush;
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void *custom_blend_resolve;
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struct r600_screen *screen;
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struct radeon_winsys *ws;
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struct r600_pipe_state *states[R600_PIPE_NSTATES];
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@ -465,6 +467,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
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void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
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void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
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void *evergreen_create_db_flush_dsa(struct r600_context *rctx);
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void *evergreen_create_resolve_blend(struct r600_context *rctx);
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void evergreen_polygon_offset_update(struct r600_context *rctx);
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boolean evergreen_is_format_supported(struct pipe_screen *screen,
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enum pipe_format format,
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