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ac/surface: use DCC compatible with image stores for < 4K resolutions 

We don't have to use the special DCC settings for lower resolutions.

This will cause corruption if X and an windowed app use different Mesa
versions. The fix is to restart the X server. I expect to get false bug
reports due to this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13013>
This commit is contained in:
Marek Olšák 2021-09-15 20:38:43 -04:00 committed by Marge Bot
parent 67bda8dc5f
commit 0f6251b31f
1 changed files with 12 additions and 3 deletions
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15
src/amd/common/ac_surface.c
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@ -1429,6 +1429,15 @@ ASSERTED static bool is_dcc_supported_by_L2(const struct radeon_info *info,
surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
}
static bool gfx10_DCN_requires_independent_64B_blocks(const struct radeon_info *info,
const struct ac_surf_config *config)
{
assert(info->chip_class >= GFX10);
/* For 4K, DCN requires INDEPENDENT_64B_BLOCKS = 1 and MAX_COMPRESSED_BLOCK_SIZE = 64B. */
return config->info.width > 2560 || config->info.height > 2560;
}
static bool is_dcc_supported_by_DCN(const struct radeon_info *info,
const struct ac_surf_config *config,
const struct radeon_surf *surf, bool rb_aligned,
@ -1460,8 +1469,7 @@ static bool is_dcc_supported_by_DCN(const struct radeon_info *info,
if (info->chip_class == GFX10 && surf->u.gfx9.color.dcc.independent_128B_blocks)
return false;
/* For 4K, DCN requires INDEPENDENT_64B_BLOCKS = 1. */
return ((config->info.width <= 2560 && config->info.height <= 2560) ||
return (!gfx10_DCN_requires_independent_64B_blocks(info, config) ||
(surf->u.gfx9.color.dcc.independent_64B_blocks &&
surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B));
default:
@ -2083,7 +2091,8 @@ static int gfx9_compute_surface(struct ac_addrlib *addrlib, const struct radeon_
surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
}
if (info->chip_class >= GFX10_3) {
if (info->chip_class >= GFX10_3 &&
gfx10_DCN_requires_independent_64B_blocks(info, config)) {
surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
surf->u.gfx9.color.dcc.independent_128B_blocks = 1;
surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;