2015-07-15 20:09:52 +01:00
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/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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2015-07-17 23:04:27 +01:00
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#include "anv_private.h"
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2015-07-15 20:09:52 +01:00
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/** \file anv_cmd_buffer.c
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*
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2015-07-30 22:59:02 +01:00
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* This file contains all of the stuff for emitting commands into a command
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* buffer. This includes implementations of most of the vkCmd*
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* entrypoints. This file is concerned entirely with state emission and
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* not with the command buffer data structure itself. As far as this file
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* is concerned, most of anv_cmd_buffer is magic.
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2015-07-15 20:09:52 +01:00
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*/
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2015-10-07 17:31:53 +01:00
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/* TODO: These are taken from GLES. We should check the Vulkan spec */
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const struct anv_dynamic_state default_dynamic_state = {
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.viewport = {
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.count = 0,
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},
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.scissor = {
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.count = 0,
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},
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.line_width = 1.0f,
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.depth_bias = {
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.bias = 0.0f,
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.clamp = 0.0f,
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.slope_scaled = 0.0f,
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},
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.blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
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.depth_bounds = {
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.min = 0.0f,
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.max = 1.0f,
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},
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.stencil_compare_mask = {
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.front = ~0u,
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.back = ~0u,
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},
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.stencil_write_mask = {
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.front = ~0u,
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.back = ~0u,
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},
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.stencil_reference = {
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.front = 0u,
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.back = 0u,
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},
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};
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void
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anv_dynamic_state_copy(struct anv_dynamic_state *dest,
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const struct anv_dynamic_state *src,
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uint32_t copy_mask)
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{
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if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
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dest->viewport.count = src->viewport.count;
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typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
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src->viewport.count);
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}
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if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
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dest->scissor.count = src->scissor.count;
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typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
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src->scissor.count);
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}
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if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
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dest->line_width = src->line_width;
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if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
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dest->depth_bias = src->depth_bias;
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if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
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typed_memcpy(dest->blend_constants, src->blend_constants, 4);
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if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
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dest->depth_bounds = src->depth_bounds;
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if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
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dest->stencil_compare_mask = src->stencil_compare_mask;
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if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
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dest->stencil_write_mask = src->stencil_write_mask;
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if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
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dest->stencil_reference = src->stencil_reference;
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}
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2015-07-30 22:59:02 +01:00
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static void
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anv_cmd_state_init(struct anv_cmd_state *state)
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2015-07-15 20:09:52 +01:00
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{
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2015-07-30 22:59:02 +01:00
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memset(&state->state_vf, 0, sizeof(state->state_vf));
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memset(&state->descriptors, 0, sizeof(state->descriptors));
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2015-08-26 23:01:38 +01:00
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memset(&state->push_constants, 0, sizeof(state->push_constants));
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2015-07-30 22:59:02 +01:00
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2015-10-07 01:21:44 +01:00
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state->dirty = ~0;
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2015-07-30 22:59:02 +01:00
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state->vb_dirty = 0;
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state->descriptors_dirty = 0;
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2015-08-26 23:01:38 +01:00
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state->push_constants_dirty = 0;
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2015-07-30 22:59:02 +01:00
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state->pipeline = NULL;
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2015-10-07 01:21:44 +01:00
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state->dynamic = default_dynamic_state;
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2015-08-21 06:59:19 +01:00
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state->gen7.index_buffer = NULL;
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2015-07-30 22:59:02 +01:00
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}
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2015-07-29 22:05:06 +01:00
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2015-09-11 18:25:21 +01:00
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static VkResult
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anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
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VkShaderStage stage, uint32_t size)
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{
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struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
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if (*ptr == NULL) {
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*ptr = anv_device_alloc(cmd_buffer->device, size, 8,
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VK_SYSTEM_ALLOC_TYPE_INTERNAL);
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if (*ptr == NULL)
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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(*ptr)->size = size;
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} else if ((*ptr)->size < size) {
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void *new_data = anv_device_alloc(cmd_buffer->device, size, 8,
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VK_SYSTEM_ALLOC_TYPE_INTERNAL);
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if (new_data == NULL)
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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memcpy(new_data, *ptr, (*ptr)->size);
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anv_device_free(cmd_buffer->device, *ptr);
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*ptr = new_data;
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(*ptr)->size = size;
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}
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return VK_SUCCESS;
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}
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#define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
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anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
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(offsetof(struct anv_push_constants, field) + \
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sizeof(cmd_buffer->state.push_constants[0]->field)))
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2015-07-30 22:59:02 +01:00
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VkResult anv_CreateCommandBuffer(
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VkDevice _device,
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const VkCmdBufferCreateInfo* pCreateInfo,
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VkCmdBuffer* pCmdBuffer)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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ANV_FROM_HANDLE(anv_cmd_pool, pool, pCreateInfo->cmdPool);
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struct anv_cmd_buffer *cmd_buffer;
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VkResult result;
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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cmd_buffer = anv_device_alloc(device, sizeof(*cmd_buffer), 8,
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VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
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if (cmd_buffer == NULL)
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2015-07-15 20:09:52 +01:00
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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2015-09-24 21:51:40 +01:00
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cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
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2015-07-30 22:59:02 +01:00
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cmd_buffer->device = device;
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
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if (result != VK_SUCCESS)
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goto fail;
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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anv_state_stream_init(&cmd_buffer->surface_state_stream,
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&device->surface_state_block_pool);
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anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
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&device->dynamic_state_block_pool);
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cmd_buffer->level = pCreateInfo->level;
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cmd_buffer->opt_flags = 0;
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anv_cmd_state_init(&cmd_buffer->state);
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2015-08-04 22:00:09 +01:00
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if (pool) {
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list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
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} else {
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/* Init the pool_link so we can safefly call list_del when we destroy
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* the command buffer
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*/
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list_inithead(&cmd_buffer->pool_link);
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}
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2015-07-30 22:59:02 +01:00
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*pCmdBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
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2015-07-29 22:05:06 +01:00
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2015-07-15 20:09:52 +01:00
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return VK_SUCCESS;
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2015-07-30 22:59:02 +01:00
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fail: anv_device_free(device, cmd_buffer);
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return result;
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2015-07-15 20:09:52 +01:00
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}
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2015-10-06 04:50:51 +01:00
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void anv_DestroyCommandBuffer(
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2015-07-30 22:59:02 +01:00
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VkDevice _device,
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VkCmdBuffer _cmd_buffer)
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2015-07-29 22:05:06 +01:00
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{
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2015-07-30 22:59:02 +01:00
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ANV_FROM_HANDLE(anv_device, device, _device);
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, _cmd_buffer);
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list_del(&cmd_buffer->pool_link);
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anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
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anv_state_stream_finish(&cmd_buffer->surface_state_stream);
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anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
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anv_device_free(device, cmd_buffer);
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}
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VkResult anv_ResetCommandBuffer(
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VkCmdBuffer cmdBuffer,
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VkCmdBufferResetFlags flags)
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{
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
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anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
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anv_cmd_state_init(&cmd_buffer->state);
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return VK_SUCCESS;
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2015-07-29 22:05:06 +01:00
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}
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2015-07-15 20:09:52 +01:00
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void
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2015-07-30 22:59:02 +01:00
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anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
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2015-07-15 20:09:52 +01:00
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{
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2015-08-14 22:50:11 +01:00
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switch (cmd_buffer->device->info.gen) {
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2015-08-21 06:59:19 +01:00
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case 7:
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return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
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2015-08-14 22:50:11 +01:00
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case 8:
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return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
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default:
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unreachable("unsupported gen\n");
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}
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2015-07-15 20:09:52 +01:00
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}
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2015-07-30 22:59:02 +01:00
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VkResult anv_BeginCommandBuffer(
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VkCmdBuffer cmdBuffer,
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const VkCmdBufferBeginInfo* pBeginInfo)
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2015-07-15 20:09:52 +01:00
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{
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2015-07-30 22:59:02 +01:00
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
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2015-07-15 20:09:52 +01:00
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2015-10-16 02:28:00 +01:00
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anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
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2015-07-30 22:59:02 +01:00
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cmd_buffer->opt_flags = pBeginInfo->flags;
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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if (cmd_buffer->level == VK_CMD_BUFFER_LEVEL_SECONDARY) {
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cmd_buffer->state.framebuffer =
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anv_framebuffer_from_handle(pBeginInfo->framebuffer);
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cmd_buffer->state.pass =
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anv_render_pass_from_handle(pBeginInfo->renderPass);
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2015-07-15 20:09:52 +01:00
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2015-10-06 04:30:53 +01:00
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struct anv_subpass *subpass =
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&cmd_buffer->state.pass->subpasses[pBeginInfo->subpass];
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anv_cmd_buffer_begin_subpass(cmd_buffer, subpass);
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2015-07-15 20:09:52 +01:00
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}
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2015-07-30 22:59:02 +01:00
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anv_cmd_buffer_emit_state_base_address(cmd_buffer);
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cmd_buffer->state.current_pipeline = UINT32_MAX;
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2015-07-15 20:09:52 +01:00
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return VK_SUCCESS;
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}
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2015-07-30 22:59:02 +01:00
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VkResult anv_EndCommandBuffer(
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VkCmdBuffer cmdBuffer)
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2015-07-15 20:09:52 +01:00
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{
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2015-07-30 22:59:02 +01:00
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
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struct anv_device *device = cmd_buffer->device;
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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anv_cmd_buffer_end_batch_buffer(cmd_buffer);
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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if (cmd_buffer->level == VK_CMD_BUFFER_LEVEL_PRIMARY) {
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/* The algorithm used to compute the validate list is not threadsafe as
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* it uses the bo->index field. We have to lock the device around it.
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* Fortunately, the chances for contention here are probably very low.
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*/
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pthread_mutex_lock(&device->mutex);
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anv_cmd_buffer_prepare_execbuf(cmd_buffer);
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pthread_mutex_unlock(&device->mutex);
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}
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2015-07-15 20:09:52 +01:00
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2015-07-30 22:59:02 +01:00
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return VK_SUCCESS;
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2015-07-15 20:09:52 +01:00
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}
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2015-07-30 22:59:02 +01:00
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void anv_CmdBindPipeline(
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VkCmdBuffer cmdBuffer,
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VkPipelineBindPoint pipelineBindPoint,
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VkPipeline _pipeline)
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2015-07-15 20:09:52 +01:00
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{
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2015-07-30 22:59:02 +01:00
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|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
switch (pipelineBindPoint) {
|
|
|
|
case VK_PIPELINE_BIND_POINT_COMPUTE:
|
|
|
|
cmd_buffer->state.compute_pipeline = pipeline;
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
|
2015-08-26 23:01:38 +01:00
|
|
|
cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
|
2015-07-30 22:59:02 +01:00
|
|
|
break;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
case VK_PIPELINE_BIND_POINT_GRAPHICS:
|
|
|
|
cmd_buffer->state.pipeline = pipeline;
|
|
|
|
cmd_buffer->state.vb_dirty |= pipeline->vb_used;
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
|
2015-08-26 23:01:38 +01:00
|
|
|
cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
|
2015-10-07 17:28:21 +01:00
|
|
|
|
|
|
|
/* Apply the dynamic state from the pipeline */
|
|
|
|
cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
|
|
|
|
anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
|
|
|
|
&pipeline->dynamic_state,
|
|
|
|
pipeline->dynamic_state_mask);
|
2015-07-30 22:59:02 +01:00
|
|
|
break;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
default:
|
|
|
|
assert(!"invalid bind point");
|
|
|
|
break;
|
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
void anv_CmdSetViewport(
|
2015-07-30 22:59:02 +01:00
|
|
|
VkCmdBuffer cmdBuffer,
|
2015-10-07 01:21:44 +01:00
|
|
|
uint32_t viewportCount,
|
|
|
|
const VkViewport* pViewports)
|
2015-07-30 22:59:02 +01:00
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
cmd_buffer->state.dynamic.viewport.count = viewportCount;
|
|
|
|
memcpy(cmd_buffer->state.dynamic.viewport.viewports,
|
|
|
|
pViewports, viewportCount * sizeof(*pViewports));
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
|
2015-10-07 01:21:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void anv_CmdSetScissor(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
uint32_t scissorCount,
|
|
|
|
const VkRect2D* pScissors)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
|
|
|
|
cmd_buffer->state.dynamic.scissor.count = scissorCount;
|
|
|
|
memcpy(cmd_buffer->state.dynamic.scissor.scissors,
|
|
|
|
pScissors, scissorCount * sizeof(*pScissors));
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
|
2015-10-07 01:21:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void anv_CmdSetLineWidth(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
float lineWidth)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
|
|
|
|
cmd_buffer->state.dynamic.line_width = lineWidth;
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
|
2015-10-07 01:21:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void anv_CmdSetDepthBias(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
float depthBias,
|
|
|
|
float depthBiasClamp,
|
|
|
|
float slopeScaledDepthBias)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
|
|
|
|
cmd_buffer->state.dynamic.depth_bias.bias = depthBias;
|
|
|
|
cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
|
|
|
|
cmd_buffer->state.dynamic.depth_bias.slope_scaled = slopeScaledDepthBias;
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
|
2015-10-07 01:21:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void anv_CmdSetBlendConstants(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
const float blendConst[4])
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
|
|
|
|
memcpy(cmd_buffer->state.dynamic.blend_constants,
|
|
|
|
blendConst, sizeof(float) * 4);
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
|
2015-10-07 01:21:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void anv_CmdSetDepthBounds(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
float minDepthBounds,
|
|
|
|
float maxDepthBounds)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
|
|
|
|
cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
|
|
|
|
cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
void anv_CmdSetStencilCompareMask(
|
2015-07-30 22:59:02 +01:00
|
|
|
VkCmdBuffer cmdBuffer,
|
2015-10-07 01:21:44 +01:00
|
|
|
VkStencilFaceFlags faceMask,
|
|
|
|
uint32_t stencilCompareMask)
|
2015-07-15 20:09:52 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
|
|
|
|
cmd_buffer->state.dynamic.stencil_compare_mask.front = stencilCompareMask;
|
|
|
|
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
|
|
|
|
cmd_buffer->state.dynamic.stencil_compare_mask.back = stencilCompareMask;
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
void anv_CmdSetStencilWriteMask(
|
2015-07-30 22:59:02 +01:00
|
|
|
VkCmdBuffer cmdBuffer,
|
2015-10-07 01:21:44 +01:00
|
|
|
VkStencilFaceFlags faceMask,
|
|
|
|
uint32_t stencilWriteMask)
|
2015-07-30 22:59:02 +01:00
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
|
|
|
|
cmd_buffer->state.dynamic.stencil_write_mask.front = stencilWriteMask;
|
|
|
|
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
|
|
|
|
cmd_buffer->state.dynamic.stencil_write_mask.back = stencilWriteMask;
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
void anv_CmdSetStencilReference(
|
2015-07-30 22:59:02 +01:00
|
|
|
VkCmdBuffer cmdBuffer,
|
2015-10-07 01:21:44 +01:00
|
|
|
VkStencilFaceFlags faceMask,
|
|
|
|
uint32_t stencilReference)
|
2015-07-15 20:09:52 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
|
|
|
|
cmd_buffer->state.dynamic.stencil_reference.front = stencilReference;
|
|
|
|
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
|
|
|
|
cmd_buffer->state.dynamic.stencil_reference.back = stencilReference;
|
|
|
|
|
2015-10-17 04:03:46 +01:00
|
|
|
cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdBindDescriptorSets(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
VkPipelineBindPoint pipelineBindPoint,
|
|
|
|
VkPipelineLayout _layout,
|
|
|
|
uint32_t firstSet,
|
|
|
|
uint32_t setCount,
|
|
|
|
const VkDescriptorSet* pDescriptorSets,
|
|
|
|
uint32_t dynamicOffsetCount,
|
|
|
|
const uint32_t* pDynamicOffsets)
|
2015-07-15 20:09:52 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
|
|
|
|
struct anv_descriptor_set_layout *set_layout;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
assert(firstSet + setCount < MAX_SETS);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
uint32_t dynamic_slot = 0;
|
|
|
|
for (uint32_t i = 0; i < setCount; i++) {
|
|
|
|
ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
|
|
|
|
set_layout = layout->set[firstSet + i].layout;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-15 03:00:17 +01:00
|
|
|
if (cmd_buffer->state.descriptors[firstSet + i] != set) {
|
|
|
|
cmd_buffer->state.descriptors[firstSet + i] = set;
|
2015-09-11 23:56:19 +01:00
|
|
|
cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
|
|
|
|
}
|
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
if (set_layout->dynamic_offset_count > 0) {
|
2015-10-05 16:52:42 +01:00
|
|
|
VkShaderStage s;
|
2015-09-11 23:56:19 +01:00
|
|
|
for_each_bit(s, set_layout->shader_stages) {
|
|
|
|
anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, s,
|
|
|
|
dynamic_offsets);
|
|
|
|
uint32_t *offsets =
|
|
|
|
cmd_buffer->state.push_constants[s]->dynamic_offsets +
|
|
|
|
layout->set[firstSet + i].dynamic_offset_start;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
typed_memcpy(offsets, pDynamicOffsets + dynamic_slot,
|
|
|
|
set_layout->dynamic_offset_count);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-09-11 23:56:19 +01:00
|
|
|
}
|
|
|
|
cmd_buffer->state.push_constants_dirty |= set_layout->shader_stages;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
dynamic_slot += set_layout->dynamic_offset_count;
|
2015-09-11 23:56:19 +01:00
|
|
|
}
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdBindVertexBuffers(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
uint32_t startBinding,
|
|
|
|
uint32_t bindingCount,
|
|
|
|
const VkBuffer* pBuffers,
|
|
|
|
const VkDeviceSize* pOffsets)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
|
|
|
struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
|
2015-07-29 19:57:44 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
/* We have to defer setting up vertex buffer since we need the buffer
|
|
|
|
* stride from the pipeline. */
|
2015-07-29 19:57:44 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
assert(startBinding + bindingCount < MAX_VBS);
|
|
|
|
for (uint32_t i = 0; i < bindingCount; i++) {
|
|
|
|
vb[startBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
|
|
|
|
vb[startBinding + i].offset = pOffsets[i];
|
|
|
|
cmd_buffer->state.vb_dirty |= 1 << (startBinding + i);
|
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-08-19 22:56:12 +01:00
|
|
|
static void
|
|
|
|
add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
struct anv_state state, struct anv_bo *bo, uint32_t offset)
|
|
|
|
{
|
2015-08-21 06:59:19 +01:00
|
|
|
/* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and
|
|
|
|
* 9 for gen8+. We only write the first dword for gen8+ here and rely on
|
|
|
|
* the initial state to set the high bits to 0. */
|
|
|
|
|
|
|
|
const uint32_t dword = cmd_buffer->device->info.gen < 8 ? 1 : 8;
|
2015-08-19 22:56:12 +01:00
|
|
|
|
2015-09-28 20:40:17 +01:00
|
|
|
anv_reloc_list_add(&cmd_buffer->surface_relocs, cmd_buffer->device,
|
|
|
|
state.offset + dword * 4, bo, offset);
|
2015-08-19 22:56:12 +01:00
|
|
|
}
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
VkResult
|
|
|
|
anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
|
2015-10-05 16:52:42 +01:00
|
|
|
VkShaderStage stage, struct anv_state *bt_state)
|
2015-07-29 22:05:06 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
|
|
|
|
struct anv_subpass *subpass = cmd_buffer->state.subpass;
|
|
|
|
struct anv_pipeline_layout *layout;
|
2015-11-03 21:42:28 +00:00
|
|
|
uint32_t color_count, bias, state_offset;
|
2015-07-30 22:59:02 +01:00
|
|
|
|
|
|
|
if (stage == VK_SHADER_STAGE_COMPUTE)
|
|
|
|
layout = cmd_buffer->state.compute_pipeline->layout;
|
|
|
|
else
|
|
|
|
layout = cmd_buffer->state.pipeline->layout;
|
|
|
|
|
|
|
|
if (stage == VK_SHADER_STAGE_FRAGMENT) {
|
|
|
|
bias = MAX_RTS;
|
2015-11-03 21:42:28 +00:00
|
|
|
color_count = subpass->color_count;
|
2015-07-30 22:59:02 +01:00
|
|
|
} else {
|
|
|
|
bias = 0;
|
2015-11-03 21:42:28 +00:00
|
|
|
color_count = 0;
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
2015-07-29 22:05:06 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
/* This is a little awkward: layout can be NULL but we still have to
|
|
|
|
* allocate and set a binding table for the PS stage for render
|
|
|
|
* targets. */
|
|
|
|
uint32_t surface_count = layout ? layout->stage[stage].surface_count : 0;
|
2015-07-29 22:05:06 +01:00
|
|
|
|
2015-11-03 21:42:28 +00:00
|
|
|
if (color_count + surface_count == 0)
|
2015-07-30 22:59:02 +01:00
|
|
|
return VK_SUCCESS;
|
2015-07-29 22:05:06 +01:00
|
|
|
|
2015-09-22 01:05:51 +01:00
|
|
|
*bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer,
|
2015-09-28 20:40:17 +01:00
|
|
|
bias + surface_count,
|
|
|
|
&state_offset);
|
2015-07-30 22:59:02 +01:00
|
|
|
uint32_t *bt_map = bt_state->map;
|
2015-07-29 22:05:06 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
if (bt_state->map == NULL)
|
|
|
|
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
|
2015-07-29 22:05:06 +01:00
|
|
|
|
2015-11-03 21:42:28 +00:00
|
|
|
for (uint32_t a = 0; a < color_count; a++) {
|
2015-10-06 19:42:43 +01:00
|
|
|
const struct anv_image_view *iview =
|
2015-07-30 22:59:02 +01:00
|
|
|
fb->attachments[subpass->color_attachments[a]];
|
2015-07-29 22:05:06 +01:00
|
|
|
|
2015-10-07 03:11:58 +01:00
|
|
|
bt_map[a] = iview->color_rt_surface_state.offset + state_offset;
|
|
|
|
add_surface_state_reloc(cmd_buffer, iview->color_rt_surface_state,
|
2015-10-06 00:24:53 +01:00
|
|
|
iview->bo, iview->offset);
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
if (layout == NULL)
|
|
|
|
return VK_SUCCESS;
|
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
for (uint32_t s = 0; s < layout->stage[stage].surface_count; s++) {
|
|
|
|
struct anv_pipeline_binding *binding =
|
|
|
|
&layout->stage[stage].surface_to_descriptor[s];
|
|
|
|
struct anv_descriptor_set *set =
|
2015-10-15 03:00:17 +01:00
|
|
|
cmd_buffer->state.descriptors[binding->set];
|
2015-10-14 23:18:49 +01:00
|
|
|
struct anv_descriptor *desc = &set->descriptors[binding->offset];
|
|
|
|
|
2015-11-05 03:48:59 +00:00
|
|
|
struct anv_state surface_state;
|
2015-10-14 23:18:49 +01:00
|
|
|
struct anv_bo *bo;
|
|
|
|
uint32_t bo_offset;
|
|
|
|
|
|
|
|
switch (desc->type) {
|
|
|
|
case ANV_DESCRIPTOR_TYPE_EMPTY:
|
|
|
|
case ANV_DESCRIPTOR_TYPE_SAMPLER:
|
2015-10-15 23:17:27 +01:00
|
|
|
/* Nothing for us to do here */
|
2015-10-14 23:18:49 +01:00
|
|
|
continue;
|
2015-10-15 21:45:53 +01:00
|
|
|
case ANV_DESCRIPTOR_TYPE_BUFFER_AND_OFFSET: {
|
2015-11-05 03:51:46 +00:00
|
|
|
bo = desc->buffer->bo;
|
|
|
|
bo_offset = desc->buffer->offset + desc->offset;
|
|
|
|
|
2015-11-05 03:48:59 +00:00
|
|
|
surface_state =
|
2015-10-15 21:45:53 +01:00
|
|
|
anv_cmd_buffer_alloc_surface_state(cmd_buffer);
|
2015-11-05 03:48:59 +00:00
|
|
|
anv_fill_buffer_surface_state(cmd_buffer->device, surface_state.map,
|
2015-10-15 21:45:53 +01:00
|
|
|
anv_format_for_vk_format(VK_FORMAT_R32G32B32A32_SFLOAT),
|
2015-11-05 03:51:46 +00:00
|
|
|
bo_offset, desc->range);
|
2015-10-15 21:45:53 +01:00
|
|
|
break;
|
|
|
|
}
|
2015-10-14 23:18:49 +01:00
|
|
|
case ANV_DESCRIPTOR_TYPE_IMAGE_VIEW:
|
2015-10-15 23:17:27 +01:00
|
|
|
case ANV_DESCRIPTOR_TYPE_IMAGE_VIEW_AND_SAMPLER:
|
2015-11-05 03:48:59 +00:00
|
|
|
surface_state = desc->image_view->nonrt_surface_state;
|
2015-10-14 23:18:49 +01:00
|
|
|
bo = desc->image_view->bo;
|
|
|
|
bo_offset = desc->image_view->offset;
|
|
|
|
break;
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
2015-10-14 23:18:49 +01:00
|
|
|
|
2015-11-05 03:48:59 +00:00
|
|
|
bt_map[bias + s] = surface_state.offset + state_offset;
|
|
|
|
add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset);
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
VkResult
|
|
|
|
anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
|
2015-10-05 16:52:42 +01:00
|
|
|
VkShaderStage stage, struct anv_state *state)
|
2015-07-30 19:36:48 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
struct anv_pipeline_layout *layout;
|
|
|
|
uint32_t sampler_count;
|
|
|
|
|
|
|
|
if (stage == VK_SHADER_STAGE_COMPUTE)
|
|
|
|
layout = cmd_buffer->state.compute_pipeline->layout;
|
|
|
|
else
|
|
|
|
layout = cmd_buffer->state.pipeline->layout;
|
|
|
|
|
|
|
|
sampler_count = layout ? layout->stage[stage].sampler_count : 0;
|
|
|
|
if (sampler_count == 0)
|
|
|
|
return VK_SUCCESS;
|
|
|
|
|
|
|
|
uint32_t size = sampler_count * 16;
|
|
|
|
*state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 32);
|
|
|
|
|
|
|
|
if (state->map == NULL)
|
|
|
|
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
|
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
for (uint32_t s = 0; s < layout->stage[stage].sampler_count; s++) {
|
|
|
|
struct anv_pipeline_binding *binding =
|
|
|
|
&layout->stage[stage].sampler_to_descriptor[s];
|
|
|
|
struct anv_descriptor_set *set =
|
2015-10-15 03:00:17 +01:00
|
|
|
cmd_buffer->state.descriptors[binding->set];
|
2015-10-14 23:18:49 +01:00
|
|
|
struct anv_descriptor *desc = &set->descriptors[binding->offset];
|
2015-07-30 22:59:02 +01:00
|
|
|
|
2015-10-15 21:45:53 +01:00
|
|
|
if (desc->type != ANV_DESCRIPTOR_TYPE_SAMPLER &&
|
|
|
|
desc->type != ANV_DESCRIPTOR_TYPE_IMAGE_VIEW_AND_SAMPLER)
|
2015-10-14 23:18:49 +01:00
|
|
|
continue;
|
2015-07-30 22:59:02 +01:00
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
struct anv_sampler *sampler = desc->sampler;
|
2015-07-30 22:59:02 +01:00
|
|
|
|
2015-10-15 23:17:27 +01:00
|
|
|
/* FIXME: We shouldn't have to do this */
|
|
|
|
if (sampler == NULL)
|
|
|
|
continue;
|
|
|
|
|
2015-10-14 23:18:49 +01:00
|
|
|
memcpy(state->map + (s * 16),
|
|
|
|
sampler->state, sizeof(sampler->state));
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
2015-07-30 19:36:48 +01:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
static VkResult
|
2015-10-05 16:52:42 +01:00
|
|
|
flush_descriptor_set(struct anv_cmd_buffer *cmd_buffer, VkShaderStage stage)
|
2015-07-15 20:09:52 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
struct anv_state surfaces = { 0, }, samplers = { 0, };
|
|
|
|
VkResult result;
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
result = anv_cmd_buffer_emit_samplers(cmd_buffer, stage, &samplers);
|
2015-07-30 22:59:02 +01:00
|
|
|
if (result != VK_SUCCESS)
|
|
|
|
return result;
|
2015-08-18 00:17:07 +01:00
|
|
|
result = anv_cmd_buffer_emit_binding_table(cmd_buffer, stage, &surfaces);
|
2015-07-30 22:59:02 +01:00
|
|
|
if (result != VK_SUCCESS)
|
|
|
|
return result;
|
|
|
|
|
|
|
|
static const uint32_t sampler_state_opcodes[] = {
|
|
|
|
[VK_SHADER_STAGE_VERTEX] = 43,
|
|
|
|
[VK_SHADER_STAGE_TESS_CONTROL] = 44, /* HS */
|
|
|
|
[VK_SHADER_STAGE_TESS_EVALUATION] = 45, /* DS */
|
|
|
|
[VK_SHADER_STAGE_GEOMETRY] = 46,
|
|
|
|
[VK_SHADER_STAGE_FRAGMENT] = 47,
|
|
|
|
[VK_SHADER_STAGE_COMPUTE] = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const uint32_t binding_table_opcodes[] = {
|
|
|
|
[VK_SHADER_STAGE_VERTEX] = 38,
|
|
|
|
[VK_SHADER_STAGE_TESS_CONTROL] = 39,
|
|
|
|
[VK_SHADER_STAGE_TESS_EVALUATION] = 40,
|
|
|
|
[VK_SHADER_STAGE_GEOMETRY] = 41,
|
|
|
|
[VK_SHADER_STAGE_FRAGMENT] = 42,
|
|
|
|
[VK_SHADER_STAGE_COMPUTE] = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (samplers.alloc_size > 0) {
|
|
|
|
anv_batch_emit(&cmd_buffer->batch,
|
2015-08-18 19:04:19 +01:00
|
|
|
GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS,
|
2015-07-30 22:59:02 +01:00
|
|
|
._3DCommandSubOpcode = sampler_state_opcodes[stage],
|
|
|
|
.PointertoVSSamplerState = samplers.offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (surfaces.alloc_size > 0) {
|
|
|
|
anv_batch_emit(&cmd_buffer->batch,
|
2015-08-18 19:04:19 +01:00
|
|
|
GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS,
|
2015-07-30 22:59:02 +01:00
|
|
|
._3DCommandSubOpcode = binding_table_opcodes[stage],
|
|
|
|
.PointertoVSBindingTable = surfaces.offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
void
|
|
|
|
anv_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
|
2015-07-15 20:09:52 +01:00
|
|
|
{
|
2015-10-05 16:52:42 +01:00
|
|
|
VkShaderStage s;
|
|
|
|
VkShaderStageFlags dirty = cmd_buffer->state.descriptors_dirty &
|
|
|
|
cmd_buffer->state.pipeline->active_stages;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 19:32:27 +01:00
|
|
|
VkResult result = VK_SUCCESS;
|
2015-07-30 22:59:02 +01:00
|
|
|
for_each_bit(s, dirty) {
|
|
|
|
result = flush_descriptor_set(cmd_buffer, s);
|
2015-07-30 19:32:27 +01:00
|
|
|
if (result != VK_SUCCESS)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (result != VK_SUCCESS) {
|
2015-07-30 22:59:02 +01:00
|
|
|
assert(result == VK_ERROR_OUT_OF_DEVICE_MEMORY);
|
2015-07-30 19:32:27 +01:00
|
|
|
|
2015-09-28 20:40:17 +01:00
|
|
|
result = anv_cmd_buffer_new_binding_table_block(cmd_buffer);
|
2015-07-30 22:59:02 +01:00
|
|
|
assert(result == VK_SUCCESS);
|
2015-07-30 19:32:27 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
/* Re-emit state base addresses so we get the new surface state base
|
|
|
|
* address before we start emitting binding tables etc.
|
|
|
|
*/
|
|
|
|
anv_cmd_buffer_emit_state_base_address(cmd_buffer);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
/* Re-emit all active binding tables */
|
|
|
|
for_each_bit(s, cmd_buffer->state.pipeline->active_stages) {
|
|
|
|
result = flush_descriptor_set(cmd_buffer, s);
|
2015-07-29 01:47:04 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
/* It had better succeed this time */
|
|
|
|
assert(result == VK_SUCCESS);
|
|
|
|
}
|
|
|
|
}
|
2015-07-29 01:47:04 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
cmd_buffer->state.descriptors_dirty &= ~cmd_buffer->state.pipeline->active_stages;
|
2015-07-29 01:47:04 +01:00
|
|
|
}
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
struct anv_state
|
2015-07-30 22:59:02 +01:00
|
|
|
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
uint32_t *a, uint32_t dwords, uint32_t alignment)
|
2015-07-29 19:57:44 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
struct anv_state state;
|
|
|
|
|
|
|
|
state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
|
|
|
|
dwords * 4, alignment);
|
|
|
|
memcpy(state.map, a, dwords * 4);
|
|
|
|
|
|
|
|
VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, dwords * 4));
|
|
|
|
|
|
|
|
return state;
|
2015-07-29 19:57:44 +01:00
|
|
|
}
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
struct anv_state
|
2015-07-30 22:59:02 +01:00
|
|
|
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
uint32_t *a, uint32_t *b,
|
|
|
|
uint32_t dwords, uint32_t alignment)
|
2015-07-30 19:34:58 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
struct anv_state state;
|
|
|
|
uint32_t *p;
|
2015-07-30 19:34:58 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
|
|
|
|
dwords * 4, alignment);
|
|
|
|
p = state.map;
|
|
|
|
for (uint32_t i = 0; i < dwords; i++)
|
|
|
|
p[i] = a[i] | b[i];
|
2015-07-30 19:34:58 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
|
2015-07-30 19:34:58 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
return state;
|
2015-07-30 19:34:58 +01:00
|
|
|
}
|
|
|
|
|
2015-08-18 00:17:07 +01:00
|
|
|
void
|
|
|
|
anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
struct anv_subpass *subpass)
|
2015-07-30 22:59:02 +01:00
|
|
|
{
|
2015-08-20 05:30:08 +01:00
|
|
|
switch (cmd_buffer->device->info.gen) {
|
2015-08-21 06:59:19 +01:00
|
|
|
case 7:
|
|
|
|
gen7_cmd_buffer_begin_subpass(cmd_buffer, subpass);
|
|
|
|
break;
|
2015-08-20 05:30:08 +01:00
|
|
|
case 8:
|
|
|
|
gen8_cmd_buffer_begin_subpass(cmd_buffer, subpass);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
unreachable("unsupported gen\n");
|
|
|
|
}
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-10-07 01:21:44 +01:00
|
|
|
static void
|
|
|
|
emit_viewport_state(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
uint32_t count, const VkViewport *viewports)
|
|
|
|
{
|
|
|
|
struct anv_state sf_clip_state =
|
|
|
|
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, count * 64, 64);
|
|
|
|
struct anv_state cc_state =
|
|
|
|
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, count * 8, 32);
|
|
|
|
|
|
|
|
for (uint32_t i = 0; i < count; i++) {
|
|
|
|
const VkViewport *vp = &viewports[i];
|
|
|
|
|
|
|
|
/* The gen7 state struct has just the matrix and guardband fields, the
|
|
|
|
* gen8 struct adds the min/max viewport fields. */
|
|
|
|
struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport = {
|
|
|
|
.ViewportMatrixElementm00 = vp->width / 2,
|
|
|
|
.ViewportMatrixElementm11 = vp->height / 2,
|
|
|
|
.ViewportMatrixElementm22 = (vp->maxDepth - vp->minDepth) / 2,
|
|
|
|
.ViewportMatrixElementm30 = vp->originX + vp->width / 2,
|
|
|
|
.ViewportMatrixElementm31 = vp->originY + vp->height / 2,
|
|
|
|
.ViewportMatrixElementm32 = (vp->maxDepth + vp->minDepth) / 2,
|
|
|
|
.XMinClipGuardband = -1.0f,
|
|
|
|
.XMaxClipGuardband = 1.0f,
|
|
|
|
.YMinClipGuardband = -1.0f,
|
|
|
|
.YMaxClipGuardband = 1.0f,
|
|
|
|
.XMinViewPort = vp->originX,
|
|
|
|
.XMaxViewPort = vp->originX + vp->width - 1,
|
|
|
|
.YMinViewPort = vp->originY,
|
|
|
|
.YMaxViewPort = vp->originY + vp->height - 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct GEN7_CC_VIEWPORT cc_viewport = {
|
|
|
|
.MinimumDepth = vp->minDepth,
|
|
|
|
.MaximumDepth = vp->maxDepth
|
|
|
|
};
|
|
|
|
|
|
|
|
GEN8_SF_CLIP_VIEWPORT_pack(NULL, sf_clip_state.map + i * 64,
|
|
|
|
&sf_clip_viewport);
|
|
|
|
GEN7_CC_VIEWPORT_pack(NULL, cc_state.map + i * 32, &cc_viewport);
|
|
|
|
}
|
|
|
|
|
|
|
|
anv_batch_emit(&cmd_buffer->batch,
|
|
|
|
GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
|
|
|
|
.CCViewportPointer = cc_state.offset);
|
|
|
|
anv_batch_emit(&cmd_buffer->batch,
|
|
|
|
GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
|
|
|
|
.SFClipViewportPointer = sf_clip_state.offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
anv_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer)
|
|
|
|
{
|
|
|
|
if (cmd_buffer->state.dynamic.viewport.count > 0) {
|
|
|
|
emit_viewport_state(cmd_buffer, cmd_buffer->state.dynamic.viewport.count,
|
|
|
|
cmd_buffer->state.dynamic.viewport.viewports);
|
|
|
|
} else {
|
|
|
|
/* If viewport count is 0, this is taken to mean "use the default" */
|
|
|
|
emit_viewport_state(cmd_buffer, 1,
|
|
|
|
&(VkViewport) {
|
|
|
|
.originX = 0.0f,
|
|
|
|
.originY = 0.0f,
|
|
|
|
.width = cmd_buffer->state.framebuffer->width,
|
|
|
|
.height = cmd_buffer->state.framebuffer->height,
|
|
|
|
.minDepth = 0.0f,
|
|
|
|
.maxDepth = 1.0f,
|
|
|
|
});
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int64_t
|
|
|
|
clamp_int64(int64_t x, int64_t min, int64_t max)
|
|
|
|
{
|
|
|
|
if (x < min)
|
|
|
|
return min;
|
|
|
|
else if (x < max)
|
|
|
|
return x;
|
|
|
|
else
|
|
|
|
return max;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
emit_scissor_state(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
uint32_t count, const VkRect2D *scissors)
|
|
|
|
{
|
|
|
|
struct anv_state scissor_state =
|
|
|
|
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, count * 32, 32);
|
|
|
|
|
|
|
|
for (uint32_t i = 0; i < count; i++) {
|
|
|
|
const VkRect2D *s = &scissors[i];
|
|
|
|
|
|
|
|
/* Since xmax and ymax are inclusive, we have to have xmax < xmin or
|
|
|
|
* ymax < ymin for empty clips. In case clip x, y, width height are all
|
|
|
|
* 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
|
|
|
|
* what we want. Just special case empty clips and produce a canonical
|
|
|
|
* empty clip. */
|
|
|
|
static const struct GEN7_SCISSOR_RECT empty_scissor = {
|
|
|
|
.ScissorRectangleYMin = 1,
|
|
|
|
.ScissorRectangleXMin = 1,
|
|
|
|
.ScissorRectangleYMax = 0,
|
|
|
|
.ScissorRectangleXMax = 0
|
|
|
|
};
|
|
|
|
|
|
|
|
const int max = 0xffff;
|
|
|
|
struct GEN7_SCISSOR_RECT scissor = {
|
|
|
|
/* Do this math using int64_t so overflow gets clamped correctly. */
|
|
|
|
.ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
|
|
|
|
.ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
|
|
|
|
.ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
|
|
|
|
.ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
|
|
|
|
};
|
|
|
|
|
|
|
|
if (s->extent.width <= 0 || s->extent.height <= 0) {
|
|
|
|
GEN7_SCISSOR_RECT_pack(NULL, scissor_state.map + i * 32,
|
|
|
|
&empty_scissor);
|
|
|
|
} else {
|
|
|
|
GEN7_SCISSOR_RECT_pack(NULL, scissor_state.map + i * 32, &scissor);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SCISSOR_STATE_POINTERS,
|
|
|
|
.ScissorRectPointer = scissor_state.offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
anv_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
|
|
|
|
{
|
|
|
|
if (cmd_buffer->state.dynamic.scissor.count > 0) {
|
|
|
|
emit_scissor_state(cmd_buffer, cmd_buffer->state.dynamic.scissor.count,
|
|
|
|
cmd_buffer->state.dynamic.scissor.scissors);
|
|
|
|
} else {
|
|
|
|
/* Emit a default scissor based on the currently bound framebuffer */
|
|
|
|
emit_scissor_state(cmd_buffer, 1,
|
|
|
|
&(VkRect2D) {
|
|
|
|
.offset = { .x = 0, .y = 0, },
|
|
|
|
.extent = {
|
|
|
|
.width = cmd_buffer->state.framebuffer->width,
|
|
|
|
.height = cmd_buffer->state.framebuffer->height,
|
|
|
|
},
|
|
|
|
});
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdSetEvent(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
VkEvent event,
|
|
|
|
VkPipelineStageFlags stageMask)
|
|
|
|
{
|
|
|
|
stub();
|
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdResetEvent(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
VkEvent event,
|
|
|
|
VkPipelineStageFlags stageMask)
|
|
|
|
{
|
|
|
|
stub();
|
2015-07-27 22:23:56 +01:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdWaitEvents(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
uint32_t eventCount,
|
|
|
|
const VkEvent* pEvents,
|
|
|
|
VkPipelineStageFlags srcStageMask,
|
|
|
|
VkPipelineStageFlags destStageMask,
|
|
|
|
uint32_t memBarrierCount,
|
|
|
|
const void* const* ppMemBarriers)
|
2015-07-27 22:23:56 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
stub();
|
|
|
|
}
|
2015-07-27 22:23:56 +01:00
|
|
|
|
2015-08-27 01:57:51 +01:00
|
|
|
struct anv_state
|
|
|
|
anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
|
|
|
|
VkShaderStage stage)
|
|
|
|
{
|
2015-09-11 18:25:21 +01:00
|
|
|
struct anv_push_constants *data =
|
|
|
|
cmd_buffer->state.push_constants[stage];
|
2015-08-27 01:57:51 +01:00
|
|
|
struct brw_stage_prog_data *prog_data =
|
|
|
|
cmd_buffer->state.pipeline->prog_data[stage];
|
|
|
|
|
|
|
|
/* If we don't actually have any push constants, bail. */
|
|
|
|
if (data == NULL || prog_data->nr_params == 0)
|
|
|
|
return (struct anv_state) { .offset = 0 };
|
|
|
|
|
|
|
|
struct anv_state state =
|
|
|
|
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
|
|
|
|
prog_data->nr_params * sizeof(float),
|
|
|
|
32 /* bottom 5 bits MBZ */);
|
|
|
|
|
|
|
|
/* Walk through the param array and fill the buffer with data */
|
|
|
|
uint32_t *u32_map = state.map;
|
|
|
|
for (unsigned i = 0; i < prog_data->nr_params; i++) {
|
|
|
|
uint32_t offset = (uintptr_t)prog_data->param[i];
|
|
|
|
u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
return state;
|
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdPushConstants(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
VkPipelineLayout layout,
|
|
|
|
VkShaderStageFlags stageFlags,
|
|
|
|
uint32_t start,
|
|
|
|
uint32_t length,
|
|
|
|
const void* values)
|
2015-07-30 19:36:48 +01:00
|
|
|
{
|
2015-08-26 23:01:38 +01:00
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
|
2015-10-05 16:52:42 +01:00
|
|
|
VkShaderStage stage;
|
2015-08-26 23:01:38 +01:00
|
|
|
|
|
|
|
for_each_bit(stage, stageFlags) {
|
2015-09-11 18:25:21 +01:00
|
|
|
anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
|
2015-08-26 23:01:38 +01:00
|
|
|
|
2015-09-11 18:25:21 +01:00
|
|
|
memcpy(cmd_buffer->state.push_constants[stage]->client_data + start,
|
2015-08-26 23:01:38 +01:00
|
|
|
values, length);
|
|
|
|
}
|
|
|
|
|
|
|
|
cmd_buffer->state.push_constants_dirty |= stageFlags;
|
2015-07-30 22:59:02 +01:00
|
|
|
}
|
2015-07-30 19:36:48 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
void anv_CmdExecuteCommands(
|
|
|
|
VkCmdBuffer cmdBuffer,
|
|
|
|
uint32_t cmdBuffersCount,
|
|
|
|
const VkCmdBuffer* pCmdBuffers)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, primary, cmdBuffer);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
assert(primary->level == VK_CMD_BUFFER_LEVEL_PRIMARY);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
anv_assert(primary->state.subpass == &primary->state.pass->subpasses[0]);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
for (uint32_t i = 0; i < cmdBuffersCount; i++) {
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_buffer, secondary, pCmdBuffers[i]);
|
2015-07-29 23:13:21 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
assert(secondary->level == VK_CMD_BUFFER_LEVEL_SECONDARY);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
anv_cmd_buffer_add_secondary(primary, secondary);
|
|
|
|
}
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
VkResult anv_CreateCommandPool(
|
|
|
|
VkDevice _device,
|
|
|
|
const VkCmdPoolCreateInfo* pCreateInfo,
|
|
|
|
VkCmdPool* pCmdPool)
|
2015-07-15 20:09:52 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
ANV_FROM_HANDLE(anv_device, device, _device);
|
|
|
|
struct anv_cmd_pool *pool;
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
pool = anv_device_alloc(device, sizeof(*pool), 8,
|
|
|
|
VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
|
|
|
|
if (pool == NULL)
|
|
|
|
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
list_inithead(&pool->cmd_buffers);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
*pCmdPool = anv_cmd_pool_to_handle(pool);
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
2015-07-15 20:09:52 +01:00
|
|
|
}
|
|
|
|
|
2015-10-06 04:50:51 +01:00
|
|
|
void anv_DestroyCommandPool(
|
2015-07-30 22:59:02 +01:00
|
|
|
VkDevice _device,
|
|
|
|
VkCmdPool cmdPool)
|
2015-07-27 22:52:16 +01:00
|
|
|
{
|
2015-07-30 22:59:02 +01:00
|
|
|
ANV_FROM_HANDLE(anv_device, device, _device);
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_pool, pool, cmdPool);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
anv_ResetCommandPool(_device, cmdPool, 0);
|
2015-07-15 20:09:52 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
anv_device_free(device, pool);
|
|
|
|
}
|
2015-07-29 23:13:21 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
VkResult anv_ResetCommandPool(
|
|
|
|
VkDevice device,
|
|
|
|
VkCmdPool cmdPool,
|
|
|
|
VkCmdPoolResetFlags flags)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_cmd_pool, pool, cmdPool);
|
2015-07-29 23:13:21 +01:00
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
|
|
|
|
&pool->cmd_buffers, pool_link) {
|
|
|
|
anv_DestroyCommandBuffer(device, anv_cmd_buffer_to_handle(cmd_buffer));
|
2015-07-29 23:13:21 +01:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:59:02 +01:00
|
|
|
return VK_SUCCESS;
|
2015-07-27 22:52:16 +01:00
|
|
|
}
|
2015-08-28 15:57:34 +01:00
|
|
|
|
|
|
|
/**
|
|
|
|
* Return NULL if the current subpass has no depthstencil attachment.
|
|
|
|
*/
|
2015-10-06 19:42:43 +01:00
|
|
|
const struct anv_image_view *
|
2015-08-28 15:57:34 +01:00
|
|
|
anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
|
|
|
|
{
|
|
|
|
const struct anv_subpass *subpass = cmd_buffer->state.subpass;
|
|
|
|
const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
|
|
|
|
|
|
|
|
if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED)
|
|
|
|
return NULL;
|
|
|
|
|
2015-10-06 19:42:43 +01:00
|
|
|
const struct anv_image_view *iview =
|
2015-08-28 15:57:34 +01:00
|
|
|
fb->attachments[subpass->depth_stencil_attachment];
|
|
|
|
|
2015-10-06 19:42:43 +01:00
|
|
|
assert(anv_format_is_depth_or_stencil(iview->format));
|
2015-08-28 15:57:34 +01:00
|
|
|
|
2015-10-06 19:42:43 +01:00
|
|
|
return iview;
|
2015-08-28 15:57:34 +01:00
|
|
|
}
|