2017-10-07 22:33:44 +01:00
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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2018-04-01 21:49:48 +01:00
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* All Rights Reserved.
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2017-10-07 22:33:44 +01:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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2018-04-01 23:42:33 +01:00
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#include "si_build_pm4.h"
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2017-10-07 22:33:44 +01:00
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/* For MSAA sample positions. */
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2020-03-27 18:32:38 +00:00
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#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
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((((unsigned)(s0x)&0xf) << 0) | (((unsigned)(s0y)&0xf) << 4) | (((unsigned)(s1x)&0xf) << 8) | \
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(((unsigned)(s1y)&0xf) << 12) | (((unsigned)(s2x)&0xf) << 16) | \
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(((unsigned)(s2y)&0xf) << 20) | (((unsigned)(s3x)&0xf) << 24) | (((unsigned)(s3y)&0xf) << 28))
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2017-10-07 22:33:44 +01:00
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2018-04-28 03:02:04 +01:00
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/* For obtaining location coordinates from registers */
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2020-03-27 18:32:38 +00:00
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#define SEXT4(x) ((int)((x) | ((x)&0x8 ? 0xfffffff0 : 0)))
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#define GET_SFIELD(reg, index) SEXT4(((reg) >> ((index)*4)) & 0xf)
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#define GET_SX(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2)
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#define GET_SY(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2 + 1)
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2018-04-28 03:02:04 +01:00
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2018-04-28 02:35:33 +01:00
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/* The following sample ordering is required by EQAA.
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*
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* Sample 0 is approx. in the top-left quadrant.
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* Sample 1 is approx. in the bottom-right quadrant.
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*
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* Sample 2 is approx. in the bottom-left quadrant.
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* Sample 3 is approx. in the top-right quadrant.
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* (sample I={2,3} adds more detail to the vicinity of sample I-2)
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*
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* Sample 4 is approx. in the same quadrant as sample 0. (top-left)
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* Sample 5 is approx. in the same quadrant as sample 1. (bottom-right)
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* Sample 6 is approx. in the same quadrant as sample 2. (bottom-left)
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* Sample 7 is approx. in the same quadrant as sample 3. (top-right)
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* (sample I={4,5,6,7} adds more detail to the vicinity of sample I-4)
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*
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* The next 8 samples add more detail to the vicinity of the previous samples.
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* (sample I (I >= 8) adds more detail to the vicinity of sample I-8)
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*
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* The ordering is specified such that:
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* If we take the first 2 samples, we should get good 2x MSAA.
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* If we add 2 more samples, we should get good 4x MSAA with the same sample locations.
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* If we add 4 more samples, we should get good 8x MSAA with the same sample locations.
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* If we add 8 more samples, we should get perfect 16x MSAA with the same sample locations.
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*
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* The ordering also allows finding samples in the same vicinity.
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*
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* Group N of 2 samples in the same vicinity in 16x MSAA: {N,N+8}
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* Group N of 2 samples in the same vicinity in 8x MSAA: {N,N+4}
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* Group N of 2 samples in the same vicinity in 4x MSAA: {N,N+2}
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*
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* Groups of 4 samples in the same vicinity in 16x MSAA:
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* Top left: {0,4,8,12}
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* Bottom right: {1,5,9,13}
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* Bottom left: {2,6,10,14}
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* Top right: {3,7,11,15}
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*
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* Groups of 4 samples in the same vicinity in 8x MSAA:
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* Left half: {0,2,4,6}
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* Right half: {1,3,5,7}
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*
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* Groups of 8 samples in the same vicinity in 16x MSAA:
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* Left half: {0,2,4,6,8,10,12,14}
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* Right half: {1,3,5,7,9,11,13,15}
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*/
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2021-08-11 18:31:19 +01:00
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/* Important note: We have to use the standard DX positions because shader-based culling
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* relies on them.
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2018-08-14 07:01:18 +01:00
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*/
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2018-04-28 03:02:04 +01:00
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/* 1x MSAA */
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static const uint32_t sample_locs_1x =
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2020-03-27 18:32:38 +00:00
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FILL_SREG(0, 0, 0, 0, 0, 0, 0, 0); /* S1, S2, S3 fields are not used by 1x */
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2018-04-28 02:35:33 +01:00
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static const uint64_t centroid_priority_1x = 0x0000000000000000ull;
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2018-04-28 03:02:04 +01:00
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2018-09-28 05:38:10 +01:00
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/* 2x MSAA (the positions are sorted for EQAA) */
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2018-04-27 02:53:33 +01:00
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static const uint32_t sample_locs_2x =
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2020-03-27 18:32:38 +00:00
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FILL_SREG(-4, -4, 4, 4, 0, 0, 0, 0); /* S2 & S3 fields are not used by 2x MSAA */
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2018-04-28 02:35:33 +01:00
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static const uint64_t centroid_priority_2x = 0x1010101010101010ull;
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2018-04-27 02:53:33 +01:00
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2018-09-28 05:38:10 +01:00
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/* 4x MSAA (the positions are sorted for EQAA) */
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2020-03-27 18:32:38 +00:00
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static const uint32_t sample_locs_4x = FILL_SREG(-2, -6, 2, 6, -6, 2, 6, -2);
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2018-09-28 05:38:10 +01:00
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static const uint64_t centroid_priority_4x = 0x3210321032103210ull;
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/* 8x MSAA (the positions are sorted for EQAA) */
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static const uint32_t sample_locs_8x[] = {
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2020-03-27 18:32:38 +00:00
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FILL_SREG(-3, -5, 5, 1, -1, 3, 7, -7),
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FILL_SREG(-7, -1, 3, 7, -5, 5, 1, -3),
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/* The following are unused by hardware, but we emit them to IBs
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* instead of multiple SET_CONTEXT_REG packets. */
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0,
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0,
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2018-09-28 05:38:10 +01:00
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};
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static const uint64_t centroid_priority_8x = 0x3546012735460127ull;
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/* 16x MSAA (the positions are sorted for EQAA) */
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static const uint32_t sample_locs_16x[] = {
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2020-03-27 18:32:38 +00:00
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FILL_SREG(-5, -2, 5, 3, -2, 6, 3, -5),
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FILL_SREG(-4, -6, 1, 1, -6, 4, 7, -4),
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FILL_SREG(-1, -3, 6, 7, -3, 2, 0, -7),
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FILL_SREG(-7, -8, 2, 5, -8, 0, 4, -1),
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2017-10-07 22:33:44 +01:00
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};
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2018-09-28 05:38:10 +01:00
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static const uint64_t centroid_priority_16x = 0xc97e64b231d0fa85ull;
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2017-10-07 22:33:44 +01:00
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static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
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2020-03-27 18:32:38 +00:00
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unsigned sample_index, float *out_value)
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2017-10-07 22:33:44 +01:00
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{
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2020-03-27 18:32:38 +00:00
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const uint32_t *sample_locs;
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switch (sample_count) {
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case 1:
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default:
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sample_locs = &sample_locs_1x;
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break;
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case 2:
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sample_locs = &sample_locs_2x;
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break;
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case 4:
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sample_locs = &sample_locs_4x;
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break;
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case 8:
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sample_locs = sample_locs_8x;
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break;
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case 16:
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sample_locs = sample_locs_16x;
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break;
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}
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out_value[0] = (GET_SX(sample_locs, sample_index) + 8) / 16.0f;
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out_value[1] = (GET_SY(sample_locs, sample_index) + 8) / 16.0f;
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2017-10-07 22:33:44 +01:00
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}
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2020-03-27 18:32:38 +00:00
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static void si_emit_max_4_sample_locs(struct radeon_cmdbuf *cs, uint64_t centroid_priority,
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uint32_t sample_locs)
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2018-04-28 02:35:33 +01:00
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{
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2021-01-09 20:14:22 +00:00
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radeon_begin(cs);
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2021-09-23 12:17:58 +01:00
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radeon_set_context_reg_seq(R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2);
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2021-09-23 12:17:58 +01:00
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radeon_emit(centroid_priority);
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radeon_emit(centroid_priority >> 32);
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2021-09-23 12:17:58 +01:00
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radeon_set_context_reg(R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs);
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radeon_set_context_reg(R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs);
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radeon_set_context_reg(R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs);
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radeon_set_context_reg(R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs);
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2021-01-09 20:14:22 +00:00
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radeon_end();
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2018-04-28 02:35:33 +01:00
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}
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2020-03-27 18:32:38 +00:00
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static void si_emit_max_16_sample_locs(struct radeon_cmdbuf *cs, uint64_t centroid_priority,
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const uint32_t *sample_locs, unsigned num_samples)
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2018-04-28 02:35:33 +01:00
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{
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2021-01-09 20:14:22 +00:00
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radeon_begin(cs);
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2021-09-23 12:17:58 +01:00
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radeon_set_context_reg_seq(R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2);
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2021-09-23 12:17:58 +01:00
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radeon_emit(centroid_priority);
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radeon_emit(centroid_priority >> 32);
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2021-09-23 12:17:58 +01:00
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radeon_set_context_reg_seq(R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0,
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2020-03-27 18:32:38 +00:00
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num_samples == 8 ? 14 : 16);
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2021-09-23 12:17:58 +01:00
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radeon_emit_array(sample_locs, 4);
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radeon_emit_array(sample_locs, 4);
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radeon_emit_array(sample_locs, 4);
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radeon_emit_array(sample_locs, num_samples == 8 ? 2 : 4);
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2021-01-09 20:14:22 +00:00
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radeon_end();
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2018-04-28 02:35:33 +01:00
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}
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2018-06-19 02:07:10 +01:00
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void si_emit_sample_locations(struct radeon_cmdbuf *cs, int nr_samples)
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2017-10-07 22:33:44 +01:00
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{
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2020-03-27 18:32:38 +00:00
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switch (nr_samples) {
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default:
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case 1:
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si_emit_max_4_sample_locs(cs, centroid_priority_1x, sample_locs_1x);
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break;
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case 2:
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si_emit_max_4_sample_locs(cs, centroid_priority_2x, sample_locs_2x);
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break;
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case 4:
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si_emit_max_4_sample_locs(cs, centroid_priority_4x, sample_locs_4x);
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break;
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case 8:
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si_emit_max_16_sample_locs(cs, centroid_priority_8x, sample_locs_8x, 8);
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break;
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case 16:
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si_emit_max_16_sample_locs(cs, centroid_priority_16x, sample_locs_16x, 16);
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break;
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}
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2017-10-07 22:33:44 +01:00
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}
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void si_init_msaa_functions(struct si_context *sctx)
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{
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2020-03-27 18:32:38 +00:00
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int i;
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2017-10-07 22:33:44 +01:00
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2020-03-27 18:32:38 +00:00
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sctx->b.get_sample_position = si_get_sample_position;
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2017-10-07 22:33:44 +01:00
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2020-03-27 18:32:38 +00:00
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si_get_sample_position(&sctx->b, 1, 0, sctx->sample_positions.x1[0]);
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2017-10-07 22:33:44 +01:00
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2020-03-27 18:32:38 +00:00
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for (i = 0; i < 2; i++)
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si_get_sample_position(&sctx->b, 2, i, sctx->sample_positions.x2[i]);
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for (i = 0; i < 4; i++)
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si_get_sample_position(&sctx->b, 4, i, sctx->sample_positions.x4[i]);
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for (i = 0; i < 8; i++)
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si_get_sample_position(&sctx->b, 8, i, sctx->sample_positions.x8[i]);
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for (i = 0; i < 16; i++)
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si_get_sample_position(&sctx->b, 16, i, sctx->sample_positions.x16[i]);
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2017-10-07 22:33:44 +01:00
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}
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