2016-08-08 23:25:17 +01:00
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/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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2016-10-11 18:26:21 +01:00
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#ifndef BLORP_H
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#define BLORP_H
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2016-08-08 23:25:17 +01:00
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#include <stdint.h>
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#include <stdbool.h>
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#include "isl/isl.h"
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struct brw_context;
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2016-11-01 21:16:34 +00:00
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struct brw_stage_prog_data;
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2016-08-08 23:25:17 +01:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2016-08-18 18:02:03 +01:00
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struct blorp_batch;
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2016-08-19 13:43:29 +01:00
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struct blorp_params;
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2016-08-18 18:02:03 +01:00
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2016-08-15 23:07:22 +01:00
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struct blorp_context {
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void *driver_ctx;
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const struct isl_device *isl_dev;
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2016-08-26 18:07:40 +01:00
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2016-08-19 08:49:18 +01:00
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const struct brw_compiler *compiler;
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2016-08-17 17:31:27 +01:00
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struct {
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uint32_t tex;
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uint32_t rb;
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uint32_t vb;
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} mocs;
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2016-08-26 18:07:40 +01:00
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bool (*lookup_shader)(struct blorp_context *blorp,
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const void *key, uint32_t key_size,
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uint32_t *kernel_out, void *prog_data_out);
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void (*upload_shader)(struct blorp_context *blorp,
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const void *key, uint32_t key_size,
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const void *kernel, uint32_t kernel_size,
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2016-11-01 21:16:34 +00:00
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const struct brw_stage_prog_data *prog_data,
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uint32_t prog_data_size,
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2016-08-26 18:07:40 +01:00
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uint32_t *kernel_out, void *prog_data_out);
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2016-08-19 13:43:29 +01:00
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void (*exec)(struct blorp_batch *batch, const struct blorp_params *params);
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2016-08-15 23:07:22 +01:00
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};
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void blorp_init(struct blorp_context *blorp, void *driver_ctx,
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struct isl_device *isl_dev);
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void blorp_finish(struct blorp_context *blorp);
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2016-10-08 01:20:00 +01:00
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enum blorp_batch_flags {
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/**
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* This flag indicates that blorp should *not* re-emit the depth and
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* stencil buffer packets. Instead, the driver guarantees that all depth
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* and stencil images passed in will match what is currently set in the
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* hardware.
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*/
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BLORP_BATCH_NO_EMIT_DEPTH_STENCIL = (1 << 0),
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};
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2016-08-17 16:31:53 +01:00
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struct blorp_batch {
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struct blorp_context *blorp;
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void *driver_batch;
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2016-10-08 01:20:00 +01:00
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enum blorp_batch_flags flags;
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2016-08-17 16:31:53 +01:00
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};
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void blorp_batch_init(struct blorp_context *blorp, struct blorp_batch *batch,
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2016-10-08 01:20:00 +01:00
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void *driver_batch, enum blorp_batch_flags flags);
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2016-08-17 16:31:53 +01:00
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void blorp_batch_finish(struct blorp_batch *batch);
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2016-08-18 10:19:29 +01:00
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struct blorp_address {
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2016-08-19 09:42:31 +01:00
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void *buffer;
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2016-08-18 10:19:29 +01:00
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uint32_t read_domains;
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uint32_t write_domain;
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uint32_t offset;
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};
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2016-08-19 13:43:29 +01:00
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struct blorp_surf
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2016-08-08 23:25:17 +01:00
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{
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const struct isl_surf *surf;
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2016-08-18 10:19:29 +01:00
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struct blorp_address addr;
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2016-08-08 23:25:17 +01:00
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const struct isl_surf *aux_surf;
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2016-08-18 10:19:29 +01:00
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struct blorp_address aux_addr;
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2016-08-08 23:25:17 +01:00
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enum isl_aux_usage aux_usage;
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union isl_color_value clear_color;
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};
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void
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2016-08-19 13:43:29 +01:00
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blorp_blit(struct blorp_batch *batch,
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const struct blorp_surf *src_surf,
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unsigned src_level, unsigned src_layer,
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2016-08-28 05:48:40 +01:00
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enum isl_format src_format, struct isl_swizzle src_swizzle,
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2016-08-19 13:43:29 +01:00
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const struct blorp_surf *dst_surf,
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unsigned dst_level, unsigned dst_layer,
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2016-08-28 05:57:51 +01:00
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enum isl_format dst_format, struct isl_swizzle dst_swizzle,
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2016-08-19 13:43:29 +01:00
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float src_x0, float src_y0,
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float src_x1, float src_y1,
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float dst_x0, float dst_y0,
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float dst_x1, float dst_y1,
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uint32_t filter, bool mirror_x, bool mirror_y);
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2016-08-08 23:25:17 +01:00
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2016-08-30 21:13:43 +01:00
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void
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blorp_copy(struct blorp_batch *batch,
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const struct blorp_surf *src_surf,
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unsigned src_level, unsigned src_layer,
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const struct blorp_surf *dst_surf,
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unsigned dst_level, unsigned dst_layer,
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uint32_t src_x, uint32_t src_y,
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uint32_t dst_x, uint32_t dst_y,
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uint32_t src_width, uint32_t src_height);
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2016-08-08 23:25:17 +01:00
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void
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2016-08-19 08:54:56 +01:00
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blorp_fast_clear(struct blorp_batch *batch,
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2016-08-26 16:44:18 +01:00
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const struct blorp_surf *surf, enum isl_format format,
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uint32_t level, uint32_t start_layer, uint32_t num_layers,
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2016-08-08 23:25:17 +01:00
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uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1);
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void
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2016-08-19 08:54:56 +01:00
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blorp_clear(struct blorp_batch *batch,
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2016-08-19 13:43:29 +01:00
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const struct blorp_surf *surf,
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2016-08-31 02:01:27 +01:00
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enum isl_format format, struct isl_swizzle swizzle,
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2016-08-26 16:44:18 +01:00
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uint32_t level, uint32_t start_layer, uint32_t num_layers,
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2016-08-08 23:25:17 +01:00
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uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
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2016-08-31 02:01:27 +01:00
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union isl_color_value clear_color,
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2016-08-31 00:55:35 +01:00
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const bool color_write_disable[4]);
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2016-08-08 23:25:17 +01:00
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2016-10-07 07:20:12 +01:00
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void
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blorp_clear_depth_stencil(struct blorp_batch *batch,
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const struct blorp_surf *depth,
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const struct blorp_surf *stencil,
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uint32_t level, uint32_t start_layer,
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uint32_t num_layers,
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uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
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bool clear_depth, float depth_value,
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uint8_t stencil_mask, uint8_t stencil_value);
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2016-10-21 22:50:20 +01:00
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void
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blorp_clear_attachments(struct blorp_batch *batch,
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uint32_t binding_table_offset,
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enum isl_format depth_format,
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uint32_t num_samples,
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uint32_t start_layer, uint32_t num_layers,
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uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
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bool clear_color, union isl_color_value color_value,
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bool clear_depth, float depth_value,
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uint8_t stencil_mask, uint8_t stencil_value);
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2016-08-08 23:25:17 +01:00
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void
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2016-08-19 13:43:29 +01:00
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blorp_ccs_resolve(struct blorp_batch *batch,
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struct blorp_surf *surf, enum isl_format format);
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2016-08-08 23:25:17 +01:00
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2016-08-19 11:15:41 +01:00
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/**
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* For an overview of the HiZ operations, see the following sections of the
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* Sandy Bridge PRM, Volume 1, Part2:
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* - 7.5.3.1 Depth Buffer Clear
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* - 7.5.3.2 Depth Buffer Resolve
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* - 7.5.3.3 Hierarchical Depth Buffer Resolve
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*
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* Of these, two get entered in the resolve map as needing to be done to the
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* buffer: depth resolve and hiz resolve.
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*/
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enum blorp_hiz_op {
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BLORP_HIZ_OP_NONE,
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BLORP_HIZ_OP_DEPTH_CLEAR,
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BLORP_HIZ_OP_DEPTH_RESOLVE,
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BLORP_HIZ_OP_HIZ_RESOLVE,
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};
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2016-08-08 23:25:17 +01:00
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void
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2016-08-19 08:54:56 +01:00
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blorp_gen6_hiz_op(struct blorp_batch *batch,
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2016-08-19 13:43:29 +01:00
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struct blorp_surf *surf, unsigned level, unsigned layer,
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2016-08-19 11:15:41 +01:00
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enum blorp_hiz_op op);
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2016-08-08 23:25:17 +01:00
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif /* __cplusplus */
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2016-10-11 18:26:21 +01:00
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#endif /* BLORP_H */
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