2016-10-07 00:16:09 +01:00
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include "radv_meta.h"
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#include "radv_private.h"
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#include "sid.h"
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static VkResult
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2017-08-03 15:32:46 +01:00
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create_pass(struct radv_device *device,
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uint32_t samples,
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VkRenderPass *pass)
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2016-10-07 00:16:09 +01:00
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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VkAttachmentDescription attachment;
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2017-08-31 09:12:52 +01:00
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attachment.flags = 0;
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2017-06-28 23:38:29 +01:00
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attachment.format = VK_FORMAT_D32_SFLOAT_S8_UINT;
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2017-08-03 15:32:46 +01:00
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attachment.samples = samples;
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2016-10-07 00:16:09 +01:00
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attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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2017-08-31 09:12:52 +01:00
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attachment.stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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attachment.stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE;
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2016-10-07 00:16:09 +01:00
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attachment.initialLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
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attachment.finalLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
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result = radv_CreateRenderPass(device_h,
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&(VkRenderPassCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments = &attachment,
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.subpassCount = 1,
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.pSubpasses = &(VkSubpassDescription) {
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.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
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.inputAttachmentCount = 0,
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.colorAttachmentCount = 0,
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.pColorAttachments = NULL,
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.pResolveAttachments = NULL,
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.pDepthStencilAttachment = &(VkAttachmentReference) {
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.attachment = 0,
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.layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
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},
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.preserveAttachmentCount = 0,
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.pPreserveAttachments = NULL,
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},
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.dependencyCount = 0,
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},
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alloc,
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2017-08-03 15:32:46 +01:00
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pass);
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2016-10-07 00:16:09 +01:00
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return result;
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}
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2017-12-18 18:38:52 +00:00
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static VkResult
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create_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout)
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{
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VkPipelineLayoutCreateInfo pl_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
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.setLayoutCount = 0,
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.pSetLayouts = NULL,
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.pushConstantRangeCount = 0,
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.pPushConstantRanges = NULL,
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};
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return radv_CreatePipelineLayout(radv_device_to_handle(device),
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&pl_create_info,
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&device->meta_state.alloc,
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layout);
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}
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2016-10-07 00:16:09 +01:00
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static VkResult
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create_pipeline(struct radv_device *device,
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2017-08-03 15:32:46 +01:00
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VkShaderModule vs_module_h,
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uint32_t samples,
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VkRenderPass pass,
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2017-12-18 18:38:52 +00:00
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VkPipelineLayout layout,
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2017-08-03 15:32:46 +01:00
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VkPipeline *decompress_pipeline,
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VkPipeline *resummarize_pipeline)
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2016-10-07 00:16:09 +01:00
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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2018-08-13 23:07:57 +01:00
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struct radv_shader_module vs_module = {0};
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mtx_lock(&device->meta_state.mtx);
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if (*decompress_pipeline) {
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mtx_unlock(&device->meta_state.mtx);
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return VK_SUCCESS;
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}
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if (!vs_module_h) {
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vs_module.nir = radv_meta_build_nir_vs_generate_vertices();
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vs_module_h = radv_shader_module_to_handle(&vs_module);
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}
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2016-10-07 00:16:09 +01:00
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struct radv_shader_module fs_module = {
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2017-04-19 00:13:06 +01:00
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.nir = radv_meta_build_nir_fs_noop(),
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2016-10-07 00:16:09 +01:00
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};
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if (!fs_module.nir) {
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/* XXX: Need more accurate error */
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result = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto cleanup;
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}
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2019-05-30 10:52:56 +01:00
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const VkPipelineSampleLocationsStateCreateInfoEXT sample_locs_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SAMPLE_LOCATIONS_STATE_CREATE_INFO_EXT,
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.sampleLocationsEnable = false,
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};
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2016-10-07 00:16:09 +01:00
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const VkGraphicsPipelineCreateInfo pipeline_create_info = {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = (VkPipelineShaderStageCreateInfo[]) {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_VERTEX_BIT,
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.module = vs_module_h,
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.pName = "main",
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},
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
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.module = radv_shader_module_to_handle(&fs_module),
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.pName = "main",
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},
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},
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.pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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2017-04-18 06:31:55 +01:00
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.vertexBindingDescriptionCount = 0,
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.vertexAttributeDescriptionCount = 0,
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2016-10-07 00:16:09 +01:00
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},
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.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
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.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
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.primitiveRestartEnable = false,
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},
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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2017-02-28 23:39:58 +00:00
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.viewportCount = 1,
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.scissorCount = 1,
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2016-10-07 00:16:09 +01:00
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},
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.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
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.depthClampEnable = false,
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.rasterizerDiscardEnable = false,
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.polygonMode = VK_POLYGON_MODE_FILL,
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.cullMode = VK_CULL_MODE_NONE,
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.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
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},
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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2019-05-30 10:52:56 +01:00
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.pNext = &sample_locs_create_info,
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2017-08-03 15:32:46 +01:00
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.rasterizationSamples = samples,
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2016-10-07 00:16:09 +01:00
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
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.logicOpEnable = false,
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.attachmentCount = 0,
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.pAttachments = NULL,
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},
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.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
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.depthTestEnable = false,
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.depthWriteEnable = false,
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.depthBoundsTestEnable = false,
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.stencilTestEnable = false,
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},
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2017-02-28 23:39:58 +00:00
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.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
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2019-05-30 10:52:56 +01:00
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.dynamicStateCount = 3,
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2017-02-28 23:39:58 +00:00
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.pDynamicStates = (VkDynamicState[]) {
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VK_DYNAMIC_STATE_VIEWPORT,
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VK_DYNAMIC_STATE_SCISSOR,
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2019-05-30 10:52:56 +01:00
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VK_DYNAMIC_STATE_SAMPLE_LOCATIONS_EXT,
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2017-02-28 23:39:58 +00:00
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},
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},
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2017-12-18 18:38:52 +00:00
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.layout = layout,
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2017-08-03 15:32:46 +01:00
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.renderPass = pass,
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2016-10-07 00:16:09 +01:00
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.subpass = 0,
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};
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&pipeline_create_info,
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.db_flush_depth_inplace = true,
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.db_flush_stencil_inplace = true,
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},
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&device->meta_state.alloc,
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2017-08-03 15:32:46 +01:00
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decompress_pipeline);
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2016-10-07 00:16:09 +01:00
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if (result != VK_SUCCESS)
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goto cleanup;
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&pipeline_create_info,
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.db_flush_depth_inplace = true,
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.db_flush_stencil_inplace = true,
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.db_resummarize = true,
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},
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&device->meta_state.alloc,
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2017-08-03 15:32:46 +01:00
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resummarize_pipeline);
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2016-10-07 00:16:09 +01:00
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if (result != VK_SUCCESS)
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goto cleanup;
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goto cleanup;
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cleanup:
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ralloc_free(fs_module.nir);
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2018-08-13 23:07:57 +01:00
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if (vs_module.nir)
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ralloc_free(vs_module.nir);
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mtx_unlock(&device->meta_state.mtx);
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2016-10-07 00:16:09 +01:00
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return result;
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}
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void
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radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
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{
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struct radv_meta_state *state = &device->meta_state;
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2017-08-03 15:32:46 +01:00
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for (uint32_t i = 0; i < ARRAY_SIZE(state->depth_decomp); ++i) {
|
2017-09-28 12:50:56 +01:00
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radv_DestroyRenderPass(radv_device_to_handle(device),
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state->depth_decomp[i].pass,
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&state->alloc);
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2017-12-18 18:38:52 +00:00
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radv_DestroyPipelineLayout(radv_device_to_handle(device),
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state->depth_decomp[i].p_layout,
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&state->alloc);
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2017-09-28 12:50:56 +01:00
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radv_DestroyPipeline(radv_device_to_handle(device),
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state->depth_decomp[i].decompress_pipeline,
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&state->alloc);
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radv_DestroyPipeline(radv_device_to_handle(device),
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state->depth_decomp[i].resummarize_pipeline,
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&state->alloc);
|
2016-10-07 00:16:09 +01:00
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}
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}
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VkResult
|
2018-08-13 23:07:57 +01:00
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radv_device_init_meta_depth_decomp_state(struct radv_device *device, bool on_demand)
|
2016-10-07 00:16:09 +01:00
|
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{
|
2017-08-03 15:32:46 +01:00
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struct radv_meta_state *state = &device->meta_state;
|
2016-10-07 00:16:09 +01:00
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VkResult res = VK_SUCCESS;
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|
2017-04-19 00:13:06 +01:00
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struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
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2016-10-07 00:16:09 +01:00
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if (!vs_module.nir) {
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/* XXX: Need more accurate error */
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res = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto fail;
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}
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VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
|
2017-08-03 15:32:46 +01:00
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for (uint32_t i = 0; i < ARRAY_SIZE(state->depth_decomp); ++i) {
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uint32_t samples = 1 << i;
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res = create_pass(device, samples, &state->depth_decomp[i].pass);
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if (res != VK_SUCCESS)
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goto fail;
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|
2017-12-18 18:38:52 +00:00
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res = create_pipeline_layout(device,
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&state->depth_decomp[i].p_layout);
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if (res != VK_SUCCESS)
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goto fail;
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|
2018-08-13 23:07:57 +01:00
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if (on_demand)
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continue;
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|
|
|
2017-08-03 15:32:46 +01:00
|
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res = create_pipeline(device, vs_module_h, samples,
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|
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state->depth_decomp[i].pass,
|
2017-12-18 18:38:52 +00:00
|
|
|
state->depth_decomp[i].p_layout,
|
2017-08-03 15:32:46 +01:00
|
|
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&state->depth_decomp[i].decompress_pipeline,
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&state->depth_decomp[i].resummarize_pipeline);
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if (res != VK_SUCCESS)
|
|
|
|
goto fail;
|
|
|
|
}
|
2016-10-07 00:16:09 +01:00
|
|
|
|
|
|
|
goto cleanup;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
radv_device_finish_meta_depth_decomp_state(device);
|
|
|
|
|
|
|
|
cleanup:
|
|
|
|
ralloc_free(vs_module.nir);
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2017-08-03 15:32:46 +01:00
|
|
|
enum radv_depth_op {
|
|
|
|
DEPTH_DECOMPRESS,
|
|
|
|
DEPTH_RESUMMARIZE,
|
|
|
|
};
|
|
|
|
|
2019-07-02 13:50:24 +01:00
|
|
|
static VkPipeline *
|
|
|
|
radv_get_depth_pipeline(struct radv_cmd_buffer *cmd_buffer,
|
|
|
|
struct radv_image *image, enum radv_depth_op op)
|
|
|
|
{
|
|
|
|
struct radv_meta_state *state = &cmd_buffer->device->meta_state;
|
|
|
|
uint32_t samples = image->info.samples;
|
|
|
|
uint32_t samples_log2 = ffs(samples) - 1;
|
|
|
|
VkPipeline *pipeline;
|
|
|
|
|
|
|
|
if (!state->depth_decomp[samples_log2].decompress_pipeline) {
|
|
|
|
VkResult ret;
|
|
|
|
|
|
|
|
ret = create_pipeline(cmd_buffer->device, VK_NULL_HANDLE, samples,
|
|
|
|
state->depth_decomp[samples_log2].pass,
|
|
|
|
state->depth_decomp[samples_log2].p_layout,
|
|
|
|
&state->depth_decomp[samples_log2].decompress_pipeline,
|
|
|
|
&state->depth_decomp[samples_log2].resummarize_pipeline);
|
|
|
|
if (ret != VK_SUCCESS) {
|
|
|
|
cmd_buffer->record_result = ret;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (op) {
|
|
|
|
case DEPTH_DECOMPRESS:
|
|
|
|
pipeline = &state->depth_decomp[samples_log2].decompress_pipeline;
|
|
|
|
break;
|
|
|
|
case DEPTH_RESUMMARIZE:
|
|
|
|
pipeline = &state->depth_decomp[samples_log2].resummarize_pipeline;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
unreachable("unknown operation");
|
|
|
|
}
|
|
|
|
|
|
|
|
return pipeline;
|
|
|
|
}
|
|
|
|
|
2016-10-07 00:16:09 +01:00
|
|
|
static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
|
|
|
struct radv_image *image,
|
|
|
|
VkImageSubresourceRange *subresourceRange,
|
2019-05-30 11:20:12 +01:00
|
|
|
struct radv_sample_locations_state *sample_locs,
|
2017-08-03 15:32:46 +01:00
|
|
|
enum radv_depth_op op)
|
2016-10-07 00:16:09 +01:00
|
|
|
{
|
|
|
|
struct radv_meta_saved_state saved_state;
|
|
|
|
VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
|
|
|
|
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
|
2017-05-02 00:49:14 +01:00
|
|
|
uint32_t width = radv_minify(image->info.width,
|
2016-10-07 00:16:09 +01:00
|
|
|
subresourceRange->baseMipLevel);
|
2017-05-02 00:49:14 +01:00
|
|
|
uint32_t height = radv_minify(image->info.height,
|
2016-10-07 00:16:09 +01:00
|
|
|
subresourceRange->baseMipLevel);
|
2017-08-03 15:32:46 +01:00
|
|
|
uint32_t samples = image->info.samples;
|
|
|
|
uint32_t samples_log2 = ffs(samples) - 1;
|
|
|
|
struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state;
|
2019-07-02 13:50:24 +01:00
|
|
|
VkPipeline *pipeline;
|
2016-10-07 00:16:09 +01:00
|
|
|
|
2018-04-06 14:37:28 +01:00
|
|
|
if (!radv_image_has_htile(image))
|
2016-10-07 00:16:09 +01:00
|
|
|
return;
|
|
|
|
|
2017-10-03 13:37:56 +01:00
|
|
|
radv_meta_save(&saved_state, cmd_buffer,
|
|
|
|
RADV_META_SAVE_GRAPHICS_PIPELINE |
|
2019-05-30 11:20:12 +01:00
|
|
|
RADV_META_SAVE_SAMPLE_LOCATIONS |
|
2017-10-03 13:37:56 +01:00
|
|
|
RADV_META_SAVE_PASS);
|
2016-10-07 00:16:09 +01:00
|
|
|
|
2019-07-02 13:50:24 +01:00
|
|
|
pipeline = radv_get_depth_pipeline(cmd_buffer, image, op);
|
2017-10-03 10:08:03 +01:00
|
|
|
|
2019-07-02 13:50:24 +01:00
|
|
|
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
|
|
|
|
VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline);
|
2018-11-22 18:10:15 +00:00
|
|
|
|
|
|
|
radv_CmdSetViewport(cmd_buffer_h, 0, 1, &(VkViewport) {
|
|
|
|
.x = 0,
|
|
|
|
.y = 0,
|
|
|
|
.width = width,
|
|
|
|
.height = height,
|
|
|
|
.minDepth = 0.0f,
|
|
|
|
.maxDepth = 1.0f
|
|
|
|
});
|
|
|
|
|
|
|
|
radv_CmdSetScissor(cmd_buffer_h, 0, 1, &(VkRect2D) {
|
|
|
|
.offset = { 0, 0 },
|
|
|
|
.extent = { width, height },
|
|
|
|
});
|
|
|
|
|
2019-05-30 11:20:12 +01:00
|
|
|
if (sample_locs) {
|
|
|
|
assert(image->flags & VK_IMAGE_CREATE_SAMPLE_LOCATIONS_COMPATIBLE_DEPTH_BIT_EXT);
|
|
|
|
|
|
|
|
/* Set the sample locations specified during explicit or
|
|
|
|
* automatic layout transitions, otherwise the depth decompress
|
|
|
|
* pass uses the default HW locations.
|
|
|
|
*/
|
|
|
|
radv_CmdSetSampleLocationsEXT(cmd_buffer_h, &(VkSampleLocationsInfoEXT) {
|
|
|
|
.sampleLocationsPerPixel = sample_locs->per_pixel,
|
|
|
|
.sampleLocationGridSize = sample_locs->grid_size,
|
|
|
|
.sampleLocationsCount = sample_locs->count,
|
|
|
|
.pSampleLocations = sample_locs->locations,
|
|
|
|
});
|
|
|
|
}
|
|
|
|
|
2017-01-06 20:57:17 +00:00
|
|
|
for (uint32_t layer = 0; layer < radv_get_layerCount(image, subresourceRange); layer++) {
|
2016-10-07 00:16:09 +01:00
|
|
|
struct radv_image_view iview;
|
|
|
|
|
|
|
|
radv_image_view_init(&iview, cmd_buffer->device,
|
|
|
|
&(VkImageViewCreateInfo) {
|
|
|
|
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
|
|
|
.image = radv_image_to_handle(image),
|
2017-09-27 22:09:08 +01:00
|
|
|
.viewType = radv_meta_get_view_type(image),
|
2016-10-07 00:16:09 +01:00
|
|
|
.format = image->vk_format,
|
|
|
|
.subresourceRange = {
|
|
|
|
.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT,
|
|
|
|
.baseMipLevel = subresourceRange->baseMipLevel,
|
|
|
|
.levelCount = 1,
|
|
|
|
.baseArrayLayer = subresourceRange->baseArrayLayer + layer,
|
|
|
|
.layerCount = 1,
|
|
|
|
},
|
2019-08-05 00:07:04 +01:00
|
|
|
}, NULL);
|
2016-10-07 00:16:09 +01:00
|
|
|
|
|
|
|
|
|
|
|
VkFramebuffer fb_h;
|
|
|
|
radv_CreateFramebuffer(device_h,
|
|
|
|
&(VkFramebufferCreateInfo) {
|
|
|
|
.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
|
|
|
|
.attachmentCount = 1,
|
|
|
|
.pAttachments = (VkImageView[]) {
|
|
|
|
radv_image_view_to_handle(&iview)
|
|
|
|
},
|
|
|
|
.width = width,
|
|
|
|
.height = height,
|
|
|
|
.layers = 1
|
|
|
|
},
|
|
|
|
&cmd_buffer->pool->alloc,
|
|
|
|
&fb_h);
|
|
|
|
|
2016-10-11 06:54:52 +01:00
|
|
|
radv_CmdBeginRenderPass(cmd_buffer_h,
|
2016-10-07 00:16:09 +01:00
|
|
|
&(VkRenderPassBeginInfo) {
|
|
|
|
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
|
2017-08-03 15:32:46 +01:00
|
|
|
.renderPass = meta_state->depth_decomp[samples_log2].pass,
|
2016-10-07 00:16:09 +01:00
|
|
|
.framebuffer = fb_h,
|
|
|
|
.renderArea = {
|
|
|
|
.offset = {
|
|
|
|
0,
|
|
|
|
0,
|
|
|
|
},
|
|
|
|
.extent = {
|
|
|
|
width,
|
|
|
|
height,
|
|
|
|
}
|
|
|
|
},
|
|
|
|
.clearValueCount = 0,
|
|
|
|
.pClearValues = NULL,
|
|
|
|
},
|
|
|
|
VK_SUBPASS_CONTENTS_INLINE);
|
|
|
|
|
2018-11-22 18:10:15 +00:00
|
|
|
radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
|
2016-10-11 06:54:52 +01:00
|
|
|
radv_CmdEndRenderPass(cmd_buffer_h);
|
2016-10-07 00:16:09 +01:00
|
|
|
|
|
|
|
radv_DestroyFramebuffer(device_h, fb_h,
|
|
|
|
&cmd_buffer->pool->alloc);
|
|
|
|
}
|
|
|
|
radv_meta_restore(&saved_state, cmd_buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
|
|
|
struct radv_image *image,
|
2019-05-30 11:20:12 +01:00
|
|
|
VkImageSubresourceRange *subresourceRange,
|
|
|
|
struct radv_sample_locations_state *sample_locs)
|
2016-10-07 00:16:09 +01:00
|
|
|
{
|
2016-12-27 03:26:11 +00:00
|
|
|
assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
|
2019-05-30 11:20:12 +01:00
|
|
|
radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange,
|
|
|
|
sample_locs, DEPTH_DECOMPRESS);
|
2016-10-07 00:16:09 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void radv_resummarize_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
|
|
|
struct radv_image *image,
|
2019-05-30 11:20:12 +01:00
|
|
|
VkImageSubresourceRange *subresourceRange,
|
|
|
|
struct radv_sample_locations_state *sample_locs)
|
2016-10-07 00:16:09 +01:00
|
|
|
{
|
2016-12-27 03:26:11 +00:00
|
|
|
assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
|
2019-05-30 11:20:12 +01:00
|
|
|
radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange,
|
|
|
|
sample_locs, DEPTH_RESUMMARIZE);
|
2016-10-07 00:16:09 +01:00
|
|
|
}
|