Compare commits
7 Commits
| Author | SHA1 | Date |
|---|---|---|
 Joshua Ashton
|
b6f2c4e003 | |
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Joshua Ashton
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54c14c8709 | |
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Joshua Ashton
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f0865163cb | |
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Joshua Ashton
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991341094b | |
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Joshua Ashton
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89572c1b21 | |
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Joshua Ashton
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7d1734037b | |
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Joshua Ashton
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650375bf6a |
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@ -506,7 +506,7 @@ static inline struct demo_swapchain *demo_swapchain_create(ID3D12CommandQueue *c
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resource_create_info.desc.SampleDesc.Quality = 0;
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resource_create_info.desc.Layout = D3D12_TEXTURE_LAYOUT_UNKNOWN;
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resource_create_info.desc.Flags = D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET;
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resource_create_info.flags = VKD3D_RESOURCE_INITIAL_STATE_TRANSITION | VKD3D_RESOURCE_PRESENT_STATE_TRANSITION;
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resource_create_info.flags = VKD3D_RESOURCE_PRESENT_STATE_TRANSITION;
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resource_create_info.present_state = D3D12_RESOURCE_STATE_PRESENT;
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for (i = 0; i < image_count; ++i)
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{
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@ -573,6 +573,7 @@ enum vkd3d_component_type
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VKD3D_TYPE_INT = 2,
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VKD3D_TYPE_FLOAT = 3,
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VKD3D_TYPE_BOOL,
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VKD3D_TYPE_DOUBLE,
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VKD3D_TYPE_COUNT,
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VKD3D_FORCE_32_BIT_ENUM(VKD3D_COMPONENT_TYPE),
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@ -363,6 +363,7 @@ enum vkd3d_sm4_register_type
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VKD3D_SM4_RT_OUTPUT = 0x02,
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VKD3D_SM4_RT_INDEXABLE_TEMP = 0x03,
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VKD3D_SM4_RT_IMMCONST = 0x04,
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VKD3D_SM4_RT_IMMCONST64 = 0x05,
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VKD3D_SM4_RT_SAMPLER = 0x06,
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VKD3D_SM4_RT_RESOURCE = 0x07,
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VKD3D_SM4_RT_CONSTBUFFER = 0x08,
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@ -477,6 +478,7 @@ enum vkd3d_sm4_data_type
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VKD3D_SM4_DATA_INT = 0x3,
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VKD3D_SM4_DATA_UINT = 0x4,
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VKD3D_SM4_DATA_FLOAT = 0x5,
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VKD3D_SM4_DATA_DOUBLE = 0x6,
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};
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enum vkd3d_sm4_sampler_mode
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@ -567,6 +569,7 @@ static const enum vkd3d_data_type data_type_table[] =
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/* VKD3D_SM4_DATA_INT */ VKD3D_DATA_INT,
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/* VKD3D_SM4_DATA_UINT */ VKD3D_DATA_UINT,
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/* VKD3D_SM4_DATA_FLOAT */ VKD3D_DATA_FLOAT,
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/* VKD3D_SM4_DATA_DOUBLE */ VKD3D_DATA_DOUBLE,
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};
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static bool shader_is_sm_5_1(const struct vkd3d_sm4_data *priv)
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@ -1022,6 +1025,7 @@ static void shader_sm5_read_sync(struct vkd3d_shader_instruction *ins,
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* R -> VKD3D_DATA_RESOURCE
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* S -> VKD3D_DATA_SAMPLER
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* U -> VKD3D_DATA_UAV
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* d -> VKD3D_DATA_DOUBLE
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*/
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static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{
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@ -1046,6 +1050,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{VKD3D_SM4_OP_DP4, VKD3DSIH_DP4, "f", "ff"},
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{VKD3D_SM4_OP_ELSE, VKD3DSIH_ELSE, "", ""},
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{VKD3D_SM4_OP_EMIT, VKD3DSIH_EMIT, "", ""},
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{VKD3D_SM4_OP_EMIT_THEN_CUT, VKD3DSIH_EMIT_THEN_CUT, "", ""},
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{VKD3D_SM4_OP_ENDIF, VKD3DSIH_ENDIF, "", ""},
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{VKD3D_SM4_OP_ENDLOOP, VKD3DSIH_ENDLOOP, "", ""},
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{VKD3D_SM4_OP_ENDSWITCH, VKD3DSIH_ENDSWITCH, "", ""},
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@ -1110,6 +1115,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{VKD3D_SM4_OP_ULT, VKD3DSIH_ULT, "u", "uu"},
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{VKD3D_SM4_OP_UGE, VKD3DSIH_UGE, "u", "uu"},
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{VKD3D_SM4_OP_UMUL, VKD3DSIH_UMUL, "uu", "uu"},
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{VKD3D_SM4_OP_UMAD, VKD3DSIH_UMAD, "u", "uuu"},
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{VKD3D_SM4_OP_UMAX, VKD3DSIH_UMAX, "u", "uu"},
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{VKD3D_SM4_OP_UMIN, VKD3DSIH_UMIN, "u", "uu"},
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{VKD3D_SM4_OP_USHR, VKD3DSIH_USHR, "u", "uu"},
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@ -1161,6 +1167,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{VKD3D_SM5_OP_HS_JOIN_PHASE, VKD3DSIH_HS_JOIN_PHASE, "", ""},
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{VKD3D_SM5_OP_EMIT_STREAM, VKD3DSIH_EMIT_STREAM, "", "f"},
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{VKD3D_SM5_OP_CUT_STREAM, VKD3DSIH_CUT_STREAM, "", "f"},
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{VKD3D_SM5_OP_EMIT_THEN_CUT_STREAM, VKD3DSIH_EMIT_THEN_CUT_STREAM, "", "f"},
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{VKD3D_SM5_OP_FCALL, VKD3DSIH_FCALL, "", "O",
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shader_sm5_read_fcall},
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{VKD3D_SM5_OP_BUFINFO, VKD3DSIH_BUFINFO, "i", "U"},
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@ -1252,6 +1259,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{VKD3D_SM5_OP_SYNC, VKD3DSIH_SYNC, "", "",
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shader_sm5_read_sync},
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{VKD3D_SM5_OP_EVAL_SAMPLE_INDEX, VKD3DSIH_EVAL_SAMPLE_INDEX, "f", "fi"},
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{VKD3D_SM5_OP_EVAL_SNAPPED, VKD3DSIH_EVAL_SNAPPED, "f", "fi"},
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{VKD3D_SM5_OP_EVAL_CENTROID, VKD3DSIH_EVAL_CENTROID, "f", "f"},
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{VKD3D_SM5_OP_DCL_GS_INSTANCES, VKD3DSIH_DCL_GS_INSTANCES, "", "",
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shader_sm4_read_declaration_count},
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@ -1271,6 +1279,26 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{VKD3D_SM5_OP_SAMPLE_D_CLAMP_FEEDBACK, VKD3DSIH_SAMPLE_GRAD_FEEDBACK, "fu", "fRSfff"},
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{VKD3D_SM5_OP_SAMPLE_C_CLAMP_FEEDBACK, VKD3DSIH_SAMPLE_C_FEEDBACK, "fu", "fRSff"},
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{VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED, VKD3DSIH_CHECK_ACCESS_FULLY_MAPPED, "u", "u"},
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{VKD3D_SM5_OP_DADD, VKD3DSIH_DADD, "d", "dd"},
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{VKD3D_SM5_OP_DMAX, VKD3DSIH_DMAX, "d", "dd"},
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{VKD3D_SM5_OP_DMIN, VKD3DSIH_DMIN, "d", "dd"},
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{VKD3D_SM5_OP_DMUL, VKD3DSIH_DMUL, "d", "dd"},
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{VKD3D_SM5_OP_DEQ, VKD3DSIH_DEQ, "u", "dd"},
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{VKD3D_SM5_OP_DGE, VKD3DSIH_DGE, "u", "dd"},
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{VKD3D_SM5_OP_DLT, VKD3DSIH_DLT, "u", "dd"},
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{VKD3D_SM5_OP_DNE, VKD3DSIH_DNE, "u", "dd"},
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{VKD3D_SM5_OP_DMOV, VKD3DSIH_DMOV, "d", "d"},
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{VKD3D_SM5_OP_DMOVC, VKD3DSIH_DMOVC, "d", "udd"},
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{VKD3D_SM5_OP_DTOF, VKD3DSIH_DTOF, "f", "d"},
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{VKD3D_SM5_OP_FTOD, VKD3DSIH_FTOD, "d", "f"},
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{VKD3D_SM5_OP_DDIV, VKD3DSIH_DDIV, "d", "dd"},
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{VKD3D_SM5_OP_DFMA, VKD3DSIH_DFMA, "d", "ddd"},
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{VKD3D_SM5_OP_DRCP, VKD3DSIH_DRCP, "d", "d"},
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{VKD3D_SM5_OP_DTOI, VKD3DSIH_DTOI, "i", "d"},
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{VKD3D_SM5_OP_DTOU, VKD3DSIH_DTOU, "u", "d"},
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{VKD3D_SM5_OP_ITOD, VKD3DSIH_ITOD, "d", "i"},
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{VKD3D_SM5_OP_UTOD, VKD3DSIH_UTOD, "d", "u"},
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};
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static const enum vkd3d_shader_register_type register_type_table[] =
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@ -1280,7 +1308,7 @@ static const enum vkd3d_shader_register_type register_type_table[] =
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/* VKD3D_SM4_RT_OUTPUT */ VKD3DSPR_OUTPUT,
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/* VKD3D_SM4_RT_INDEXABLE_TEMP */ VKD3DSPR_IDXTEMP,
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/* VKD3D_SM4_RT_IMMCONST */ VKD3DSPR_IMMCONST,
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/* UNKNOWN */ ~0u,
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/* VKD3D_SM4_RT_IMMCONST64 */ VKD3DSPR_IMMCONST64,
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/* VKD3D_SM4_RT_SAMPLER */ VKD3DSPR_SAMPLER,
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/* VKD3D_SM4_RT_RESOURCE */ VKD3DSPR_RESOURCE,
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/* VKD3D_SM4_RT_CONSTBUFFER */ VKD3DSPR_CONSTBUFFER,
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@ -1374,6 +1402,8 @@ static enum vkd3d_data_type map_data_type(char t)
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return VKD3D_DATA_SAMPLER;
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case 'U':
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return VKD3D_DATA_UAV;
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case 'd':
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return VKD3D_DATA_DOUBLE;
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default:
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ERR("Invalid data type '%c'.\n", t);
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return VKD3D_DATA_FLOAT;
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@ -1681,6 +1711,40 @@ static bool shader_sm4_read_param(struct vkd3d_sm4_data *priv, const DWORD **ptr
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break;
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}
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}
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else if (register_type == VKD3D_SM4_RT_IMMCONST64)
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{
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enum vkd3d_sm4_immconst_type immconst_type =
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(token & VKD3D_SM4_IMMCONST_TYPE_MASK) >> VKD3D_SM4_IMMCONST_TYPE_SHIFT;
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switch (immconst_type)
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{
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case VKD3D_SM4_IMMCONST_SCALAR:
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param->immconst_type = VKD3D_IMMCONST_SCALAR;
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if (end - *ptr < 1)
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{
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WARN("Invalid ptr %p, end %p.\n", *ptr, end);
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return false;
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}
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memcpy(param->immconst_uint64, *ptr, 1 * sizeof(uint64_t));
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*ptr += 1;
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break;
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case VKD3D_SM4_IMMCONST_VEC4:
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param->immconst_type = VKD3D_IMMCONST_VEC4;
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if (end - *ptr < VKD3D_VEC4_SIZE)
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{
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WARN("Invalid ptr %p, end %p.\n", *ptr, end);
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return false;
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}
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memcpy(param->immconst_uint64, *ptr, 2 * sizeof(uint64_t));
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*ptr += 4;
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break;
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default:
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FIXME("Unhandled immediate constant type %#x.\n", immconst_type);
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break;
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}
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}
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map_register(priv, param);
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@ -1019,19 +1019,18 @@ static uint32_t vkd3d_spirv_get_op_type_pointer(struct vkd3d_spirv_builder *buil
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vkd3d_spirv_build_op_type_pointer);
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}
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/* Types larger than 32-bits are not supported. */
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static uint32_t vkd3d_spirv_build_op_constant(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t value)
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uint32_t result_type, const uint32_t* value, unsigned int dword_count)
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{
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return vkd3d_spirv_build_op_tr1(builder, &builder->global_stream,
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SpvOpConstant, result_type, value);
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return vkd3d_spirv_build_op_trv(builder, &builder->global_stream,
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SpvOpConstant, result_type, value, dword_count);
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}
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static uint32_t vkd3d_spirv_get_op_constant(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t value)
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uint32_t result_type, const uint32_t* value, unsigned int dword_count)
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{
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return vkd3d_spirv_build_once2(builder, SpvOpConstant, result_type, value,
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vkd3d_spirv_build_op_constant);
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return vkd3d_spirv_build_once1v(builder, SpvOpConstant, result_type,
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value, dword_count, vkd3d_spirv_build_op_constant);
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}
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static uint32_t vkd3d_spirv_build_op_constant_composite(struct vkd3d_spirv_builder *builder,
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@ -1601,6 +1600,9 @@ static uint32_t vkd3d_spirv_get_type_id(struct vkd3d_spirv_builder *builder,
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case VKD3D_TYPE_FLOAT:
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return vkd3d_spirv_get_op_type_float(builder, 32);
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break;
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case VKD3D_TYPE_DOUBLE:
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return vkd3d_spirv_get_op_type_float(builder, 64);
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break;
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case VKD3D_TYPE_INT:
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case VKD3D_TYPE_UINT:
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return vkd3d_spirv_get_op_type_int(builder, 32, component_type == VKD3D_TYPE_INT);
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@ -1616,11 +1618,19 @@ static uint32_t vkd3d_spirv_get_type_id(struct vkd3d_spirv_builder *builder,
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else
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{
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assert(component_type != VKD3D_TYPE_VOID);
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assert(component_count != 0);
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scalar_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
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return vkd3d_spirv_get_op_type_vector(builder, scalar_id, component_count);
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}
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}
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static unsigned int vkd3d_spirv_get_type_dword_count(enum vkd3d_component_type type, unsigned int component_count)
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{
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unsigned int type_size = type == VKD3D_TYPE_DOUBLE ? 2 : 1;
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return type_size * component_count;
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}
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static uint32_t vkd3d_spirv_get_sparse_result_type(struct vkd3d_spirv_builder *builder, uint32_t sampled_type_id)
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{
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uint32_t members[2];
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@ -2497,7 +2507,7 @@ static uint32_t vkd3d_dxbc_compiler_get_constant(struct vkd3d_dxbc_compiler *com
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{
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uint32_t type_id, scalar_type_id, component_ids[VKD3D_VEC4_SIZE];
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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unsigned int i;
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unsigned int i, dword_count;
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assert(0 < component_count && component_count <= VKD3D_VEC4_SIZE);
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type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
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@ -2507,21 +2517,24 @@ static uint32_t vkd3d_dxbc_compiler_get_constant(struct vkd3d_dxbc_compiler *com
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case VKD3D_TYPE_UINT:
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case VKD3D_TYPE_INT:
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case VKD3D_TYPE_FLOAT:
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case VKD3D_TYPE_DOUBLE:
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break;
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default:
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FIXME("Unhandled component_type %#x.\n", component_type);
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return vkd3d_spirv_build_op_undef(builder, &builder->global_stream, type_id);
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}
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dword_count = vkd3d_spirv_get_type_dword_count(component_type, component_count);
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if (component_count == 1)
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{
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return vkd3d_spirv_get_op_constant(builder, type_id, *values);
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return vkd3d_spirv_get_op_constant(builder, type_id, values, dword_count);
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}
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else
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{
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scalar_type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
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for (i = 0; i < component_count; ++i)
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component_ids[i] = vkd3d_spirv_get_op_constant(builder, scalar_type_id, values[i]);
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component_ids[i] = vkd3d_spirv_get_op_constant(builder, scalar_type_id, values, dword_count / component_count);
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return vkd3d_spirv_get_op_constant_composite(builder, type_id, component_ids, component_count);
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}
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}
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@ -2559,14 +2572,27 @@ static uint32_t vkd3d_dxbc_compiler_get_constant_float_vector(struct vkd3d_dxbc_
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VKD3D_TYPE_FLOAT, component_count, (const uint32_t *)values);
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}
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static uint32_t vkd3d_dxbc_compiler_get_constant_double_vector(struct vkd3d_dxbc_compiler *compiler,
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double value, unsigned int component_count)
|
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{
|
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const double values[] = {value, value};
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return vkd3d_dxbc_compiler_get_constant(compiler,
|
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VKD3D_TYPE_DOUBLE, component_count, (const uint32_t *)values);
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}
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static uint32_t vkd3d_dxbc_compiler_get_type_id_for_reg(struct vkd3d_dxbc_compiler *compiler,
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const struct vkd3d_shader_register *reg, DWORD write_mask)
|
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{
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
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unsigned int component_count = vkd3d_write_mask_component_count(write_mask);
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|
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if (reg->data_type == VKD3D_DATA_DOUBLE)
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component_count /= 2;
|
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|
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return vkd3d_spirv_get_type_id(builder,
|
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vkd3d_component_type_from_data_type(reg->data_type),
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vkd3d_write_mask_component_count(write_mask));
|
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component_count);
|
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}
|
||||
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static uint32_t vkd3d_dxbc_compiler_get_type_id_for_dst(struct vkd3d_dxbc_compiler *compiler,
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|
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@ -2899,7 +2925,7 @@ static bool vkd3d_dxbc_compiler_find_register_info(const struct vkd3d_dxbc_compi
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struct vkd3d_symbol reg_symbol, *symbol;
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struct rb_entry *entry;
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assert(reg->type != VKD3DSPR_IMMCONST);
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assert(reg->type != VKD3DSPR_IMMCONST && reg->type != VKD3DSPR_IMMCONST64);
|
||||
|
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if (reg->type == VKD3DSPR_TEMP)
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{
|
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|
|
@ -3139,6 +3165,35 @@ static uint32_t vkd3d_dxbc_compiler_emit_load_constant(struct vkd3d_dxbc_compile
|
|||
vkd3d_component_type_from_data_type(reg->data_type), component_count, values);
|
||||
}
|
||||
|
||||
static uint32_t vkd3d_dxbc_compiler_emit_load_constant64(struct vkd3d_dxbc_compiler *compiler,
|
||||
const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask)
|
||||
{
|
||||
unsigned int component_count = vkd3d_write_mask_component_count(write_mask);
|
||||
uint64_t values[2] = {0};
|
||||
unsigned int i, j;
|
||||
|
||||
assert(reg->type == VKD3DSPR_IMMCONST64);
|
||||
|
||||
if (reg->immconst_type == VKD3D_IMMCONST_SCALAR)
|
||||
{
|
||||
for (i = 0; i < component_count; ++i)
|
||||
values[i] = reg->immconst_uint64[0];
|
||||
}
|
||||
else
|
||||
{
|
||||
for (i = 0, j = 0; i < 2; ++i)
|
||||
{
|
||||
if (write_mask & (VKD3DSP_WRITEMASK_0 << (i * 2)))
|
||||
values[j++] = reg->immconst_uint64[vkd3d_swizzle_get_component(swizzle, i * 2) / 2];
|
||||
}
|
||||
}
|
||||
|
||||
component_count /= 2;
|
||||
|
||||
return vkd3d_dxbc_compiler_get_constant(compiler,
|
||||
vkd3d_component_type_from_data_type(reg->data_type), component_count, (const uint32_t*)values);
|
||||
}
|
||||
|
||||
static uint32_t vkd3d_dxbc_compiler_emit_load_scalar(struct vkd3d_dxbc_compiler *compiler,
|
||||
const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask,
|
||||
const struct vkd3d_shader_register_info *reg_info)
|
||||
|
|
@ -3149,7 +3204,7 @@ static uint32_t vkd3d_dxbc_compiler_emit_load_scalar(struct vkd3d_dxbc_compiler
|
|||
enum vkd3d_component_type component_type;
|
||||
unsigned int skipped_component_mask;
|
||||
|
||||
assert(reg->type != VKD3DSPR_IMMCONST);
|
||||
assert(reg->type != VKD3DSPR_IMMCONST && reg->type != VKD3DSPR_IMMCONST64);
|
||||
assert(vkd3d_write_mask_component_count(write_mask) == 1);
|
||||
|
||||
component_idx = vkd3d_write_mask_get_component_idx(write_mask);
|
||||
|
|
@ -3235,8 +3290,11 @@ static uint32_t vkd3d_dxbc_compiler_emit_load_constant_buffer(struct vkd3d_dxbc_
|
|||
}
|
||||
else
|
||||
{
|
||||
uint32_t values[2] = { 0, 0 };
|
||||
unsigned int dword_count = vkd3d_spirv_get_type_dword_count(
|
||||
register_info->component_type, 1);
|
||||
WARN("Root constant index out of bounds: cb %u, member %u\n", reg->idx[0].offset, index);
|
||||
component_ids[j++] = vkd3d_spirv_get_op_constant(builder, type_id, 0);
|
||||
component_ids[j++] = vkd3d_spirv_get_op_constant(builder, type_id, values, dword_count);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
|
@ -3276,6 +3334,8 @@ static uint32_t vkd3d_dxbc_compiler_emit_load_reg(struct vkd3d_dxbc_compiler *co
|
|||
|
||||
if (reg->type == VKD3DSPR_IMMCONST)
|
||||
return vkd3d_dxbc_compiler_emit_load_constant(compiler, reg, swizzle, write_mask);
|
||||
else if (reg->type == VKD3DSPR_IMMCONST64)
|
||||
return vkd3d_dxbc_compiler_emit_load_constant64(compiler, reg, swizzle, write_mask);
|
||||
|
||||
component_count = vkd3d_write_mask_component_count(write_mask);
|
||||
component_type = vkd3d_component_type_from_data_type(reg->data_type);
|
||||
|
|
@ -3316,6 +3376,9 @@ static uint32_t vkd3d_dxbc_compiler_emit_load_reg(struct vkd3d_dxbc_compiler *co
|
|||
|
||||
if (component_type != reg_info.component_type)
|
||||
{
|
||||
if (component_type == VKD3D_TYPE_DOUBLE)
|
||||
component_count /= 2;
|
||||
|
||||
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
||||
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
||||
}
|
||||
|
|
@ -3485,7 +3548,7 @@ static void vkd3d_dxbc_compiler_emit_store_reg(struct vkd3d_dxbc_compiler *compi
|
|||
enum vkd3d_component_type component_type;
|
||||
uint32_t type_id;
|
||||
|
||||
assert(reg->type != VKD3DSPR_IMMCONST);
|
||||
assert(reg->type != VKD3DSPR_IMMCONST && reg->type != VKD3DSPR_IMMCONST64);
|
||||
|
||||
if (!vkd3d_dxbc_compiler_get_register_info(compiler, reg, ®_info))
|
||||
return;
|
||||
|
|
@ -3495,6 +3558,10 @@ static void vkd3d_dxbc_compiler_emit_store_reg(struct vkd3d_dxbc_compiler *compi
|
|||
if (component_type != reg_info.component_type)
|
||||
{
|
||||
unsigned int component_count = vkd3d_write_mask_component_count(write_mask);
|
||||
|
||||
if (reg_info.component_type == VKD3D_TYPE_DOUBLE)
|
||||
component_count /= 2;
|
||||
|
||||
type_id = vkd3d_spirv_get_type_id(builder, reg_info.component_type, component_count);
|
||||
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
||||
component_type = reg_info.component_type;
|
||||
|
|
@ -4460,6 +4527,35 @@ static unsigned int vkd3d_dxbc_compiler_get_output_variable_index(
|
|||
return register_idx;
|
||||
}
|
||||
|
||||
static DWORD vkd3d_dxbc_compiler_double_source_mask_fixup(enum vkd3d_data_type src, enum vkd3d_data_type dst, DWORD mask)
|
||||
{
|
||||
if (src == dst)
|
||||
return mask;
|
||||
|
||||
if (src == VKD3D_DATA_DOUBLE)
|
||||
{
|
||||
unsigned int component_count = vkd3d_write_mask_component_count(mask);
|
||||
if (component_count >= 2)
|
||||
return VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1 | VKD3DSP_WRITEMASK_2 | VKD3DSP_WRITEMASK_3;
|
||||
else if (component_count == 1)
|
||||
return VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
else if (dst == VKD3D_DATA_DOUBLE)
|
||||
{
|
||||
unsigned int component_count = vkd3d_write_mask_component_count(mask);
|
||||
if (component_count >= 3)
|
||||
return VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1;
|
||||
else if (component_count >= 1)
|
||||
return VKD3DSP_WRITEMASK_0;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
return mask;
|
||||
}
|
||||
|
||||
static unsigned int get_shader_output_swizzle(const struct vkd3d_dxbc_compiler *compiler,
|
||||
unsigned int register_idx)
|
||||
{
|
||||
|
|
@ -5310,6 +5406,7 @@ static size_t vkd3d_dxbc_compiler_get_current_function_location(struct vkd3d_dxb
|
|||
static void vkd3d_dxbc_compiler_emit_dcl_global_flags(struct vkd3d_dxbc_compiler *compiler,
|
||||
const struct vkd3d_shader_instruction *instruction)
|
||||
{
|
||||
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
||||
unsigned int flags = instruction->flags;
|
||||
|
||||
if (flags & VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL)
|
||||
|
|
@ -5318,6 +5415,12 @@ static void vkd3d_dxbc_compiler_emit_dcl_global_flags(struct vkd3d_dxbc_compiler
|
|||
flags &= ~VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL;
|
||||
}
|
||||
|
||||
if ((flags & VKD3DSGF_ENABLE_DOUBLE_PRECISION_FLOAT_OPS) || (flags & VKD3DSGF_ENABLE_11_1_DOUBLE_EXTENSIONS))
|
||||
{
|
||||
vkd3d_spirv_enable_capability(builder, SpvCapabilityFloat64);
|
||||
flags &= ~(VKD3DSGF_ENABLE_DOUBLE_PRECISION_FLOAT_OPS | VKD3DSGF_ENABLE_11_1_DOUBLE_EXTENSIONS);
|
||||
}
|
||||
|
||||
if (flags & ~(VKD3DSGF_REFACTORING_ALLOWED | VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS))
|
||||
FIXME("Unhandled global flags %#x.\n", flags);
|
||||
else
|
||||
|
|
@ -6641,10 +6744,12 @@ static SpvOp vkd3d_dxbc_compiler_map_alu_instruction(const struct vkd3d_shader_i
|
|||
}
|
||||
alu_ops[] =
|
||||
{
|
||||
{VKD3DSIH_DADD, SpvOpFAdd},
|
||||
{VKD3DSIH_ADD, SpvOpFAdd},
|
||||
{VKD3DSIH_AND, SpvOpBitwiseAnd},
|
||||
{VKD3DSIH_BFREV, SpvOpBitReverse},
|
||||
{VKD3DSIH_COUNTBITS, SpvOpBitCount},
|
||||
{VKD3DSIH_DDIV, SpvOpFDiv},
|
||||
{VKD3DSIH_DIV, SpvOpFDiv},
|
||||
{VKD3DSIH_FTOI, SpvOpConvertFToS},
|
||||
{VKD3DSIH_FTOU, SpvOpConvertFToU},
|
||||
|
|
@ -6653,6 +6758,7 @@ static SpvOp vkd3d_dxbc_compiler_map_alu_instruction(const struct vkd3d_shader_i
|
|||
{VKD3DSIH_ISHL, SpvOpShiftLeftLogical},
|
||||
{VKD3DSIH_ISHR, SpvOpShiftRightArithmetic},
|
||||
{VKD3DSIH_ITOF, SpvOpConvertSToF},
|
||||
{VKD3DSIH_DMUL, SpvOpFMul},
|
||||
{VKD3DSIH_MUL, SpvOpFMul},
|
||||
{VKD3DSIH_NOT, SpvOpNot},
|
||||
{VKD3DSIH_OR, SpvOpBitwiseOr},
|
||||
|
|
@ -6721,8 +6827,11 @@ static enum GLSLstd450 vkd3d_dxbc_compiler_map_ext_glsl_instruction(
|
|||
{VKD3DSIH_IMAX, GLSLstd450SMax},
|
||||
{VKD3DSIH_IMIN, GLSLstd450SMin},
|
||||
{VKD3DSIH_LOG, GLSLstd450Log2},
|
||||
{VKD3DSIH_DFMA, GLSLstd450Fma},
|
||||
{VKD3DSIH_MAD, GLSLstd450Fma},
|
||||
{VKD3DSIH_DMAX, GLSLstd450NMax},
|
||||
{VKD3DSIH_MAX, GLSLstd450NMax},
|
||||
{VKD3DSIH_DMIN, GLSLstd450NMin},
|
||||
{VKD3DSIH_MIN, GLSLstd450NMin},
|
||||
{VKD3DSIH_ROUND_NE, GLSLstd450RoundEven},
|
||||
{VKD3DSIH_ROUND_NI, GLSLstd450Floor},
|
||||
|
|
@ -6805,13 +6914,21 @@ static void vkd3d_dxbc_compiler_emit_movc(struct vkd3d_dxbc_compiler *compiler,
|
|||
const struct vkd3d_shader_src_param *src = instruction->src;
|
||||
uint32_t condition_id, src1_id, src2_id, type_id, val_id;
|
||||
unsigned int component_count;
|
||||
DWORD condition_mask;
|
||||
|
||||
condition_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
|
||||
condition_mask = vkd3d_dxbc_compiler_double_source_mask_fixup(src[0].reg.data_type, dst->reg.data_type, dst->write_mask);
|
||||
condition_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], condition_mask);
|
||||
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
|
||||
src2_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[2], dst->write_mask);
|
||||
|
||||
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, component_count);
|
||||
if (instruction->handler_idx == VKD3DSIH_DMOVC)
|
||||
{
|
||||
component_count /= 2;
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_DOUBLE, component_count);
|
||||
}
|
||||
else
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, component_count);
|
||||
|
||||
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
|
||||
VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, condition_id);
|
||||
|
|
@ -6891,15 +7008,23 @@ static void vkd3d_dxbc_compiler_emit_rcp(struct vkd3d_dxbc_compiler *compiler,
|
|||
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
||||
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
||||
const struct vkd3d_shader_src_param *src = instruction->src;
|
||||
uint32_t type_id, src_id, val_id;
|
||||
uint32_t type_id, src_id, val_id, one_id;
|
||||
unsigned int component_count;
|
||||
|
||||
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
||||
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst);
|
||||
|
||||
if (instruction->handler_idx == VKD3DSIH_DRCP)
|
||||
{
|
||||
component_count /= 2;
|
||||
one_id = vkd3d_dxbc_compiler_get_constant_double_vector(compiler, 1.0, component_count);
|
||||
}
|
||||
else
|
||||
one_id = vkd3d_dxbc_compiler_get_constant_float_vector(compiler, 1.0f, component_count);
|
||||
|
||||
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, dst->write_mask);
|
||||
val_id = vkd3d_spirv_build_op_fdiv(builder, type_id,
|
||||
vkd3d_dxbc_compiler_get_constant_float_vector(compiler, 1.0f, component_count), src_id);
|
||||
one_id, src_id);
|
||||
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
||||
}
|
||||
|
||||
|
|
@ -6972,7 +7097,10 @@ static void vkd3d_dxbc_compiler_emit_imad(struct vkd3d_dxbc_compiler *compiler,
|
|||
unsigned int i, component_count;
|
||||
|
||||
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_INT, component_count);
|
||||
if (instruction->handler_idx == VKD3DSIH_UMAD)
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, component_count);
|
||||
else
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_INT, component_count);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(src_ids); ++i)
|
||||
src_ids[i] = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[i], dst->write_mask);
|
||||
|
|
@ -7167,17 +7295,22 @@ static void vkd3d_dxbc_compiler_emit_comparison_instruction(struct vkd3d_dxbc_co
|
|||
const struct vkd3d_shader_src_param *src = instruction->src;
|
||||
uint32_t src0_id, src1_id, type_id, result_id;
|
||||
unsigned int component_count;
|
||||
DWORD src_mask;
|
||||
SpvOp op;
|
||||
|
||||
switch (instruction->handler_idx)
|
||||
{
|
||||
case VKD3DSIH_DEQ:
|
||||
case VKD3DSIH_EQ: op = SpvOpFOrdEqual; break;
|
||||
case VKD3DSIH_DGE:
|
||||
case VKD3DSIH_GE: op = SpvOpFOrdGreaterThanEqual; break;
|
||||
case VKD3DSIH_IEQ: op = SpvOpIEqual; break;
|
||||
case VKD3DSIH_IGE: op = SpvOpSGreaterThanEqual; break;
|
||||
case VKD3DSIH_ILT: op = SpvOpSLessThan; break;
|
||||
case VKD3DSIH_INE: op = SpvOpINotEqual; break;
|
||||
case VKD3DSIH_DLT:
|
||||
case VKD3DSIH_LT: op = SpvOpFOrdLessThan; break;
|
||||
case VKD3DSIH_DNE:
|
||||
case VKD3DSIH_NE: op = SpvOpFUnordNotEqual; break;
|
||||
case VKD3DSIH_UGE: op = SpvOpUGreaterThanEqual; break;
|
||||
case VKD3DSIH_ULT: op = SpvOpULessThan; break;
|
||||
|
|
@ -7188,8 +7321,9 @@ static void vkd3d_dxbc_compiler_emit_comparison_instruction(struct vkd3d_dxbc_co
|
|||
|
||||
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
||||
|
||||
src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
|
||||
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
|
||||
src_mask = vkd3d_dxbc_compiler_double_source_mask_fixup(src->reg.data_type, dst->reg.data_type, dst->write_mask);
|
||||
src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], src_mask);
|
||||
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], src_mask);
|
||||
|
||||
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_BOOL, component_count);
|
||||
result_id = vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
||||
|
|
@ -9169,6 +9303,11 @@ static void vkd3d_dxbc_compiler_emit_eval_attrib(struct vkd3d_dxbc_compiler *com
|
|||
{
|
||||
op = GLSLstd450InterpolateAtCentroid;
|
||||
}
|
||||
else if (instruction->handler_idx == VKD3DSIH_EVAL_SNAPPED)
|
||||
{
|
||||
op = GLSLstd450InterpolateAtOffset;
|
||||
src_ids[src_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1);
|
||||
}
|
||||
else
|
||||
{
|
||||
assert(instruction->handler_idx == VKD3DSIH_EVAL_SAMPLE_INDEX);
|
||||
|
|
@ -9237,7 +9376,7 @@ static void vkd3d_dxbc_compiler_emit_emit_stream(struct vkd3d_dxbc_compiler *com
|
|||
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
||||
unsigned int stream_idx;
|
||||
|
||||
if (instruction->handler_idx == VKD3DSIH_EMIT_STREAM)
|
||||
if (instruction->handler_idx == VKD3DSIH_EMIT_STREAM || instruction->handler_idx == VKD3DSIH_EMIT_THEN_CUT_STREAM)
|
||||
stream_idx = instruction->src[0].reg.idx[0].offset;
|
||||
else
|
||||
stream_idx = 0;
|
||||
|
|
@ -9258,7 +9397,7 @@ static void vkd3d_dxbc_compiler_emit_cut_stream(struct vkd3d_dxbc_compiler *comp
|
|||
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
||||
unsigned int stream_idx;
|
||||
|
||||
if (instruction->handler_idx == VKD3DSIH_CUT_STREAM)
|
||||
if (instruction->handler_idx == VKD3DSIH_CUT_STREAM || instruction->handler_idx == VKD3DSIH_EMIT_THEN_CUT_STREAM)
|
||||
stream_idx = instruction->src[0].reg.idx[0].offset;
|
||||
else
|
||||
stream_idx = 0;
|
||||
|
|
@ -9290,6 +9429,47 @@ static void vkd3d_dxbc_compiler_emit_check_sparse_access(struct vkd3d_dxbc_compi
|
|||
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
||||
}
|
||||
|
||||
static void vkd3d_dxbc_compiler_emit_double_conversion(struct vkd3d_dxbc_compiler *compiler,
|
||||
const struct vkd3d_shader_instruction *instruction)
|
||||
{
|
||||
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
||||
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
||||
const struct vkd3d_shader_src_param *src = instruction->src;
|
||||
enum vkd3d_component_type component_type;
|
||||
uint32_t src_id, val_id, type_id;
|
||||
unsigned int component_count;
|
||||
DWORD src_mask;
|
||||
SpvOp op;
|
||||
|
||||
switch (instruction->handler_idx)
|
||||
{
|
||||
case VKD3DSIH_DTOF:
|
||||
case VKD3DSIH_FTOD: op = SpvOpFConvert; break;
|
||||
case VKD3DSIH_DTOI: op = SpvOpConvertFToS; break;
|
||||
case VKD3DSIH_DTOU: op = SpvOpConvertFToU; break;
|
||||
case VKD3DSIH_ITOD: op = SpvOpConvertSToF; break;
|
||||
case VKD3DSIH_UTOD: op = SpvOpConvertUToF; break;
|
||||
default:
|
||||
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
||||
return;
|
||||
}
|
||||
|
||||
src_mask = vkd3d_dxbc_compiler_double_source_mask_fixup(src->reg.data_type, dst->reg.data_type, dst->write_mask);
|
||||
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, src_mask);
|
||||
|
||||
component_type = vkd3d_component_type_from_data_type(dst->reg.data_type);
|
||||
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
||||
if (component_type == VKD3D_TYPE_DOUBLE)
|
||||
component_count /= 2;
|
||||
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
||||
|
||||
val_id = vkd3d_spirv_build_op_trv(builder, &builder->function_stream,
|
||||
op, type_id, &src_id, 1);
|
||||
|
||||
//vkd3d_dxbc_compiler_emit_store_reg(compiler, &dst->reg, , val_id);
|
||||
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
||||
}
|
||||
|
||||
/* This function is called after declarations are processed. */
|
||||
static void vkd3d_dxbc_compiler_emit_main_prolog(struct vkd3d_dxbc_compiler *compiler)
|
||||
{
|
||||
|
|
@ -9419,19 +9599,23 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
case VKD3DSIH_HS_JOIN_PHASE:
|
||||
vkd3d_dxbc_compiler_enter_shader_phase(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_DMOV:
|
||||
case VKD3DSIH_MOV:
|
||||
vkd3d_dxbc_compiler_emit_mov(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_DMOVC:
|
||||
case VKD3DSIH_MOVC:
|
||||
vkd3d_dxbc_compiler_emit_movc(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_SWAPC:
|
||||
vkd3d_dxbc_compiler_emit_swapc(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_DADD:
|
||||
case VKD3DSIH_ADD:
|
||||
case VKD3DSIH_AND:
|
||||
case VKD3DSIH_BFREV:
|
||||
case VKD3DSIH_COUNTBITS:
|
||||
case VKD3DSIH_DDIV:
|
||||
case VKD3DSIH_DIV:
|
||||
case VKD3DSIH_FTOI:
|
||||
case VKD3DSIH_FTOU:
|
||||
|
|
@ -9440,6 +9624,7 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
case VKD3DSIH_ISHL:
|
||||
case VKD3DSIH_ISHR:
|
||||
case VKD3DSIH_ITOF:
|
||||
case VKD3DSIH_DMUL:
|
||||
case VKD3DSIH_MUL:
|
||||
case VKD3DSIH_NOT:
|
||||
case VKD3DSIH_OR:
|
||||
|
|
@ -9456,8 +9641,11 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
case VKD3DSIH_IMAX:
|
||||
case VKD3DSIH_IMIN:
|
||||
case VKD3DSIH_LOG:
|
||||
case VKD3DSIH_DFMA:
|
||||
case VKD3DSIH_MAD:
|
||||
case VKD3DSIH_DMAX:
|
||||
case VKD3DSIH_MAX:
|
||||
case VKD3DSIH_DMIN:
|
||||
case VKD3DSIH_MIN:
|
||||
case VKD3DSIH_ROUND_NE:
|
||||
case VKD3DSIH_ROUND_NI:
|
||||
|
|
@ -9474,28 +9662,35 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
case VKD3DSIH_DP2:
|
||||
vkd3d_dxbc_compiler_emit_dot(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_DRCP:
|
||||
case VKD3DSIH_RCP:
|
||||
vkd3d_dxbc_compiler_emit_rcp(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_SINCOS:
|
||||
vkd3d_dxbc_compiler_emit_sincos(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_UMUL:
|
||||
case VKD3DSIH_IMUL:
|
||||
vkd3d_dxbc_compiler_emit_imul(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_UMAD:
|
||||
case VKD3DSIH_IMAD:
|
||||
vkd3d_dxbc_compiler_emit_imad(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_UDIV:
|
||||
vkd3d_dxbc_compiler_emit_udiv(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_DEQ:
|
||||
case VKD3DSIH_EQ:
|
||||
case VKD3DSIH_DGE:
|
||||
case VKD3DSIH_GE:
|
||||
case VKD3DSIH_IEQ:
|
||||
case VKD3DSIH_IGE:
|
||||
case VKD3DSIH_ILT:
|
||||
case VKD3DSIH_INE:
|
||||
case VKD3DSIH_DLT:
|
||||
case VKD3DSIH_LT:
|
||||
case VKD3DSIH_DNE:
|
||||
case VKD3DSIH_NE:
|
||||
case VKD3DSIH_UGE:
|
||||
case VKD3DSIH_ULT:
|
||||
|
|
@ -9629,6 +9824,7 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
break;
|
||||
case VKD3DSIH_EVAL_CENTROID:
|
||||
case VKD3DSIH_EVAL_SAMPLE_INDEX:
|
||||
case VKD3DSIH_EVAL_SNAPPED:
|
||||
vkd3d_dxbc_compiler_emit_eval_attrib(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_SYNC:
|
||||
|
|
@ -9638,6 +9834,11 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
case VKD3DSIH_EMIT_STREAM:
|
||||
vkd3d_dxbc_compiler_emit_emit_stream(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_EMIT_THEN_CUT:
|
||||
case VKD3DSIH_EMIT_THEN_CUT_STREAM:
|
||||
vkd3d_dxbc_compiler_emit_emit_stream(compiler, instruction);
|
||||
vkd3d_dxbc_compiler_emit_cut_stream(compiler, instruction);
|
||||
break;
|
||||
case VKD3DSIH_CUT:
|
||||
case VKD3DSIH_CUT_STREAM:
|
||||
vkd3d_dxbc_compiler_emit_cut_stream(compiler, instruction);
|
||||
|
|
@ -9650,6 +9851,14 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|||
case VKD3DSIH_NOP:
|
||||
/* nothing to do */
|
||||
break;
|
||||
case VKD3DSIH_DTOF:
|
||||
case VKD3DSIH_FTOD:
|
||||
case VKD3DSIH_DTOI:
|
||||
case VKD3DSIH_DTOU:
|
||||
case VKD3DSIH_ITOD:
|
||||
case VKD3DSIH_UTOD:
|
||||
vkd3d_dxbc_compiler_emit_double_conversion(compiler, instruction);
|
||||
break;
|
||||
default:
|
||||
FIXME("Unhandled instruction %#x.\n", instruction->handler_idx);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -117,13 +117,16 @@ static const char * const shader_opcode_names[] =
|
|||
/* VKD3DSIH_DSY_FINE */ "deriv_rty_fine",
|
||||
/* VKD3DSIH_ELSE */ "else",
|
||||
/* VKD3DSIH_EMIT */ "emit",
|
||||
/* VKD3DSIH_EMIT_THEN_CUT */ "emit_then_cut",
|
||||
/* VKD3DSIH_EMIT_STREAM */ "emit_stream",
|
||||
/* VKD3DSIH_EMIT_THEN_CUT_STREAM */ "emit_then_cut_stream",
|
||||
/* VKD3DSIH_ENDIF */ "endif",
|
||||
/* VKD3DSIH_ENDLOOP */ "endloop",
|
||||
/* VKD3DSIH_ENDSWITCH */ "endswitch",
|
||||
/* VKD3DSIH_EQ */ "eq",
|
||||
/* VKD3DSIH_EVAL_CENTROID */ "eval_centroid",
|
||||
/* VKD3DSIH_EVAL_SAMPLE_INDEX */ "eval_sample_index",
|
||||
/* VKD3DSIH_EVAL_SNAPPED */ "eval_snapped",
|
||||
/* VKD3DSIH_EXP */ "exp",
|
||||
/* VKD3DSIH_F16TOF32 */ "f16tof32",
|
||||
/* VKD3DSIH_F32TOF16 */ "f32tof16",
|
||||
|
|
@ -230,6 +233,7 @@ static const char * const shader_opcode_names[] =
|
|||
/* VKD3DSIH_UMAX */ "umax",
|
||||
/* VKD3DSIH_UMIN */ "umin",
|
||||
/* VKD3DSIH_UMUL */ "umul",
|
||||
/* VKD3DSIH_UMAD */ "umad",
|
||||
/* VKD3DSIH_USHR */ "ushr",
|
||||
/* VKD3DSIH_UTOF */ "utof",
|
||||
/* VKD3DSIH_XOR */ "xor",
|
||||
|
|
@ -354,6 +358,8 @@ static void shader_dump_global_flags(struct vkd3d_string_buffer *buffer, DWORD g
|
|||
{VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL, "forceEarlyDepthStencil"},
|
||||
{VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS, "enableRawAndStructuredBuffers"},
|
||||
{VKD3DSGF_ENABLE_MINIMUM_PRECISION, "enableMinimumPrecision"},
|
||||
{VKD3DSGF_ENABLE_DOUBLE_PRECISION_FLOAT_OPS, "enableDoublePrecisionFloatOps"},
|
||||
{VKD3DSGF_ENABLE_11_1_DOUBLE_EXTENSIONS, "enable11_1DoubleExtensions"},
|
||||
};
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(global_flag_info); ++i)
|
||||
|
|
@ -661,6 +667,10 @@ static void shader_dump_register(struct vkd3d_string_buffer *buffer,
|
|||
shader_addline(buffer, "l");
|
||||
break;
|
||||
|
||||
case VKD3DSPR_IMMCONST64:
|
||||
shader_addline(buffer, "d");
|
||||
break;
|
||||
|
||||
case VKD3DSPR_CONSTBUFFER:
|
||||
shader_addline(buffer, "cb");
|
||||
break;
|
||||
|
|
@ -827,6 +837,42 @@ static void shader_dump_register(struct vkd3d_string_buffer *buffer,
|
|||
}
|
||||
shader_addline(buffer, ")");
|
||||
}
|
||||
else if (reg->type == VKD3DSPR_IMMCONST64)
|
||||
{
|
||||
shader_addline(buffer, "(");
|
||||
switch (reg->immconst_type)
|
||||
{
|
||||
case VKD3D_IMMCONST_SCALAR:
|
||||
switch (reg->data_type)
|
||||
{
|
||||
case VKD3D_DATA_DOUBLE:
|
||||
shader_addline(buffer, "%f", reg->immconst_double[0]);
|
||||
break;
|
||||
default:
|
||||
shader_addline(buffer, "<unhandled data type %#x>", reg->data_type);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case VKD3D_IMMCONST_VEC4:
|
||||
switch (reg->data_type)
|
||||
{
|
||||
case VKD3D_DATA_DOUBLE:
|
||||
shader_addline(buffer, "%f, %f",
|
||||
reg->immconst_double[0], reg->immconst_double[1]);
|
||||
break;
|
||||
default:
|
||||
shader_addline(buffer, "<unhandled data type %#x>", reg->data_type);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
shader_addline(buffer, "<unhandled immconst_type %#x>", reg->immconst_type);
|
||||
break;
|
||||
}
|
||||
shader_addline(buffer, ")");
|
||||
}
|
||||
else if (reg->type != VKD3DSPR_NULL)
|
||||
{
|
||||
if (offset != ~0u)
|
||||
|
|
|
|||
|
|
@ -140,13 +140,16 @@ enum VKD3D_SHADER_INSTRUCTION_HANDLER
|
|||
VKD3DSIH_DSY_FINE,
|
||||
VKD3DSIH_ELSE,
|
||||
VKD3DSIH_EMIT,
|
||||
VKD3DSIH_EMIT_THEN_CUT,
|
||||
VKD3DSIH_EMIT_STREAM,
|
||||
VKD3DSIH_EMIT_THEN_CUT_STREAM,
|
||||
VKD3DSIH_ENDIF,
|
||||
VKD3DSIH_ENDLOOP,
|
||||
VKD3DSIH_ENDSWITCH,
|
||||
VKD3DSIH_EQ,
|
||||
VKD3DSIH_EVAL_CENTROID,
|
||||
VKD3DSIH_EVAL_SAMPLE_INDEX,
|
||||
VKD3DSIH_EVAL_SNAPPED,
|
||||
VKD3DSIH_EXP,
|
||||
VKD3DSIH_F16TOF32,
|
||||
VKD3DSIH_F32TOF16,
|
||||
|
|
@ -268,10 +271,31 @@ enum VKD3D_SHADER_INSTRUCTION_HANDLER
|
|||
VKD3DSIH_UMAX,
|
||||
VKD3DSIH_UMIN,
|
||||
VKD3DSIH_UMUL,
|
||||
VKD3DSIH_UMAD,
|
||||
VKD3DSIH_USHR,
|
||||
VKD3DSIH_UTOF,
|
||||
VKD3DSIH_XOR,
|
||||
|
||||
VKD3DSIH_DADD,
|
||||
VKD3DSIH_DMAX,
|
||||
VKD3DSIH_DMIN,
|
||||
VKD3DSIH_DMUL,
|
||||
VKD3DSIH_DEQ,
|
||||
VKD3DSIH_DGE,
|
||||
VKD3DSIH_DLT,
|
||||
VKD3DSIH_DNE,
|
||||
VKD3DSIH_DMOV,
|
||||
VKD3DSIH_DMOVC,
|
||||
VKD3DSIH_DTOF,
|
||||
VKD3DSIH_FTOD,
|
||||
VKD3DSIH_DDIV,
|
||||
VKD3DSIH_DFMA,
|
||||
VKD3DSIH_DRCP,
|
||||
VKD3DSIH_DTOI,
|
||||
VKD3DSIH_DTOU,
|
||||
VKD3DSIH_ITOD,
|
||||
VKD3DSIH_UTOD,
|
||||
|
||||
VKD3DSIH_INVALID,
|
||||
};
|
||||
|
||||
|
|
@ -284,6 +308,7 @@ enum vkd3d_shader_register_type
|
|||
VKD3DSPR_DEPTHOUT,
|
||||
VKD3DSPR_SAMPLER,
|
||||
VKD3DSPR_IMMCONST,
|
||||
VKD3DSPR_IMMCONST64,
|
||||
VKD3DSPR_CONSTBUFFER,
|
||||
VKD3DSPR_IMMCONSTBUFFER,
|
||||
VKD3DSPR_PRIMID,
|
||||
|
|
@ -343,6 +368,7 @@ enum vkd3d_data_type
|
|||
VKD3D_DATA_UNORM,
|
||||
VKD3D_DATA_SNORM,
|
||||
VKD3D_DATA_OPAQUE,
|
||||
VKD3D_DATA_DOUBLE,
|
||||
};
|
||||
|
||||
enum vkd3d_immconst_type
|
||||
|
|
@ -392,9 +418,12 @@ enum vkd3d_shader_interpolation_mode
|
|||
enum vkd3d_shader_global_flags
|
||||
{
|
||||
VKD3DSGF_REFACTORING_ALLOWED = 0x01,
|
||||
VKD3DSGF_ENABLE_DOUBLE_PRECISION_FLOAT_OPS = 0x02,
|
||||
VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL = 0x04,
|
||||
VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS = 0x08,
|
||||
VKD3DSGF_ENABLE_MINIMUM_PRECISION = 0x20
|
||||
VKD3DSGF_ENABLE_MINIMUM_PRECISION = 0x20,
|
||||
VKD3DSGF_ENABLE_11_1_DOUBLE_EXTENSIONS = 0x40,
|
||||
|
||||
};
|
||||
|
||||
enum vkd3d_shader_sync_flags
|
||||
|
|
@ -508,6 +537,8 @@ struct vkd3d_shader_register
|
|||
{
|
||||
uint32_t immconst_uint[VKD3D_VEC4_SIZE];
|
||||
float immconst_float[VKD3D_VEC4_SIZE];
|
||||
uint64_t immconst_uint64[2];
|
||||
double immconst_double[2];
|
||||
unsigned fp_body_idx;
|
||||
};
|
||||
};
|
||||
|
|
@ -778,6 +809,8 @@ static inline enum vkd3d_component_type vkd3d_component_type_from_data_type(
|
|||
return VKD3D_TYPE_UINT;
|
||||
case VKD3D_DATA_INT:
|
||||
return VKD3D_TYPE_INT;
|
||||
case VKD3D_DATA_DOUBLE:
|
||||
return VKD3D_TYPE_DOUBLE;
|
||||
default:
|
||||
FIXME("Unhandled data type %#x.\n", data_type);
|
||||
return VKD3D_TYPE_UINT;
|
||||
|
|
@ -795,6 +828,8 @@ static inline enum vkd3d_data_type vkd3d_data_type_from_component_type(
|
|||
return VKD3D_DATA_UINT;
|
||||
case VKD3D_TYPE_INT:
|
||||
return VKD3D_DATA_INT;
|
||||
case VKD3D_TYPE_DOUBLE:
|
||||
return VKD3D_DATA_DOUBLE;
|
||||
default:
|
||||
FIXME("Unhandled component type %#x.\n", component_type);
|
||||
return VKD3D_DATA_FLOAT;
|
||||
|
|
|
|||
|
|
@ -9762,6 +9762,22 @@ static void test_shader_instructions(void)
|
|||
0x00100e46, 0x00000001, 0x0100003e,
|
||||
};
|
||||
static struct named_shader ps_swapc5 = {"swapc5", ps_swapc5_code, sizeof(ps_swapc5_code)};
|
||||
static const DWORD ps_double_code[] =
|
||||
{
|
||||
#if 0
|
||||
double2 src0;
|
||||
double2 src1;
|
||||
float4 src2;
|
||||
|
||||
void main(out float4 dst : SV_Target)
|
||||
{
|
||||
double2 tmp = src0 + src1;
|
||||
|
||||
dst.xyzw = tmp.xyxy;
|
||||
}
|
||||
#endif
|
||||
};
|
||||
static struct named_shader ps_double = {"double", ps_double_code, sizeof(ps_double_code)};
|
||||
static const struct
|
||||
{
|
||||
const struct named_shader *ps;
|
||||
|
|
@ -9998,6 +10014,12 @@ static void test_shader_instructions(void)
|
|||
struct vec4 src1;
|
||||
struct vec4 src2;
|
||||
} f;
|
||||
struct
|
||||
{
|
||||
struct dvec2 src0;
|
||||
struct dvec2 src1;
|
||||
struct vec4 src2;
|
||||
} d;
|
||||
} input;
|
||||
union
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue