vkd3d: Rework d3d12_command_list_ResourceBarrier.
Signed-off-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
This commit is contained in:
parent
5bb613ac07
commit
8d9d23a9f9
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@ -1959,223 +1959,6 @@ static void vk_access_and_stage_flags_from_d3d12_resource_state(const struct d3d
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FIXME("Unhandled resource state %#x.\n", unhandled_state);
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}
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static bool vk_barrier_parameters_from_d3d12_resource_state(struct d3d12_device *device, unsigned int state,
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unsigned int stencil_state, const struct d3d12_resource *resource, VkQueueFlags vk_queue_flags,
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VkAccessFlags *access_mask, VkPipelineStageFlags *stage_flags, VkImageLayout *image_layout)
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{
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bool is_swapchain_image = resource && (resource->flags & VKD3D_RESOURCE_PRESENT_STATE_TRANSITION);
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VkPipelineStageFlags queue_shader_stages = 0;
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if (vk_queue_flags & VK_QUEUE_GRAPHICS_BIT)
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{
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queue_shader_stages |= VK_PIPELINE_STAGE_VERTEX_SHADER_BIT
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| VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT
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| VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT
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| VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT
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| VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT;
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}
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if (vk_queue_flags & VK_QUEUE_COMPUTE_BIT)
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queue_shader_stages |= VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT;
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switch (state)
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{
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case D3D12_RESOURCE_STATE_COMMON: /* D3D12_RESOURCE_STATE_PRESENT */
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/* The COMMON state is used for ownership transfer between
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* DIRECT/COMPUTE and COPY queues. Additionally, a texture has to
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* be in the COMMON state to be accessed by CPU. Moreover,
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* resources can be implicitly promoted to other states out of the
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* COMMON state, and the resource state can decay to the COMMON
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* state when GPU finishes execution of a command list. */
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if (is_swapchain_image)
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{
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if (resource->present_state == D3D12_RESOURCE_STATE_PRESENT)
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{
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*access_mask = VK_ACCESS_MEMORY_READ_BIT;
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*stage_flags = VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_PRESENT_SRC_KHR;
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return true;
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}
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else if (resource->present_state != D3D12_RESOURCE_STATE_COMMON)
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{
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vk_barrier_parameters_from_d3d12_resource_state(device, resource->present_state, 0,
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resource, vk_queue_flags, access_mask, stage_flags, image_layout);
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return true;
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}
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}
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*access_mask = VK_ACCESS_HOST_READ_BIT | VK_ACCESS_HOST_WRITE_BIT;
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*stage_flags = VK_PIPELINE_STAGE_HOST_BIT;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_GENERAL;
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return true;
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/* Handle write states. */
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case D3D12_RESOURCE_STATE_RENDER_TARGET:
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*access_mask = VK_ACCESS_COLOR_ATTACHMENT_READ_BIT
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| VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT;
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*stage_flags = VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
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return true;
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case D3D12_RESOURCE_STATE_UNORDERED_ACCESS:
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*access_mask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
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*stage_flags = queue_shader_stages;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_GENERAL;
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return true;
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case D3D12_RESOURCE_STATE_DEPTH_WRITE:
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*access_mask = VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT
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| VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
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*stage_flags = VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT
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| VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT;
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if (image_layout)
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{
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if (!stencil_state || (stencil_state & D3D12_RESOURCE_STATE_DEPTH_WRITE))
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*image_layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
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else
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*image_layout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL;
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}
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return true;
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case D3D12_RESOURCE_STATE_COPY_DEST:
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case D3D12_RESOURCE_STATE_RESOLVE_DEST:
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*access_mask = VK_ACCESS_TRANSFER_WRITE_BIT;
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*stage_flags = VK_PIPELINE_STAGE_TRANSFER_BIT;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL;
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return true;
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case D3D12_RESOURCE_STATE_STREAM_OUT:
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*access_mask = VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT
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| VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT
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| VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT;
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*stage_flags = VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT
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| VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_UNDEFINED;
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return true;
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/* Set the Vulkan image layout for read-only states. */
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case D3D12_RESOURCE_STATE_DEPTH_READ:
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case D3D12_RESOURCE_STATE_DEPTH_READ | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE:
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case D3D12_RESOURCE_STATE_DEPTH_READ | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE:
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case D3D12_RESOURCE_STATE_DEPTH_READ | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE
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| D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE:
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*access_mask = 0;
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*stage_flags = 0;
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if (image_layout)
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{
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if (stencil_state & D3D12_RESOURCE_STATE_DEPTH_WRITE)
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{
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*image_layout = VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL;
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*access_mask |= VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
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}
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else
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{
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*image_layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL;
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}
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}
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break;
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case D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE:
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case D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE:
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case D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE:
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*access_mask = 0;
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*stage_flags = 0;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
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break;
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case D3D12_RESOURCE_STATE_COPY_SOURCE:
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case D3D12_RESOURCE_STATE_RESOLVE_SOURCE:
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*access_mask = 0;
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*stage_flags = 0;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
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break;
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default:
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*access_mask = 0;
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*stage_flags = 0;
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if (image_layout)
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*image_layout = VK_IMAGE_LAYOUT_GENERAL;
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break;
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}
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/* Handle read-only states. */
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assert(!is_write_resource_state(state));
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if (state & D3D12_RESOURCE_STATE_VERTEX_AND_CONSTANT_BUFFER)
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{
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*access_mask |= VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT
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| VK_ACCESS_UNIFORM_READ_BIT;
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if (device->bindless_state.flags & VKD3D_BINDLESS_CBV_AS_SSBO)
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*access_mask |= VK_ACCESS_SHADER_READ_BIT;
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*stage_flags |= VK_PIPELINE_STAGE_VERTEX_INPUT_BIT
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| queue_shader_stages;
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state &= ~D3D12_RESOURCE_STATE_VERTEX_AND_CONSTANT_BUFFER;
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}
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if (state & D3D12_RESOURCE_STATE_INDEX_BUFFER)
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{
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*access_mask |= VK_ACCESS_INDEX_READ_BIT;
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*stage_flags |= VK_PIPELINE_STAGE_VERTEX_INPUT_BIT;
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state &= ~D3D12_RESOURCE_STATE_INDEX_BUFFER;
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}
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if (state & D3D12_RESOURCE_STATE_DEPTH_READ)
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{
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*access_mask |= VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT;
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*stage_flags |= VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT
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| VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT;
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state &= ~D3D12_RESOURCE_STATE_DEPTH_READ;
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}
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if (state & D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE)
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{
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*access_mask |= VK_ACCESS_SHADER_READ_BIT;
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*stage_flags |= (queue_shader_stages & ~VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT);
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state &= ~D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE;
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}
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if (state & D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE)
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{
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*access_mask |= VK_ACCESS_SHADER_READ_BIT;
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*stage_flags |= VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT;
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state &= ~D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE;
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}
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if (state & D3D12_RESOURCE_STATE_INDIRECT_ARGUMENT) /* D3D12_RESOURCE_STATE_PREDICATION */
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{
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*access_mask |= VK_ACCESS_INDIRECT_COMMAND_READ_BIT;
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*stage_flags |= VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT;
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if (device->vk_info.EXT_conditional_rendering)
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{
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*access_mask |= VK_ACCESS_CONDITIONAL_RENDERING_READ_BIT_EXT;
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*stage_flags |= VK_PIPELINE_STAGE_CONDITIONAL_RENDERING_BIT_EXT;
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}
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state &= ~D3D12_RESOURCE_STATE_INDIRECT_ARGUMENT;
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}
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if (state & (D3D12_RESOURCE_STATE_COPY_SOURCE | D3D12_RESOURCE_STATE_RESOLVE_SOURCE))
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{
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*access_mask |= VK_ACCESS_TRANSFER_READ_BIT;
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*stage_flags |= VK_PIPELINE_STAGE_TRANSFER_BIT;
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state &= ~(D3D12_RESOURCE_STATE_COPY_SOURCE | D3D12_RESOURCE_STATE_RESOLVE_SOURCE);
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}
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if (state)
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{
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WARN("Invalid resource state %#x.\n", state);
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return false;
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}
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return true;
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}
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static void d3d12_command_list_transition_resource_to_initial_state(struct d3d12_command_list *list,
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struct d3d12_resource *resource)
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{
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@ -4283,64 +4066,31 @@ static void STDMETHODCALLTYPE d3d12_command_list_SetPipelineState(d3d12_command_
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list->state = state;
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}
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static bool is_ds_multiplanar_resolvable(unsigned int first_state, unsigned int second_state)
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{
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/* Only combinations of depth/stencil read/write are supported. */
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return first_state == second_state
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|| ((first_state & (D3D12_RESOURCE_STATE_DEPTH_READ | D3D12_RESOURCE_STATE_DEPTH_WRITE))
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&& (second_state & (D3D12_RESOURCE_STATE_DEPTH_READ | D3D12_RESOURCE_STATE_DEPTH_WRITE)));
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}
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static unsigned int d3d12_find_ds_multiplanar_transition(const D3D12_RESOURCE_BARRIER *barriers,
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unsigned int i, unsigned int barrier_count, unsigned int sub_resource_count)
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{
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unsigned int sub_resource_idx = barriers[i].u.Transition.Subresource;
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unsigned int j;
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for (j = i + 1; j < barrier_count; ++j)
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{
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if (barriers[j].Type == D3D12_RESOURCE_BARRIER_TYPE_TRANSITION
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&& barriers[j].u.Transition.pResource == barriers[i].u.Transition.pResource
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&& sub_resource_idx % sub_resource_count == barriers[j].u.Transition.Subresource % sub_resource_count)
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{
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/* Second barrier must be for a different plane. */
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if (barriers[j].u.Transition.Subresource == sub_resource_idx)
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return 0;
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/* Validate the second barrier and check if the combination of two states is supported. */
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if (!is_valid_resource_state(barriers[j].u.Transition.StateBefore)
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|| !is_ds_multiplanar_resolvable(barriers[i].u.Transition.StateBefore, barriers[j].u.Transition.StateBefore)
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|| !is_valid_resource_state(barriers[j].u.Transition.StateAfter)
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|| !is_ds_multiplanar_resolvable(barriers[i].u.Transition.StateAfter, barriers[j].u.Transition.StateAfter)
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|| barriers[j].u.Transition.Subresource >= sub_resource_count * 2u)
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return 0;
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return j;
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}
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}
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return 0;
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}
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static void STDMETHODCALLTYPE d3d12_command_list_ResourceBarrier(d3d12_command_list_iface *iface,
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UINT barrier_count, const D3D12_RESOURCE_BARRIER *barriers)
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{
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struct d3d12_command_list *list = impl_from_ID3D12GraphicsCommandList(iface);
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const struct vkd3d_vk_device_procs *vk_procs = &list->device->vk_procs;
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bool have_aliasing_barriers = false, have_split_barriers = false;
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bool *multiplanar_handled = NULL;
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VkPipelineStageFlags dst_stage_mask, src_stage_mask;
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VkMemoryBarrier vk_memory_barrier;
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unsigned int i;
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TRACE("iface %p, barrier_count %u, barriers %p.\n", iface, barrier_count, barriers);
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d3d12_command_list_end_current_render_pass(list);
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vk_memory_barrier.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER;
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vk_memory_barrier.pNext = NULL;
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vk_memory_barrier.srcAccessMask = 0;
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vk_memory_barrier.dstAccessMask = 0;
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src_stage_mask = 0;
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dst_stage_mask = 0;
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for (i = 0; i < barrier_count; ++i)
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{
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unsigned int sub_resource_idx = D3D12_RESOURCE_BARRIER_ALL_SUBRESOURCES;
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VkPipelineStageFlags src_stage_mask = 0, dst_stage_mask = 0;
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VkAccessFlags src_access_mask = 0, dst_access_mask = 0;
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const D3D12_RESOURCE_BARRIER *current = &barriers[i];
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VkImageLayout layout_before, layout_after;
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struct d3d12_resource *resource;
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have_split_barriers = have_split_barriers
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@ -4354,7 +4104,6 @@ static void STDMETHODCALLTYPE d3d12_command_list_ResourceBarrier(d3d12_command_l
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{
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case D3D12_RESOURCE_BARRIER_TYPE_TRANSITION:
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{
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unsigned int state_before, state_after, stencil_state_before = 0, stencil_state_after = 0;
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const D3D12_RESOURCE_TRANSITION_BARRIER *transition = ¤t->u.Transition;
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if (!is_valid_resource_state(transition->StateBefore))
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@ -4376,57 +4125,12 @@ static void STDMETHODCALLTYPE d3d12_command_list_ResourceBarrier(d3d12_command_l
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continue;
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}
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if (multiplanar_handled && multiplanar_handled[i])
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continue;
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state_before = transition->StateBefore;
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state_after = transition->StateAfter;
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sub_resource_idx = transition->Subresource;
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if (sub_resource_idx != D3D12_RESOURCE_BARRIER_ALL_SUBRESOURCES
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&& (resource->desc.Flags & D3D12_RESOURCE_FLAG_ALLOW_DEPTH_STENCIL))
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{
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unsigned int sub_resource_count = d3d12_resource_desc_get_sub_resource_count(&resource->desc);
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unsigned int j = d3d12_find_ds_multiplanar_transition(barriers, i, barrier_count, sub_resource_count);
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if (j && (multiplanar_handled || (multiplanar_handled = vkd3d_calloc(barrier_count, sizeof(*multiplanar_handled)))))
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{
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multiplanar_handled[j] = true;
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if (sub_resource_idx >= sub_resource_count)
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{
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sub_resource_idx -= sub_resource_count;
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/* The stencil barrier is at i, depth at j. */
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state_before = barriers[j].u.Transition.StateBefore;
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state_after = barriers[j].u.Transition.StateAfter;
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stencil_state_before = transition->StateBefore;
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stencil_state_after = transition->StateAfter;
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}
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else
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{
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/* Depth at i, stencil at j. */
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stencil_state_before = barriers[j].u.Transition.StateBefore;
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stencil_state_after = barriers[j].u.Transition.StateAfter;
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}
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}
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else if (sub_resource_idx >= sub_resource_count)
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{
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FIXME_ONCE("Unhandled sub-resource idx %u.\n", sub_resource_idx);
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continue;
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}
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}
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if (!vk_barrier_parameters_from_d3d12_resource_state(list->device, state_before, stencil_state_before,
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resource, list->vk_queue_flags, &src_access_mask, &src_stage_mask, &layout_before))
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{
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FIXME("Unhandled state %#x.\n", state_before);
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continue;
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}
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if (!vk_barrier_parameters_from_d3d12_resource_state(list->device, state_after, stencil_state_after,
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resource, list->vk_queue_flags, &dst_access_mask, &dst_stage_mask, &layout_after))
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{
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FIXME("Unhandled state %#x.\n", state_after);
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continue;
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}
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vk_access_and_stage_flags_from_d3d12_resource_state(list->device, resource,
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transition->StateBefore, list->vk_queue_flags, &src_stage_mask,
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&vk_memory_barrier.srcAccessMask);
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vk_access_and_stage_flags_from_d3d12_resource_state(list->device, resource,
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transition->StateAfter, list->vk_queue_flags, &dst_stage_mask,
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&vk_memory_barrier.dstAccessMask);
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TRACE("Transition barrier (resource %p, subresource %#x, before %#x, after %#x).\n",
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resource, transition->Subresource, transition->StateBefore, transition->StateAfter);
|
||||
|
@ -4436,16 +4140,14 @@ static void STDMETHODCALLTYPE d3d12_command_list_ResourceBarrier(d3d12_command_l
|
|||
case D3D12_RESOURCE_BARRIER_TYPE_UAV:
|
||||
{
|
||||
const D3D12_RESOURCE_UAV_BARRIER *uav = ¤t->u.UAV;
|
||||
VkPipelineStageFlags stage_mask;
|
||||
VkImageLayout image_layout;
|
||||
VkAccessFlags access_mask;
|
||||
|
||||
resource = unsafe_impl_from_ID3D12Resource(uav->pResource);
|
||||
vk_barrier_parameters_from_d3d12_resource_state(list->device, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, 0,
|
||||
resource, list->vk_queue_flags, &access_mask, &stage_mask, &image_layout);
|
||||
src_access_mask = dst_access_mask = access_mask;
|
||||
src_stage_mask = dst_stage_mask = stage_mask;
|
||||
layout_before = layout_after = image_layout;
|
||||
|
||||
vk_access_and_stage_flags_from_d3d12_resource_state(list->device, resource,
|
||||
D3D12_RESOURCE_STATE_UNORDERED_ACCESS, list->vk_queue_flags, &src_stage_mask,
|
||||
&vk_memory_barrier.srcAccessMask);
|
||||
vk_access_and_stage_flags_from_d3d12_resource_state(list->device, resource,
|
||||
D3D12_RESOURCE_STATE_UNORDERED_ACCESS, list->vk_queue_flags, &dst_stage_mask,
|
||||
&vk_memory_barrier.dstAccessMask);
|
||||
|
||||
TRACE("UAV barrier (resource %p).\n", resource);
|
||||
break;
|
||||
|
@ -4461,86 +4163,14 @@ static void STDMETHODCALLTYPE d3d12_command_list_ResourceBarrier(d3d12_command_l
|
|||
|
||||
if (resource)
|
||||
d3d12_command_list_track_resource_usage(list, resource);
|
||||
|
||||
if (!resource)
|
||||
{
|
||||
VkMemoryBarrier vk_barrier;
|
||||
|
||||
vk_barrier.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER;
|
||||
vk_barrier.pNext = NULL;
|
||||
vk_barrier.srcAccessMask = src_access_mask;
|
||||
vk_barrier.dstAccessMask = dst_access_mask;
|
||||
|
||||
VK_CALL(vkCmdPipelineBarrier(list->vk_command_buffer, src_stage_mask, dst_stage_mask, 0,
|
||||
1, &vk_barrier, 0, NULL, 0, NULL));
|
||||
}
|
||||
else if (d3d12_resource_is_buffer(resource))
|
||||
{
|
||||
VkBufferMemoryBarrier vk_barrier;
|
||||
|
||||
vk_barrier.sType = VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER;
|
||||
vk_barrier.pNext = NULL;
|
||||
vk_barrier.srcAccessMask = src_access_mask;
|
||||
vk_barrier.dstAccessMask = dst_access_mask;
|
||||
vk_barrier.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
|
||||
vk_barrier.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
|
||||
vk_barrier.buffer = resource->u.vk_buffer;
|
||||
vk_barrier.offset = resource->heap_offset;
|
||||
vk_barrier.size = resource->desc.Width;
|
||||
|
||||
VK_CALL(vkCmdPipelineBarrier(list->vk_command_buffer, src_stage_mask, dst_stage_mask, 0,
|
||||
0, NULL, 1, &vk_barrier, 0, NULL));
|
||||
}
|
||||
else
|
||||
{
|
||||
const struct vkd3d_format *format;
|
||||
VkImageMemoryBarrier vk_barrier;
|
||||
|
||||
if (!(format = vkd3d_format_from_d3d12_resource_desc(list->device, &resource->desc, 0)))
|
||||
{
|
||||
ERR("Resource %p has invalid format %#x.\n", resource, resource->desc.Format);
|
||||
continue;
|
||||
}
|
||||
|
||||
vk_barrier.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER;
|
||||
vk_barrier.pNext = NULL;
|
||||
vk_barrier.srcAccessMask = src_access_mask;
|
||||
vk_barrier.dstAccessMask = dst_access_mask;
|
||||
vk_barrier.oldLayout = layout_before;
|
||||
vk_barrier.newLayout = layout_after;
|
||||
vk_barrier.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
|
||||
vk_barrier.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
|
||||
vk_barrier.image = resource->u.vk_image;
|
||||
|
||||
vk_barrier.subresourceRange.aspectMask = format->vk_aspect_mask;
|
||||
if (sub_resource_idx == D3D12_RESOURCE_BARRIER_ALL_SUBRESOURCES)
|
||||
{
|
||||
vk_barrier.subresourceRange.baseMipLevel = 0;
|
||||
vk_barrier.subresourceRange.levelCount = VK_REMAINING_MIP_LEVELS;
|
||||
vk_barrier.subresourceRange.baseArrayLayer = 0;
|
||||
vk_barrier.subresourceRange.layerCount = VK_REMAINING_ARRAY_LAYERS;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* FIXME: Some formats in D3D12 are planar. Each plane is a separate sub-resource. */
|
||||
if (sub_resource_idx >= d3d12_resource_desc_get_sub_resource_count(&resource->desc))
|
||||
{
|
||||
FIXME_ONCE("Unhandled sub-resource idx %u.\n", sub_resource_idx);
|
||||
continue;
|
||||
}
|
||||
|
||||
vk_barrier.subresourceRange.baseMipLevel = sub_resource_idx % resource->desc.MipLevels;
|
||||
vk_barrier.subresourceRange.levelCount = 1;
|
||||
vk_barrier.subresourceRange.baseArrayLayer = sub_resource_idx / resource->desc.MipLevels;
|
||||
vk_barrier.subresourceRange.layerCount = 1;
|
||||
}
|
||||
|
||||
VK_CALL(vkCmdPipelineBarrier(list->vk_command_buffer, src_stage_mask, dst_stage_mask, 0,
|
||||
0, NULL, 0, NULL, 1, &vk_barrier));
|
||||
}
|
||||
}
|
||||
|
||||
vkd3d_free(multiplanar_handled);
|
||||
if (src_stage_mask && dst_stage_mask)
|
||||
{
|
||||
VK_CALL(vkCmdPipelineBarrier(list->vk_command_buffer,
|
||||
src_stage_mask, dst_stage_mask, 0,
|
||||
1, &vk_memory_barrier, 0, NULL, 0, NULL));
|
||||
}
|
||||
|
||||
if (have_aliasing_barriers)
|
||||
FIXME_ONCE("Aliasing barriers not implemented yet.\n");
|
||||
|
|
Loading…
Reference in New Issue