diff --git a/src/intel/isl/isl_emit_cpb.c b/src/intel/isl/isl_emit_cpb.c
index e57fa92916766..bfc39282e6170 100644
--- a/src/intel/isl/isl_emit_cpb.c
+++ b/src/intel/isl/isl_emit_cpb.c
@@ -42,11 +42,8 @@ __gen_combine_address(__attribute__((unused)) void *data,
 #if GFX_VERx10 >= 125
 static const uint8_t isl_encode_tiling[] = {
    [ISL_TILING_4]  = TILE4,
-#if GFX_VER >= 20
-   [ISL_TILING_64_XE2] = TILE64,
-#else
    [ISL_TILING_64] = TILE64,
-#endif
+   [ISL_TILING_64_XE2] = TILE64,
 };
 #endif
 
diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c
index dc23f5a647400..4d82f539824b2 100644
--- a/src/intel/isl/isl_emit_depth_stencil.c
+++ b/src/intel/isl/isl_emit_depth_stencil.c
@@ -60,12 +60,10 @@ static const uint32_t isl_encode_ds_surftype[] = {
 
 #if GFX_VER >= 9
 static const uint8_t isl_encode_tiling[] = {
-#if GFX_VER >= 20
-   [ISL_TILING_4]          = TILE4,
-   [ISL_TILING_64_XE2]     = TILE64,
-#elif GFX_VERx10 >= 125
+#if GFX_VERx10 >= 125
    [ISL_TILING_4]          = TILE4,
    [ISL_TILING_64]         = TILE64,
+   [ISL_TILING_64_XE2]     = TILE64,
 #else
    [ISL_TILING_Y0]         = NONE,
    [ISL_TILING_SKL_Yf]     = TILEYF,
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index 181a3dfd1b407..7cbf2774f0242 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -44,12 +44,10 @@ __gen_combine_address(__attribute__((unused)) void *data,
 static const uint8_t isl_encode_tiling[] = {
    [ISL_TILING_LINEAR]  = LINEAR,
    [ISL_TILING_X]       = XMAJOR,
-#if GFX_VER >= 20
-   [ISL_TILING_4]       = TILE4,
-   [ISL_TILING_64_XE2]  = TILE64,
-#elif GFX_VERx10 >= 125
+#if GFX_VERx10 >= 125
    [ISL_TILING_4]       = TILE4,
    [ISL_TILING_64]      = TILE64,
+   [ISL_TILING_64_XE2]  = TILE64,
 #else
    [ISL_TILING_Y0]      = YMAJOR,
    [ISL_TILING_ICL_Yf]  = YMAJOR,