From 5fd8ae15415bc79c76a827faef8fb37591c08189 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sun, 7 Aug 2022 19:17:40 -0400 Subject: [PATCH] asahi: Identify depth clip mode bit Setting this bit (at the batch level, not the draw level!) switches to [-1, 1] clipping instead of Metal's preferred [0, 1] clipping. Using this bit allows us to drop the clip_halfz lowering we had before, saving 2 instructions in every vertex shader. Fixes dEQP-GLES2.functional.depth_range.* Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.c | 7 ------- src/asahi/compiler/agx_compile.h | 3 --- src/asahi/lib/cmdbuf.xml | 1 + src/gallium/drivers/asahi/agx_state.c | 10 +++------- src/gallium/drivers/asahi/magic.c | 1 + 5 files changed, 5 insertions(+), 17 deletions(-) diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index 2b0c29b25289b..3d1c995925c3f 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -1673,13 +1673,6 @@ agx_compile_shader_nir(nir_shader *nir, NIR_PASS_V(nir, nir_lower_vars_to_scratch, nir_var_function_temp, 16, glsl_get_natural_size_align_bytes); NIR_PASS_V(nir, nir_lower_indirect_derefs, nir_var_function_temp, ~0); - - if (ctx->stage == MESA_SHADER_VERTEX) { - /* Lower from OpenGL [-1, 1] to [0, 1] if half-z is not set */ - if (!key->vs.clip_halfz) - NIR_PASS_V(nir, nir_lower_clip_halfz); - } - NIR_PASS_V(nir, nir_split_var_copies); NIR_PASS_V(nir, nir_lower_global_vars_to_local); NIR_PASS_V(nir, nir_lower_var_copies); diff --git a/src/asahi/compiler/agx_compile.h b/src/asahi/compiler/agx_compile.h index e7b81630f2320..c42dbd7091888 100644 --- a/src/asahi/compiler/agx_compile.h +++ b/src/asahi/compiler/agx_compile.h @@ -236,9 +236,6 @@ struct agx_vs_shader_key { unsigned vbuf_strides[AGX_MAX_VBUFS]; struct agx_attribute attributes[AGX_MAX_ATTRIBS]; - - /* Set to true for clip coordinates to range [0, 1] instead of [-1, 1] */ - bool clip_halfz : 1; }; struct agx_fs_shader_key { diff --git a/src/asahi/lib/cmdbuf.xml b/src/asahi/lib/cmdbuf.xml index 20b2170600c76..6ddcd67cfe270 100644 --- a/src/asahi/lib/cmdbuf.xml +++ b/src/asahi/lib/cmdbuf.xml @@ -581,6 +581,7 @@ + diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index 5c2d9ca5762d1..48929791b512a 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -670,14 +670,11 @@ agx_upload_viewport_scissor(struct agx_pool *pool, cfg.translate_x = vp->translate[0]; cfg.translate_y = vp->translate[1]; + cfg.translate_z = vp->translate[2]; cfg.scale_x = vp->scale[0]; cfg.scale_y = vp->scale[1]; - - /* Assumes [0, 1] clip coordinates. If half-z is not in use, lower_half_z - * is called to ensure this works. */ - cfg.translate_z = minz; - cfg.scale_z = maxz - minz; - }; + cfg.scale_z = vp->scale[2]; + } /* Allocate a new scissor descriptor */ struct agx_scissor_packed *ptr = batch->scissor.bo->ptr.cpu; @@ -1083,7 +1080,6 @@ agx_update_vs(struct agx_context *ctx) { struct agx_vs_shader_key key = { .num_vbufs = util_last_bit(ctx->vb_mask), - .clip_halfz = ctx->rast->base.clip_halfz, }; memcpy(key.attributes, ctx->attributes, diff --git a/src/gallium/drivers/asahi/magic.c b/src/gallium/drivers/asahi/magic.c index 0f401e696eedd..d7307776c1e1a 100644 --- a/src/gallium/drivers/asahi/magic.c +++ b/src/gallium/drivers/asahi/magic.c @@ -268,6 +268,7 @@ demo_cmdbuf(uint64_t *buf, size_t size, cfg.attachment_length = nr_attachments * AGX_IOGPU_ATTACHMENT_LENGTH; cfg.unknown_offset = offset_unk; cfg.encoder = encoder_ptr; + cfg.opengl_depth_clipping = true; cfg.deflake_1 = deflake_1; cfg.deflake_2 = deflake_2;