From 094a0a2ccbdd97e98009b453731d88c43d244b31 Mon Sep 17 00:00:00 2001 From: Jonathan Gray Date: Tue, 5 Mar 2024 14:49:15 +1100 Subject: [PATCH] intel/dev: 0x7d45 is mtl-u not mtl-h Ref: https://ark.intel.com/content/www/us/en/ark/products/237327/intel-core-ultra-7-processor-155u-12m-cache-up-to-4-80-ghz.html Ref: Core Ultra Processor Datasheet, Doc. No.: 792044, Rev.: 002 Fixes: 48ff68820e8 ("intel/dev: Enable MTL PCI ids") Reviewed-by: Jordan Justen Part-of: --- include/pci_ids/iris_pci_ids.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h index b4a02cde6660f..8dd8439ac1844 100644 --- a/include/pci_ids/iris_pci_ids.h +++ b/include/pci_ids/iris_pci_ids.h @@ -258,7 +258,7 @@ CHIPSET(0x56c1, atsm_g11, "ATS-M", "Intel(R) Data Center GPU Flex 140") CHIPSET(0x56c2, atsm_g10, "ATS-M", "Intel(R) Data Center GPU Flex 170V") CHIPSET(0x7d40, mtl_u, "MTL", "Intel(R) Graphics") -CHIPSET(0x7d45, mtl_h, "MTL", "Intel(R) Graphics") +CHIPSET(0x7d45, mtl_u, "MTL", "Intel(R) Graphics") CHIPSET(0x7d55, mtl_h, "MTL", "Intel(R) Arc(tm) Graphics") CHIPSET(0x7d60, mtl_u, "MTL", "Intel(R) Graphics") CHIPSET(0x7dd5, mtl_h, "MTL", "Intel(R) Graphics")