Fixed non-x86 compilation
This commit is contained in:
tevador
parent
a8c7137873
commit
d30eef75af
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@ -1,302 +0,0 @@
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; Copyright (c) 2018 tevador
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;
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; This file is part of RandomX.
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;
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; RandomX is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; RandomX is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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PUBLIC ADD_64
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PUBLIC ADD_32
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PUBLIC SUB_64
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PUBLIC SUB_32
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PUBLIC MUL_64
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PUBLIC MULH_64
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PUBLIC MUL_32
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PUBLIC IMUL_32
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PUBLIC IMULH_64
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PUBLIC DIV_64
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PUBLIC IDIV_64
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PUBLIC AND_64
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PUBLIC AND_32
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PUBLIC OR_64
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PUBLIC OR_32
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PUBLIC XOR_64
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PUBLIC XOR_32
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PUBLIC SHL_64
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PUBLIC SHR_64
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PUBLIC SAR_64
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PUBLIC ROL_64
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PUBLIC ROR_64
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PUBLIC FPINIT
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PUBLIC FPADD
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PUBLIC FPSUB
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PUBLIC FPMUL
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PUBLIC FPDIV
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PUBLIC FPSQRT
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PUBLIC FPROUND
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.code
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ADD_64 PROC
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mov rax, QWORD PTR [rcx]
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add rax, QWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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ADD_64 ENDP
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ADD_32 PROC
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mov eax, DWORD PTR [rcx]
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add eax, DWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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ADD_32 ENDP
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SUB_64 PROC
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mov rax, QWORD PTR [rcx]
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sub rax, QWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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SUB_64 ENDP
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SUB_32 PROC
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mov eax, DWORD PTR [rcx]
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sub eax, DWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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SUB_32 ENDP
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MUL_64 PROC
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mov rax, QWORD PTR [rcx]
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imul rax, QWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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MUL_64 ENDP
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MULH_64 PROC
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mov rax, QWORD PTR [rdx]
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mul QWORD PTR [rcx]
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mov QWORD PTR [r8], rdx
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ret 0
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MULH_64 ENDP
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MUL_32 PROC
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mov r9d, DWORD PTR [rcx]
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mov eax, DWORD PTR [rdx]
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imul r9, rax
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mov QWORD PTR [r8], r9
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ret 0
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MUL_32 ENDP
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IMUL_32 PROC
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movsxd r9, DWORD PTR [rcx]
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movsxd rax, DWORD PTR [rdx]
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imul r9, rax
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mov QWORD PTR [r8], r9
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ret 0
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IMUL_32 ENDP
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IMULH_64 PROC
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mov rax, QWORD PTR [rdx]
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imul QWORD PTR [rcx]
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mov QWORD PTR [r8], rdx
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ret 0
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IMULH_64 ENDP
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DIV_64 PROC
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mov r9d, DWORD PTR [rdx]
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mov eax, 1
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test r9d, r9d
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cmovne eax, r9d
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xor edx, edx
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mov r9d, eax
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mov rax, QWORD PTR [rcx]
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div r9
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mov QWORD PTR [r8], rax
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ret 0
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DIV_64 ENDP
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IDIV_64 PROC
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mov rax, QWORD PTR [rcx]
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cmp DWORD PTR [rdx], -1
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jne SHORT SAFE_IDIV_64
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; mov rcx, -9223372036854775808
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; cmp rax, rcx
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mov rcx, rax
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rol rcx, 1
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dec rcx
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jnz SHORT SAFE_IDIV_64
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mov QWORD PTR [r8], rax
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ret 0
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SAFE_IDIV_64:
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mov ecx, DWORD PTR [rdx]
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test ecx, ecx
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mov edx, 1
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cmovne edx, ecx
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movsxd rcx, edx
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cqo
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idiv rcx
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mov QWORD PTR [r8], rax
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ret 0
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IDIV_64 ENDP
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AND_64 PROC
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mov rax, QWORD PTR [rcx]
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and rax, QWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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AND_64 ENDP
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AND_32 PROC
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mov eax, DWORD PTR [rcx]
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and eax, DWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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AND_32 ENDP
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OR_64 PROC
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mov rax, QWORD PTR [rcx]
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or rax, QWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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OR_64 ENDP
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OR_32 PROC
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mov eax, DWORD PTR [rcx]
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or eax, DWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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OR_32 ENDP
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XOR_64 PROC
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mov rax, QWORD PTR [rcx]
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xor rax, QWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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XOR_64 ENDP
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XOR_32 PROC
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mov eax, DWORD PTR [rcx]
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xor eax, DWORD PTR [rdx]
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mov QWORD PTR [r8], rax
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ret 0
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XOR_32 ENDP
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SHL_64 PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, QWORD PTR [rdx]
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shl rax, cl
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mov QWORD PTR [r8], rax
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ret 0
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SHL_64 ENDP
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SHR_64 PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, QWORD PTR [rdx]
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shr rax, cl
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mov QWORD PTR [r8], rax
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ret 0
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SHR_64 ENDP
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SAR_64 PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, QWORD PTR [rdx]
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sar rax, cl
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mov QWORD PTR [r8], rax
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ret 0
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SAR_64 ENDP
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ROL_64 PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, QWORD PTR [rdx]
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rol rax, cl
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mov QWORD PTR [r8], rax
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ret 0
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ROL_64 ENDP
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ROR_64 PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, QWORD PTR [rdx]
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ror rax, cl
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mov QWORD PTR [r8], rax
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ret 0
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ROR_64 ENDP
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FPINIT PROC
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mov DWORD PTR [rsp+8], 40896
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ldmxcsr DWORD PTR [rsp+8]
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ret 0
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FPINIT ENDP
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FPADD PROC
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mov rax, QWORD PTR [rcx]
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and rax, -2048
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cvtsi2sd xmm0, rax
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addsd xmm0, xmm1
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movsd QWORD PTR [r8], xmm0
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ret 0
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FPADD ENDP
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FPSUB PROC
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mov rax, QWORD PTR [rcx]
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and rax, -2048
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cvtsi2sd xmm0, rax
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subsd xmm0, xmm1
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movsd QWORD PTR [r8], xmm0
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ret 0
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FPSUB ENDP
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FPMUL PROC
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mov rax, QWORD PTR [rcx]
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and rax, -2048
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or rax, 2048
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cvtsi2sd xmm0, rax
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mulsd xmm0, xmm1
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movsd QWORD PTR [r8], xmm0
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ret 0
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FPMUL ENDP
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FPDIV PROC
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mov rax, QWORD PTR [rcx]
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and rax, -2048
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or rax, 2048
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cvtsi2sd xmm0, rax
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divsd xmm0, xmm1
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movsd QWORD PTR [r8], xmm0
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ret 0
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FPDIV ENDP
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FPSQRT PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, 9223372036854773760
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and rax, rcx
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cvtsi2sd xmm0, rax
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sqrtsd xmm1, xmm0
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movsd QWORD PTR [r8], xmm1
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ret 0
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FPSQRT ENDP
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FPROUND PROC
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mov rax, QWORD PTR [rcx]
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mov rcx, rax
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shl rax, 13
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and rcx, -2048
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and eax, 24576
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cvtsi2sd xmm0, rcx
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movsd QWORD PTR [r8], xmm0
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or eax, 40896
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mov DWORD PTR [rsp+8], eax
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ldmxcsr DWORD PTR [rsp+8]
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ret 0
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FPROUND ENDP
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END
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@ -29,11 +29,27 @@ namespace randomx {
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throw std::runtime_error("JIT compiler only supports x86-64 CPUs");
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}
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void JitCompilerX86::generateProgram(Program& p) {
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JitCompilerX86::~JitCompilerX86() {
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}
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void JitCompilerX86::generateProgramLight(Program& p) {
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void JitCompilerX86::generateProgram(Program& p, ProgramConfiguration& pcfg) {
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}
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void JitCompilerX86::generateProgramLight(Program& p, ProgramConfiguration& pcfg) {
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}
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template<size_t N>
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void JitCompilerX86::generateSuperscalarHash(SuperscalarProgram(&programs)[N], std::vector<uint64_t> &reciprocalCache) {
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}
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template
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void JitCompilerX86::generateSuperscalarHash(SuperscalarProgram(&programs)[RANDOMX_CACHE_ACCESSES], std::vector<uint64_t> &reciprocalCache);
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void JitCompilerX86::generateDatasetInitCode() {
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}
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@ -239,10 +255,10 @@ namespace randomx {
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void JitCompilerX86::generateProgramLight(Program& prog, ProgramConfiguration& pcfg) {
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generateProgramPrologue(prog, pcfg);
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//if (superscalar) {
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emit(codeReadDatasetLightSshInit, readDatasetLightInitSize);
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emitByte(CALL);
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emit32(superScalarHashOffset - (codePos + 4));
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emit(codeReadDatasetLightSshFin, readDatasetLightFinSize);
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emit(codeReadDatasetLightSshInit, readDatasetLightInitSize);
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emitByte(CALL);
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emit32(superScalarHashOffset - (codePos + 4));
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emit(codeReadDatasetLightSshFin, readDatasetLightFinSize);
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/*}
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else {
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memcpy(code + codePos, codeReadDatasetLight, readDatasetLightSize);
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@ -283,7 +299,7 @@ namespace randomx {
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}
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template
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void JitCompilerX86::generateSuperscalarHash(SuperscalarProgram(&programs)[RANDOMX_CACHE_ACCESSES], std::vector<uint64_t> &reciprocalCache);
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void JitCompilerX86::generateSuperscalarHash(SuperscalarProgram(&programs)[RANDOMX_CACHE_ACCESSES], std::vector<uint64_t> &reciprocalCache);
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void JitCompilerX86::generateDatasetInitCode() {
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memcpy(code, codeDatasetInit, datasetInitSize);
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@ -713,7 +729,7 @@ namespace randomx {
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emit(REX_XOR_RM);
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emitByte(0x04 + 8 * instr.dst);
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emitByte(0x06);
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}
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}
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else {
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emit(REX_XOR_RM);
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emitByte(0x86 + 8 * instr.dst);
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@ -861,7 +877,7 @@ namespace randomx {
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void JitCompilerX86::h_CFROUND(Instruction& instr, int i) {
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emit(REX_MOV_RR64);
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emitByte(0xc0 + instr.src);
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emitByte(0xc0 + instr.src);
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int rotate = (13 - (instr.getImm32() & 63)) & 63;
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if (rotate != 0) {
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emit(ROL_RAX);
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@ -895,24 +911,24 @@ namespace randomx {
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static inline uint8_t condition(Instruction& instr) {
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switch (instr.getModCond())
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{
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case 0:
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return 0x96; //setbe
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case 1:
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return 0x97; //seta
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case 2:
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return 0x98; //sets
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case 3:
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return 0x99; //setns
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case 4:
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return 0x90; //seto
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case 5:
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return 0x91; //setno
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case 6:
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return 0x9c; //setl
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case 7:
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return 0x9d; //setge
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default:
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UNREACHABLE;
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case 0:
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return 0x96; //setbe
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case 1:
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return 0x97; //seta
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case 2:
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return 0x98; //sets
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case 3:
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return 0x99; //setns
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case 4:
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return 0x90; //seto
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case 5:
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return 0x91; //setno
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case 6:
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return 0x9c; //setl
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case 7:
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return 0x9d; //setge
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default:
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UNREACHABLE;
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}
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}
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@ -993,7 +1009,7 @@ namespace randomx {
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void JitCompilerX86::h_ISTORE(Instruction& instr, int i) {
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genAddressRegDst(instr);
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//if (instr.getModCond())
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emit(REX_MOV_MR);
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emit(REX_MOV_MR);
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//else
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// emit(MOVNTI);
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emitByte(0x04 + 8 * instr.src);
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@ -1050,6 +1066,5 @@ namespace randomx {
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INST_HANDLE(NOP)
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};
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}
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#endif
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}
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