From a223b6b33ba7bf6765f59bac38471716a9cf6919 Mon Sep 17 00:00:00 2001
From: tevador <37503146+tevador@users.noreply.github.com>
Date: Wed, 18 Dec 2019 12:30:49 +0100
Subject: [PATCH 1/2] Fixed an incorrect URL the the documentation

---
 doc/design.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/doc/design.md b/doc/design.md
index 1a77458..7a1b8ef 100644
--- a/doc/design.md
+++ b/doc/design.md
@@ -255,7 +255,7 @@ The Scratchpad is split into 3 levels to mimic the typical CPU cache hierarchy [
 |----------------|----------|----------|----------|------|
 ARM Cortex A55|2|6|-|[[24](https://www.anandtech.com/show/11441/dynamiq-and-arms-new-cpus-cortex-a75-a55/4)]
 |AMD Zen+|4|12|40|[[25](https://en.wikichip.org/wiki/amd/microarchitectures/zen%2B#Memory_Hierarchy)]|
-|Intel Skylake|4|12|42|[[26](https://en.wikichip.org/wiki/amd/microarchitectures/zen%2B#Memory_Hierarchy)]
+|Intel Skylake|4|12|42|[[26](https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(client)#Memory_Hierarchy)]
 
 The L3 cache is much larger and located further from the CPU core. As a result, its access latencies are much higher and can cause stalls in program execution.
 
@@ -638,7 +638,7 @@ state3 = 00000000000000000000000000000000
 
 [25] AMD Zen+ Microarchitecture - https://en.wikichip.org/wiki/amd/microarchitectures/zen%2B#Memory_Hierarchy
 
-[26] Intel Skylake Microarchitecture - https://en.wikichip.org/wiki/amd/microarchitectures/zen%2B#Memory_Hierarchy
+[26] Intel Skylake Microarchitecture - https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(client)#Memory_Hierarchy
 
 [27] Biryukov et al.: Fast and Tradeoff-Resilient Memory-Hard Functions for
 Cryptocurrencies and Password Hashing - https://eprint.iacr.org/2015/430.pdf Table 2, page 8
@@ -647,4 +647,4 @@ Cryptocurrencies and Password Hashing - https://eprint.iacr.org/2015/430.pdf Tab
 
 [29] 7-Zip File archiver - https://www.7-zip.org/
 
-[30] TestU01 library - http://simul.iro.umontreal.ca/testu01/tu01.html
\ No newline at end of file
+[30] TestU01 library - http://simul.iro.umontreal.ca/testu01/tu01.html

From bbbb34757b4b355d023f9226f11463f9c1c928fa Mon Sep 17 00:00:00 2001
From: tevador <37503146+tevador@users.noreply.github.com>
Date: Thu, 26 Dec 2019 12:32:04 +0100
Subject: [PATCH 2/2] Add a note about building portable binaries

---
 README.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/README.md b/README.md
index 95dce40..4c1dabb 100644
--- a/README.md
+++ b/README.md
@@ -48,6 +48,8 @@ cmake -DARCH=native ..
 make
 ```
 
+To build portable binaries, omit the `ARCH` option when executing cmake.
+
 ### Windows
 
 On Windows, it is possible to build using MinGW (same procedure as on Linux) or using Visual Studio (solution file is provided).