763 lines
30 KiB
C
763 lines
30 KiB
C
/**************************************************************************
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*
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* Copyright 2017 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#include "radeon_vcn_enc.h"
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#include "pipe/p_video_codec.h"
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#include "radeon_video.h"
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#include "radeonsi/si_pipe.h"
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#include "util/u_memory.h"
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#include "util/u_video.h"
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#include "vl/vl_video_buffer.h"
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#include <stdio.h>
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static const unsigned index_to_shifts[4] = {24, 16, 8, 0};
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static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_picture_desc *picture)
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{
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if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC) {
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struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
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enc->enc_pic.picture_type = pic->picture_type;
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enc->enc_pic.frame_num = pic->frame_num;
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enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
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enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
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enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0_list[0];
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enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1_list[0];
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enc->enc_pic.not_referenced = pic->not_referenced;
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enc->enc_pic.is_idr = (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR);
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if (pic->pic_ctrl.enc_frame_cropping_flag) {
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enc->enc_pic.crop_left = pic->pic_ctrl.enc_frame_crop_left_offset;
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enc->enc_pic.crop_right = pic->pic_ctrl.enc_frame_crop_right_offset;
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enc->enc_pic.crop_top = pic->pic_ctrl.enc_frame_crop_top_offset;
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enc->enc_pic.crop_bottom = pic->pic_ctrl.enc_frame_crop_bottom_offset;
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} else {
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enc->enc_pic.crop_left = 0;
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enc->enc_pic.crop_right = (align(enc->base.width, 16) - enc->base.width) / 2;
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enc->enc_pic.crop_top = 0;
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enc->enc_pic.crop_bottom = (align(enc->base.height, 16) - enc->base.height) / 2;
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}
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enc->enc_pic.num_temporal_layers = pic->num_temporal_layers ? pic->num_temporal_layers : 1;
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enc->enc_pic.temporal_id = 0;
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for (int i = 0; i < enc->enc_pic.num_temporal_layers; i++)
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{
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enc->enc_pic.rc_layer_init[i].target_bit_rate = pic->rate_ctrl[i].target_bitrate;
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enc->enc_pic.rc_layer_init[i].peak_bit_rate = pic->rate_ctrl[i].peak_bitrate;
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enc->enc_pic.rc_layer_init[i].frame_rate_num = pic->rate_ctrl[i].frame_rate_num;
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enc->enc_pic.rc_layer_init[i].frame_rate_den = pic->rate_ctrl[i].frame_rate_den;
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enc->enc_pic.rc_layer_init[i].vbv_buffer_size = pic->rate_ctrl[i].vbv_buffer_size;
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enc->enc_pic.rc_layer_init[i].avg_target_bits_per_picture = pic->rate_ctrl[i].target_bits_picture;
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enc->enc_pic.rc_layer_init[i].peak_bits_per_picture_integer =
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pic->rate_ctrl[i].peak_bits_picture_integer;
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enc->enc_pic.rc_layer_init[i].peak_bits_per_picture_fractional =
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pic->rate_ctrl[i].peak_bits_picture_fraction;
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}
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enc->enc_pic.rc_session_init.vbv_buffer_level = pic->rate_ctrl[0].vbv_buf_lv;
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enc->enc_pic.rc_per_pic.qp = pic->quant_i_frames;
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enc->enc_pic.rc_per_pic.min_qp_app = 0;
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enc->enc_pic.rc_per_pic.max_qp_app = 51;
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enc->enc_pic.rc_per_pic.max_au_size = 0;
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enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rate_ctrl[0].fill_data_enable;
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enc->enc_pic.rc_per_pic.skip_frame_enable = false;
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enc->enc_pic.rc_per_pic.enforce_hrd = pic->rate_ctrl[0].enforce_hrd;
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switch (pic->rate_ctrl[0].rate_ctrl_method) {
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE:
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enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
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break;
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
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enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
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break;
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
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enc->enc_pic.rc_session_init.rate_control_method =
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RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR;
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break;
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default:
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enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
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}
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enc->enc_pic.spec_misc.profile_idc = u_get_h264_profile_idc(enc->base.profile);
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if (enc->enc_pic.spec_misc.profile_idc >= PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN &&
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enc->enc_pic.spec_misc.profile_idc != PIPE_VIDEO_PROFILE_MPEG4_AVC_EXTENDED)
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enc->enc_pic.spec_misc.cabac_enable = pic->pic_ctrl.enc_cabac_enable;
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else
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enc->enc_pic.spec_misc.cabac_enable = false;
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enc->enc_pic.spec_misc.cabac_init_idc = enc->enc_pic.spec_misc.cabac_enable ? pic->pic_ctrl.enc_cabac_init_idc : 0;
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} else if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
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struct pipe_h265_enc_picture_desc *pic = (struct pipe_h265_enc_picture_desc *)picture;
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enc->enc_pic.picture_type = pic->picture_type;
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enc->enc_pic.frame_num = pic->frame_num;
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enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
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enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
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enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
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enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
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enc->enc_pic.not_referenced = pic->not_referenced;
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enc->enc_pic.is_idr = (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR) ||
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(pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_I);
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if (pic->seq.conformance_window_flag) {
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enc->enc_pic.crop_left = pic->seq.conf_win_left_offset;
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enc->enc_pic.crop_right = pic->seq.conf_win_right_offset;
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enc->enc_pic.crop_top = pic->seq.conf_win_top_offset;
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enc->enc_pic.crop_bottom = pic->seq.conf_win_bottom_offset;
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} else {
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enc->enc_pic.crop_left = 0;
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enc->enc_pic.crop_right = (align(enc->base.width, 16) - enc->base.width) / 2;
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enc->enc_pic.crop_top = 0;
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enc->enc_pic.crop_bottom = (align(enc->base.height, 16) - enc->base.height) / 2;
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}
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enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
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enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
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enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
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enc->enc_pic.max_poc = MAX2(16, util_next_power_of_two(pic->seq.intra_period));
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enc->enc_pic.log2_max_poc = 0;
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enc->enc_pic.num_temporal_layers = 1;
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for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
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i = (i >> 1);
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enc->enc_pic.chroma_format_idc = pic->seq.chroma_format_idc;
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enc->enc_pic.pic_width_in_luma_samples = pic->seq.pic_width_in_luma_samples;
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enc->enc_pic.pic_height_in_luma_samples = pic->seq.pic_height_in_luma_samples;
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enc->enc_pic.log2_diff_max_min_luma_coding_block_size =
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pic->seq.log2_diff_max_min_luma_coding_block_size;
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enc->enc_pic.log2_min_transform_block_size_minus2 =
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pic->seq.log2_min_transform_block_size_minus2;
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enc->enc_pic.log2_diff_max_min_transform_block_size =
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pic->seq.log2_diff_max_min_transform_block_size;
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/* To fix incorrect hardcoded values set by player
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* log2_diff_max_min_luma_coding_block_size = log2(64) - (log2_min_luma_coding_block_size_minus3 + 3)
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* max_transform_hierarchy_depth_inter = log2_diff_max_min_luma_coding_block_size + 1
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* max_transform_hierarchy_depth_intra = log2_diff_max_min_luma_coding_block_size + 1
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*/
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enc->enc_pic.max_transform_hierarchy_depth_inter =
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6 - (pic->seq.log2_min_luma_coding_block_size_minus3 + 3) + 1;
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enc->enc_pic.max_transform_hierarchy_depth_intra =
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enc->enc_pic.max_transform_hierarchy_depth_inter;
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enc->enc_pic.log2_parallel_merge_level_minus2 = pic->pic.log2_parallel_merge_level_minus2;
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enc->enc_pic.bit_depth_luma_minus8 = pic->seq.bit_depth_luma_minus8;
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enc->enc_pic.bit_depth_chroma_minus8 = pic->seq.bit_depth_chroma_minus8;
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enc->enc_pic.nal_unit_type = pic->pic.nal_unit_type;
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enc->enc_pic.max_num_merge_cand = pic->slice.max_num_merge_cand;
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enc->enc_pic.sample_adaptive_offset_enabled_flag =
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pic->seq.sample_adaptive_offset_enabled_flag;
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enc->enc_pic.pcm_enabled_flag = pic->seq.pcm_enabled_flag;
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enc->enc_pic.sps_temporal_mvp_enabled_flag = pic->seq.sps_temporal_mvp_enabled_flag;
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enc->enc_pic.hevc_deblock.loop_filter_across_slices_enabled =
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pic->slice.slice_loop_filter_across_slices_enabled_flag;
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enc->enc_pic.hevc_deblock.deblocking_filter_disabled =
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pic->slice.slice_deblocking_filter_disabled_flag;
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enc->enc_pic.hevc_deblock.beta_offset_div2 = pic->slice.slice_beta_offset_div2;
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enc->enc_pic.hevc_deblock.tc_offset_div2 = pic->slice.slice_tc_offset_div2;
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enc->enc_pic.hevc_deblock.cb_qp_offset = pic->slice.slice_cb_qp_offset;
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enc->enc_pic.hevc_deblock.cr_qp_offset = pic->slice.slice_cr_qp_offset;
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enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3 =
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pic->seq.log2_min_luma_coding_block_size_minus3;
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enc->enc_pic.hevc_spec_misc.amp_disabled = !pic->seq.amp_enabled_flag;
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enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled =
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pic->seq.strong_intra_smoothing_enabled_flag;
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enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag =
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pic->pic.constrained_intra_pred_flag;
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enc->enc_pic.hevc_spec_misc.cabac_init_flag = pic->slice.cabac_init_flag;
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enc->enc_pic.hevc_spec_misc.half_pel_enabled = 1;
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enc->enc_pic.hevc_spec_misc.quarter_pel_enabled = 1;
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enc->enc_pic.rc_layer_init[0].target_bit_rate = pic->rc.target_bitrate;
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enc->enc_pic.rc_layer_init[0].peak_bit_rate = pic->rc.peak_bitrate;
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enc->enc_pic.rc_layer_init[0].frame_rate_num = pic->rc.frame_rate_num;
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enc->enc_pic.rc_layer_init[0].frame_rate_den = pic->rc.frame_rate_den;
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enc->enc_pic.rc_layer_init[0].vbv_buffer_size = pic->rc.vbv_buffer_size;
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enc->enc_pic.rc_layer_init[0].avg_target_bits_per_picture = pic->rc.target_bits_picture;
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enc->enc_pic.rc_layer_init[0].peak_bits_per_picture_integer = pic->rc.peak_bits_picture_integer;
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enc->enc_pic.rc_layer_init[0].peak_bits_per_picture_fractional =
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pic->rc.peak_bits_picture_fraction;
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enc->enc_pic.rc_session_init.vbv_buffer_level = pic->rc.vbv_buf_lv;
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enc->enc_pic.rc_per_pic.qp = pic->rc.quant_i_frames;
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enc->enc_pic.rc_per_pic.min_qp_app = 0;
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enc->enc_pic.rc_per_pic.max_qp_app = 51;
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enc->enc_pic.rc_per_pic.max_au_size = 0;
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enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rc.fill_data_enable;
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enc->enc_pic.rc_per_pic.skip_frame_enable = false;
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enc->enc_pic.rc_per_pic.enforce_hrd = pic->rc.enforce_hrd;
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switch (pic->rc.rate_ctrl_method) {
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE:
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enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
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break;
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
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enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
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break;
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
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case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
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enc->enc_pic.rc_session_init.rate_control_method =
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RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR;
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break;
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default:
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enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
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}
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}
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if (picture->output_format == PIPE_FORMAT_NONE)
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picture->output_format = PIPE_FORMAT_NV12;
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if (picture->input_format != picture->output_format) {
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switch (picture->input_format) {
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case PIPE_FORMAT_P010:
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enc->enc_pic.input_format.input_color_volume = 0;
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enc->enc_pic.input_format.input_color_range = 0;
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enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
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enc->enc_pic.input_format.input_chroma_location = 0;
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enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_10_BIT;
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enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_P010;
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break;
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case PIPE_FORMAT_NV12:
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enc->enc_pic.input_format.input_color_volume = 0;
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enc->enc_pic.input_format.input_color_range = 0;
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enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
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enc->enc_pic.input_format.input_chroma_location = 0;
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enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_NV12;
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break;
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case PIPE_FORMAT_B8G8R8X8_UNORM: // RGB
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case PIPE_FORMAT_B8G8R8A8_UNORM:
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enc->enc_pic.input_format.input_color_volume = 0;
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enc->enc_pic.input_format.input_color_range = 0;
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enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_4_4;
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enc->enc_pic.input_format.input_chroma_location = 0;
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enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8;
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break;
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case PIPE_FORMAT_R8G8B8X8_UNORM:
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case PIPE_FORMAT_R8G8B8A8_UNORM:
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enc->enc_pic.input_format.input_color_volume = 0;
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enc->enc_pic.input_format.input_color_range = 0;
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enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_4_4;
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enc->enc_pic.input_format.input_chroma_location = 0;
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enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8;
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break;
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default:
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break;
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}
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switch(enc->enc_pic.input_format.input_color_packing_format) {
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case RENCODE_COLOR_PACKING_FORMAT_NV12:
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case RENCODE_COLOR_PACKING_FORMAT_P010:
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enc->enc_pic.input_format.input_color_space = RENCODE_COLOR_SPACE_YUV;
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break;
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case RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8:
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case RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8:
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enc->enc_pic.input_format.input_color_space = RENCODE_COLOR_SPACE_RGB;
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break;
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default:
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break;
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}
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switch (picture->output_format) {
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case PIPE_FORMAT_P010:
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enc->enc_pic.output_format.output_color_volume = 0;
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enc->enc_pic.output_format.output_color_range = 0;
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enc->enc_pic.output_format.output_chroma_location = 0;
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enc->enc_pic.output_format.output_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_10_BIT;
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break;
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case PIPE_FORMAT_NV12:
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enc->enc_pic.output_format.output_color_volume = 0;
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enc->enc_pic.output_format.output_color_range = 0;
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enc->enc_pic.output_format.output_chroma_location = 0;
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enc->enc_pic.output_format.output_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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break;
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default:
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break;
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}
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}
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}
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static void flush(struct radeon_encoder *enc)
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{
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enc->ws->cs_flush(&enc->cs, PIPE_FLUSH_ASYNC, NULL);
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}
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static void radeon_enc_flush(struct pipe_video_codec *encoder)
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{
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struct radeon_encoder *enc = (struct radeon_encoder *)encoder;
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flush(enc);
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}
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static void radeon_enc_cs_flush(void *ctx, unsigned flags, struct pipe_fence_handle **fence)
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{
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// just ignored
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}
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static unsigned get_cpb_num(struct radeon_encoder *enc)
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{
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unsigned w = align(enc->base.width, 16) / 16;
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|
unsigned h = align(enc->base.height, 16) / 16;
|
|
unsigned dpb;
|
|
|
|
switch (enc->base.level) {
|
|
case 10:
|
|
dpb = 396;
|
|
break;
|
|
case 11:
|
|
dpb = 900;
|
|
break;
|
|
case 12:
|
|
case 13:
|
|
case 20:
|
|
dpb = 2376;
|
|
break;
|
|
case 21:
|
|
dpb = 4752;
|
|
break;
|
|
case 22:
|
|
case 30:
|
|
dpb = 8100;
|
|
break;
|
|
case 31:
|
|
dpb = 18000;
|
|
break;
|
|
case 32:
|
|
dpb = 20480;
|
|
break;
|
|
case 40:
|
|
case 41:
|
|
dpb = 32768;
|
|
break;
|
|
case 42:
|
|
dpb = 34816;
|
|
break;
|
|
case 50:
|
|
dpb = 110400;
|
|
break;
|
|
default:
|
|
case 51:
|
|
case 52:
|
|
dpb = 184320;
|
|
break;
|
|
}
|
|
|
|
return MIN2(dpb / (w * h), 16);
|
|
}
|
|
|
|
static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
|
|
struct pipe_video_buffer *source,
|
|
struct pipe_picture_desc *picture)
|
|
{
|
|
struct radeon_encoder *enc = (struct radeon_encoder *)encoder;
|
|
struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
|
|
bool need_rate_control = false;
|
|
|
|
if (u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC) {
|
|
struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
|
|
need_rate_control =
|
|
(enc->enc_pic.rc_layer_init[0].target_bit_rate != pic->rate_ctrl[0].target_bitrate) ||
|
|
(enc->enc_pic.rc_layer_init[0].frame_rate_num != pic->rate_ctrl[0].frame_rate_num) ||
|
|
(enc->enc_pic.rc_layer_init[0].frame_rate_den != pic->rate_ctrl[0].frame_rate_den);
|
|
} else if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
|
|
struct pipe_h265_enc_picture_desc *pic = (struct pipe_h265_enc_picture_desc *)picture;
|
|
need_rate_control = enc->enc_pic.rc_layer_init[0].target_bit_rate != pic->rc.target_bitrate;
|
|
}
|
|
|
|
radeon_vcn_enc_get_param(enc, picture);
|
|
|
|
if (source->buffer_format == PIPE_FORMAT_NV12 ||
|
|
source->buffer_format == PIPE_FORMAT_P010 ||
|
|
source->buffer_format == PIPE_FORMAT_P016) {
|
|
enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
|
|
enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
|
|
}
|
|
else {
|
|
enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
|
|
enc->chroma = NULL;
|
|
}
|
|
|
|
enc->need_feedback = false;
|
|
|
|
if (!enc->stream_handle) {
|
|
struct rvid_buffer fb;
|
|
enc->stream_handle = si_vid_alloc_stream_handle();
|
|
enc->si = CALLOC_STRUCT(rvid_buffer);
|
|
si_vid_create_buffer(enc->screen, enc->si, 128 * 1024, PIPE_USAGE_STAGING);
|
|
si_vid_create_buffer(enc->screen, &fb, 4096, PIPE_USAGE_STAGING);
|
|
enc->fb = &fb;
|
|
enc->begin(enc);
|
|
flush(enc);
|
|
si_vid_destroy_buffer(&fb);
|
|
}
|
|
if (need_rate_control) {
|
|
enc->begin(enc);
|
|
flush(enc);
|
|
}
|
|
}
|
|
|
|
static void radeon_enc_encode_bitstream(struct pipe_video_codec *encoder,
|
|
struct pipe_video_buffer *source,
|
|
struct pipe_resource *destination, void **fb)
|
|
{
|
|
struct radeon_encoder *enc = (struct radeon_encoder *)encoder;
|
|
enc->get_buffer(destination, &enc->bs_handle, NULL);
|
|
enc->bs_size = destination->width0;
|
|
|
|
*fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
|
|
|
|
if (!si_vid_create_buffer(enc->screen, enc->fb, 4096, PIPE_USAGE_STAGING)) {
|
|
RVID_ERR("Can't create feedback buffer.\n");
|
|
return;
|
|
}
|
|
|
|
enc->need_feedback = true;
|
|
enc->encode(enc);
|
|
}
|
|
|
|
static void radeon_enc_end_frame(struct pipe_video_codec *encoder, struct pipe_video_buffer *source,
|
|
struct pipe_picture_desc *picture)
|
|
{
|
|
struct radeon_encoder *enc = (struct radeon_encoder *)encoder;
|
|
flush(enc);
|
|
}
|
|
|
|
static void radeon_enc_destroy(struct pipe_video_codec *encoder)
|
|
{
|
|
struct radeon_encoder *enc = (struct radeon_encoder *)encoder;
|
|
|
|
if (enc->stream_handle) {
|
|
struct rvid_buffer fb;
|
|
enc->need_feedback = false;
|
|
si_vid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
|
|
enc->fb = &fb;
|
|
enc->destroy(enc);
|
|
flush(enc);
|
|
if (enc->si) {
|
|
si_vid_destroy_buffer(enc->si);
|
|
FREE(enc->si);
|
|
enc->si = NULL;
|
|
}
|
|
si_vid_destroy_buffer(&fb);
|
|
}
|
|
|
|
if (enc->efc) {
|
|
si_vid_destroy_buffer(enc->efc);
|
|
FREE(enc->efc);
|
|
enc->efc = NULL;
|
|
}
|
|
si_vid_destroy_buffer(&enc->cpb);
|
|
enc->ws->cs_destroy(&enc->cs);
|
|
FREE(enc);
|
|
}
|
|
|
|
static void radeon_enc_get_feedback(struct pipe_video_codec *encoder, void *feedback,
|
|
unsigned *size)
|
|
{
|
|
struct radeon_encoder *enc = (struct radeon_encoder *)encoder;
|
|
struct rvid_buffer *fb = feedback;
|
|
|
|
if (size) {
|
|
uint32_t *ptr = enc->ws->buffer_map(enc->ws, fb->res->buf, &enc->cs,
|
|
PIPE_MAP_READ_WRITE | RADEON_MAP_TEMPORARY);
|
|
if (ptr[1])
|
|
*size = ptr[6];
|
|
else
|
|
*size = 0;
|
|
enc->ws->buffer_unmap(enc->ws, fb->res->buf);
|
|
}
|
|
|
|
si_vid_destroy_buffer(fb);
|
|
FREE(fb);
|
|
}
|
|
|
|
static int setup_dpb(struct radeon_encoder *enc, enum pipe_format buffer_format,
|
|
enum amd_gfx_level gfx_level)
|
|
{
|
|
uint32_t aligned_width = align(enc->base.width, 16);
|
|
uint32_t aligned_height = align(enc->base.height, 16);
|
|
uint32_t rec_luma_pitch = align(aligned_width, enc->alignment);
|
|
|
|
int luma_size = rec_luma_pitch * align(aligned_height, enc->alignment);
|
|
if (buffer_format == PIPE_FORMAT_P010)
|
|
luma_size *= 2;
|
|
int chroma_size = align(luma_size / 2, enc->alignment);
|
|
int offset = 0;
|
|
|
|
uint32_t num_reconstructed_pictures = enc->base.max_references + 1;
|
|
assert(num_reconstructed_pictures <= RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES);
|
|
|
|
int i;
|
|
for (i = 0; i < num_reconstructed_pictures; i++) {
|
|
if (gfx_level >= GFX11) {
|
|
enc->enc_pic.ctx_buf.reconstructed_pictures_v4_0[i].luma_offset = offset;
|
|
offset += luma_size;
|
|
enc->enc_pic.ctx_buf.reconstructed_pictures_v4_0[i].chroma_offset = offset;
|
|
offset += chroma_size;
|
|
} else {
|
|
enc->enc_pic.ctx_buf.reconstructed_pictures[i].luma_offset = offset;
|
|
offset += luma_size;
|
|
enc->enc_pic.ctx_buf.reconstructed_pictures[i].chroma_offset = offset;
|
|
offset += chroma_size;
|
|
}
|
|
}
|
|
for (; i < RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES; i++) {
|
|
enc->enc_pic.ctx_buf.reconstructed_pictures[i].luma_offset = 0;
|
|
enc->enc_pic.ctx_buf.reconstructed_pictures[i].chroma_offset = 0;
|
|
}
|
|
|
|
enc->enc_pic.ctx_buf.num_reconstructed_pictures = num_reconstructed_pictures;
|
|
enc->dpb_size = offset;
|
|
|
|
return offset;
|
|
}
|
|
|
|
struct pipe_video_codec *radeon_create_encoder(struct pipe_context *context,
|
|
const struct pipe_video_codec *templ,
|
|
struct radeon_winsys *ws,
|
|
radeon_enc_get_buffer get_buffer)
|
|
{
|
|
struct si_screen *sscreen = (struct si_screen *)context->screen;
|
|
struct si_context *sctx = (struct si_context *)context;
|
|
struct radeon_encoder *enc;
|
|
struct pipe_video_buffer *tmp_buf, templat = {};
|
|
struct radeon_surf *tmp_surf;
|
|
unsigned cpb_size;
|
|
|
|
enc = CALLOC_STRUCT(radeon_encoder);
|
|
|
|
if (!enc)
|
|
return NULL;
|
|
|
|
enc->alignment = 256;
|
|
enc->base = *templ;
|
|
enc->base.context = context;
|
|
enc->base.destroy = radeon_enc_destroy;
|
|
enc->base.begin_frame = radeon_enc_begin_frame;
|
|
enc->base.encode_bitstream = radeon_enc_encode_bitstream;
|
|
enc->base.end_frame = radeon_enc_end_frame;
|
|
enc->base.flush = radeon_enc_flush;
|
|
enc->base.get_feedback = radeon_enc_get_feedback;
|
|
enc->get_buffer = get_buffer;
|
|
enc->bits_in_shifter = 0;
|
|
enc->screen = context->screen;
|
|
enc->ws = ws;
|
|
|
|
if (!ws->cs_create(&enc->cs, sctx->ctx, AMD_IP_VCN_ENC, radeon_enc_cs_flush, enc, false)) {
|
|
RVID_ERR("Can't get command submission context.\n");
|
|
goto error;
|
|
}
|
|
|
|
templat.buffer_format = PIPE_FORMAT_NV12;
|
|
if (enc->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
|
|
templat.buffer_format = PIPE_FORMAT_P010;
|
|
templat.width = enc->base.width;
|
|
templat.height = enc->base.height;
|
|
templat.interlaced = false;
|
|
|
|
if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
|
|
RVID_ERR("Can't create video buffer.\n");
|
|
goto error;
|
|
}
|
|
|
|
enc->cpb_num = get_cpb_num(enc);
|
|
|
|
if (!enc->cpb_num)
|
|
goto error;
|
|
|
|
get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
|
|
|
|
cpb_size = (sscreen->info.gfx_level < GFX9)
|
|
? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
|
|
align(tmp_surf->u.legacy.level[0].nblk_y, 32)
|
|
: align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) *
|
|
align(tmp_surf->u.gfx9.surf_height, 32);
|
|
|
|
cpb_size = cpb_size * 3 / 2;
|
|
cpb_size = cpb_size * enc->cpb_num;
|
|
tmp_buf->destroy(tmp_buf);
|
|
|
|
cpb_size += setup_dpb(enc, templat.buffer_format, sscreen->info.gfx_level);
|
|
|
|
if (!si_vid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
|
|
RVID_ERR("Can't create CPB buffer.\n");
|
|
goto error;
|
|
}
|
|
|
|
if (sscreen->info.gfx_level >= GFX11)
|
|
radeon_enc_4_0_init(enc);
|
|
else if (sscreen->info.family >= CHIP_NAVI21)
|
|
radeon_enc_3_0_init(enc);
|
|
else if (sscreen->info.family >= CHIP_RENOIR)
|
|
radeon_enc_2_0_init(enc);
|
|
else
|
|
radeon_enc_1_2_init(enc);
|
|
|
|
return &enc->base;
|
|
|
|
error:
|
|
enc->ws->cs_destroy(&enc->cs);
|
|
|
|
si_vid_destroy_buffer(&enc->cpb);
|
|
|
|
FREE(enc);
|
|
return NULL;
|
|
}
|
|
|
|
void radeon_enc_add_buffer(struct radeon_encoder *enc, struct pb_buffer *buf,
|
|
unsigned usage, enum radeon_bo_domain domain, signed offset)
|
|
{
|
|
enc->ws->cs_add_buffer(&enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, domain);
|
|
uint64_t addr;
|
|
addr = enc->ws->buffer_get_virtual_address(buf);
|
|
addr = addr + offset;
|
|
RADEON_ENC_CS(addr >> 32);
|
|
RADEON_ENC_CS(addr);
|
|
}
|
|
|
|
void radeon_enc_set_emulation_prevention(struct radeon_encoder *enc, bool set)
|
|
{
|
|
if (set != enc->emulation_prevention) {
|
|
enc->emulation_prevention = set;
|
|
enc->num_zeros = 0;
|
|
}
|
|
}
|
|
|
|
void radeon_enc_output_one_byte(struct radeon_encoder *enc, unsigned char byte)
|
|
{
|
|
if (enc->byte_index == 0)
|
|
enc->cs.current.buf[enc->cs.current.cdw] = 0;
|
|
enc->cs.current.buf[enc->cs.current.cdw] |=
|
|
((unsigned int)(byte) << index_to_shifts[enc->byte_index]);
|
|
enc->byte_index++;
|
|
|
|
if (enc->byte_index >= 4) {
|
|
enc->byte_index = 0;
|
|
enc->cs.current.cdw++;
|
|
}
|
|
}
|
|
|
|
void radeon_enc_emulation_prevention(struct radeon_encoder *enc, unsigned char byte)
|
|
{
|
|
if (enc->emulation_prevention) {
|
|
if ((enc->num_zeros >= 2) && ((byte == 0x00) || (byte == 0x01) ||
|
|
(byte == 0x02) || (byte == 0x03))) {
|
|
radeon_enc_output_one_byte(enc, 0x03);
|
|
enc->bits_output += 8;
|
|
enc->num_zeros = 0;
|
|
}
|
|
enc->num_zeros = (byte == 0 ? (enc->num_zeros + 1) : 0);
|
|
}
|
|
}
|
|
|
|
void radeon_enc_code_fixed_bits(struct radeon_encoder *enc, unsigned int value,
|
|
unsigned int num_bits)
|
|
{
|
|
unsigned int bits_to_pack = 0;
|
|
enc->bits_size += num_bits;
|
|
|
|
while (num_bits > 0) {
|
|
unsigned int value_to_pack = value & (0xffffffff >> (32 - num_bits));
|
|
bits_to_pack =
|
|
num_bits > (32 - enc->bits_in_shifter) ? (32 - enc->bits_in_shifter) : num_bits;
|
|
|
|
if (bits_to_pack < num_bits)
|
|
value_to_pack = value_to_pack >> (num_bits - bits_to_pack);
|
|
|
|
enc->shifter |= value_to_pack << (32 - enc->bits_in_shifter - bits_to_pack);
|
|
num_bits -= bits_to_pack;
|
|
enc->bits_in_shifter += bits_to_pack;
|
|
|
|
while (enc->bits_in_shifter >= 8) {
|
|
unsigned char output_byte = (unsigned char)(enc->shifter >> 24);
|
|
enc->shifter <<= 8;
|
|
radeon_enc_emulation_prevention(enc, output_byte);
|
|
radeon_enc_output_one_byte(enc, output_byte);
|
|
enc->bits_in_shifter -= 8;
|
|
enc->bits_output += 8;
|
|
}
|
|
}
|
|
}
|
|
|
|
void radeon_enc_reset(struct radeon_encoder *enc)
|
|
{
|
|
enc->emulation_prevention = false;
|
|
enc->shifter = 0;
|
|
enc->bits_in_shifter = 0;
|
|
enc->bits_output = 0;
|
|
enc->num_zeros = 0;
|
|
enc->byte_index = 0;
|
|
enc->bits_size = 0;
|
|
}
|
|
|
|
void radeon_enc_byte_align(struct radeon_encoder *enc)
|
|
{
|
|
unsigned int num_padding_zeros = (32 - enc->bits_in_shifter) % 8;
|
|
|
|
if (num_padding_zeros > 0)
|
|
radeon_enc_code_fixed_bits(enc, 0, num_padding_zeros);
|
|
}
|
|
|
|
void radeon_enc_flush_headers(struct radeon_encoder *enc)
|
|
{
|
|
if (enc->bits_in_shifter != 0) {
|
|
unsigned char output_byte = (unsigned char)(enc->shifter >> 24);
|
|
radeon_enc_emulation_prevention(enc, output_byte);
|
|
radeon_enc_output_one_byte(enc, output_byte);
|
|
enc->bits_output += enc->bits_in_shifter;
|
|
enc->shifter = 0;
|
|
enc->bits_in_shifter = 0;
|
|
enc->num_zeros = 0;
|
|
}
|
|
|
|
if (enc->byte_index > 0) {
|
|
enc->cs.current.cdw++;
|
|
enc->byte_index = 0;
|
|
}
|
|
}
|
|
|
|
void radeon_enc_code_ue(struct radeon_encoder *enc, unsigned int value)
|
|
{
|
|
int x = -1;
|
|
unsigned int ue_code = value + 1;
|
|
value += 1;
|
|
|
|
while (value) {
|
|
value = (value >> 1);
|
|
x += 1;
|
|
}
|
|
|
|
unsigned int ue_length = (x << 1) + 1;
|
|
radeon_enc_code_fixed_bits(enc, ue_code, ue_length);
|
|
}
|
|
|
|
void radeon_enc_code_se(struct radeon_encoder *enc, int value)
|
|
{
|
|
unsigned int v = 0;
|
|
|
|
if (value != 0)
|
|
v = (value < 0 ? ((unsigned int)(0 - value) << 1) : (((unsigned int)(value) << 1) - 1));
|
|
|
|
radeon_enc_code_ue(enc, v);
|
|
}
|