175 lines
4.9 KiB
C
175 lines
4.9 KiB
C
/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef INTEL_GEM_H
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#define INTEL_GEM_H
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#include "drm-uapi/i915_drm.h"
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#include <assert.h>
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#include <errno.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <sys/ioctl.h>
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static inline uint64_t
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intel_canonical_address(uint64_t v)
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{
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/* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
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*
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* "This field specifies the address of the memory location where the
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* register value specified in the DWord above will read from. The
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* address specifies the DWord location of the data. Range =
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* GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
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* [63:48] are ignored by the HW and assumed to be in correct
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* canonical form [63:48] == [47]."
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*/
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const int shift = 63 - 47;
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return (int64_t)(v << shift) >> shift;
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}
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/**
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* This returns a 48-bit address with the high 16 bits zeroed.
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*
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* It's the opposite of intel_canonicalize_address.
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*/
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static inline uint64_t
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intel_48b_address(uint64_t v)
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{
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const int shift = 63 - 47;
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return (uint64_t)(v << shift) >> shift;
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}
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/**
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* Call ioctl, restarting if it is interrupted
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*/
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static inline int
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intel_ioctl(int fd, unsigned long request, void *arg)
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{
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int ret;
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do {
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ret = ioctl(fd, request, arg);
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} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
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return ret;
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}
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static inline uint64_t
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intel_read_gpu_timestamp(int fd)
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{
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struct drm_i915_reg_read reg_read = {};
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const uint64_t render_ring_timestamp = 0x2358;
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reg_read.offset = render_ring_timestamp | I915_REG_READ_8B_WA;
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if (intel_ioctl(fd, DRM_IOCTL_I915_REG_READ, ®_read) < 0)
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return 0;
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return reg_read.val;
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}
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/**
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* A wrapper around DRM_IOCTL_I915_QUERY
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*
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* Unfortunately, the error semantics of this ioctl are rather annoying so
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* it's better to have a common helper.
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*/
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static inline int
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intel_i915_query_flags(int fd, uint64_t query_id, uint32_t flags,
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void *buffer, int32_t *buffer_len)
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{
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struct drm_i915_query_item item = {
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.query_id = query_id,
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.length = *buffer_len,
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.flags = flags,
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.data_ptr = (uintptr_t)buffer,
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};
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struct drm_i915_query args = {
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.num_items = 1,
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.flags = 0,
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.items_ptr = (uintptr_t)&item,
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};
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int ret = intel_ioctl(fd, DRM_IOCTL_I915_QUERY, &args);
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if (ret != 0)
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return -errno;
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else if (item.length < 0)
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return item.length;
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*buffer_len = item.length;
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return 0;
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}
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static inline int
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intel_i915_query(int fd, uint64_t query_id, void *buffer,
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int32_t *buffer_len)
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{
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return intel_i915_query_flags(fd, query_id, 0, buffer, buffer_len);
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}
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/**
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* Query for the given data, allocating as needed
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*
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* The caller is responsible for freeing the returned pointer.
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*/
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static inline void *
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intel_i915_query_alloc(int fd, uint64_t query_id, int32_t *query_length)
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{
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if (query_length)
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*query_length = 0;
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int32_t length = 0;
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int ret = intel_i915_query(fd, query_id, NULL, &length);
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if (ret < 0)
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return NULL;
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void *data = calloc(1, length);
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assert(data != NULL); /* This shouldn't happen in practice */
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if (data == NULL)
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return NULL;
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ret = intel_i915_query(fd, query_id, data, &length);
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assert(ret == 0); /* We should have caught the error above */
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if (ret < 0) {
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free(data);
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return NULL;
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}
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if (query_length)
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*query_length = length;
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return data;
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}
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bool intel_gem_supports_syncobj_wait(int fd);
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int intel_gem_count_engines(const struct drm_i915_query_engine_info *info,
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enum drm_i915_gem_engine_class engine_class);
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int intel_gem_create_context_engines(int fd,
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const struct drm_i915_query_engine_info *info,
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int num_engines, uint16_t *engine_classes);
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#endif /* INTEL_GEM_H */
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