110 lines
3.7 KiB
C
110 lines
3.7 KiB
C
/*
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* Copyright © 2020 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef CROCUS_FINE_FENCE_DOT_H
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#define CROCUS_FINE_FENCE_DOT_H
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#include <stdbool.h>
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#include <stdint.h>
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#include "crocus_screen.h"
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#include "crocus_resource.h"
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/**
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* A lightweight sequence number fence.
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*
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* We emit PIPE_CONTROLs inside a batch (possibly in the middle)
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* which update a monotonically increasing, 32-bit counter. We
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* can then check if that moment has passed by either:
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*
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* 1. Checking on the CPU by snooping on the DWord via a coherent map
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*
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* 2. Blocking on the GPU with MI_SEMAPHORE_WAIT from a second batch
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* (relying on mid-batch preemption to switch GPU execution to the
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* batch that writes it).
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*/
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struct crocus_fine_fence {
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struct pipe_reference reference;
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/** Buffer where the seqno lives */
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struct crocus_state_ref ref;
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/** Coherent CPU map of the buffer containing the seqno DWord. */
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const uint32_t *map;
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/**
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* A drm_syncobj pointing which will be signaled at the end of the
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* batch which writes this seqno. This can be used to block until
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* the seqno has definitely passed (but may wait longer than necessary).
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*/
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struct crocus_syncobj *syncobj;
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#define CROCUS_FENCE_BOTTOM_OF_PIPE 0x0 /**< Written by bottom-of-pipe flush */
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#define CROCUS_FENCE_TOP_OF_PIPE 0x1 /**< Written by top-of-pipe flush */
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#define CROCUS_FENCE_END 0x2 /**< Written at the end of a batch */
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/** Information about the type of flush involved (see CROCUS_FENCE_*) */
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uint32_t flags;
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/**
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* Sequence number expected to be written by the flush we inserted
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* when creating this fence. The crocus_fine_fence is 'signaled' when *@map
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* (written by the flush on the GPU) is greater-than-or-equal to @seqno.
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*/
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uint32_t seqno;
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};
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void crocus_fine_fence_init(struct crocus_batch *batch);
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struct crocus_fine_fence *crocus_fine_fence_new(struct crocus_batch *batch,
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unsigned flags);
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void crocus_fine_fence_destroy(struct crocus_screen *screen,
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struct crocus_fine_fence *sq);
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static inline void
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crocus_fine_fence_reference(struct crocus_screen *screen,
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struct crocus_fine_fence **dst,
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struct crocus_fine_fence *src)
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{
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if (pipe_reference(&(*dst)->reference, &src->reference))
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crocus_fine_fence_destroy(screen, *dst);
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*dst = src;
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}
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/**
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* Return true if this seqno has passed.
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*
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* NULL is considered signaled.
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*/
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static inline bool
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crocus_fine_fence_signaled(const struct crocus_fine_fence *sq)
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{
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if (sq && !sq->map)
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return false;
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return !sq || (READ_ONCE(*sq->map) >= sq->seqno);
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}
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#endif
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