mesa/docs/gallium
Eric Anholt 5de3cbbb2e nir: Generate load_ubo_vec4 directly for !PIPE_CAP_NATIVE_INTEGERS
The prog_to_nir->NIR-to-TGSI change ended up causing regressions on r300,
and svga against r300-class hardware, because nir_lower_uniforms_to_ubo()
introduced shifts that nir_lower_ubo_vec4() tried to reverse, but that NIR
couldn't prove are no-ops (since shifting up and back down may drop bits),
and the hardware can't do the integer ops.

Instead, make it so that nir_lower_uniforms_to_ubo can generate
nir_intrinsic_load_ubo_vec4 directly for !INTEGER hardware.

Fixes: cf3fc79cd0 ("st/mesa: Replace mesa_to_tgsi() with prog_to_nir() and nir_to_tgsi().")
Closes: #4602
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10194>
2021-04-16 21:58:00 +00:00
..
cso docs: anistropy -> anisotropy 2020-10-28 10:27:51 +00:00
buffermapping.rst docs: fix invalid rst 2021-04-01 08:15:08 +00:00
context.rst gallium: add take_ownership param into set_constant_buffer to eliminate atomics 2021-01-27 23:53:34 +00:00
cso.rst
debugging.rst aux/trace: add GALLIUM_TRACE_TRIGGER mode 2021-04-08 00:01:31 +00:00
distro.rst
format.rst
glossary.rst
index.rst docs: Add some documentation of game GL buffer object mapping behavior. 2021-03-09 09:24:23 -08:00
intro.rst
pipeline.txt
postprocess.rst docs: move gallium specific docs into gallium folder 2020-07-07 10:22:08 +00:00
resources.rst
screen.rst nir: Generate load_ubo_vec4 directly for !PIPE_CAP_NATIVE_INTEGERS 2021-04-16 21:58:00 +00:00
tgsi.rst docs: lod -> LOD 2021-03-31 16:23:19 +00:00