660 lines
21 KiB
C
660 lines
21 KiB
C
/*
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* Copyright © 2016 Red Hat
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* based on intel anv code:
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "radv_meta.h"
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#include <fcntl.h>
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#include <limits.h>
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#include <pwd.h>
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#include <sys/stat.h>
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void
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radv_meta_save(struct radv_meta_saved_state *state,
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struct radv_cmd_buffer *cmd_buffer, uint32_t flags)
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{
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VkPipelineBindPoint bind_point =
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flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
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VK_PIPELINE_BIND_POINT_GRAPHICS :
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VK_PIPELINE_BIND_POINT_COMPUTE;
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struct radv_descriptor_state *descriptors_state =
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radv_get_descriptors_state(cmd_buffer, bind_point);
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assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE |
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RADV_META_SAVE_COMPUTE_PIPELINE));
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state->flags = flags;
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if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
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assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE));
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state->old_pipeline = cmd_buffer->state.pipeline;
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/* Save all viewports. */
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state->viewport.count = cmd_buffer->state.dynamic.viewport.count;
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typed_memcpy(state->viewport.viewports,
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cmd_buffer->state.dynamic.viewport.viewports,
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MAX_VIEWPORTS);
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/* Save all scissors. */
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state->scissor.count = cmd_buffer->state.dynamic.scissor.count;
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typed_memcpy(state->scissor.scissors,
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cmd_buffer->state.dynamic.scissor.scissors,
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MAX_SCISSORS);
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state->cull_mode = cmd_buffer->state.dynamic.cull_mode;
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state->front_face = cmd_buffer->state.dynamic.front_face;
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state->primitive_topology = cmd_buffer->state.dynamic.primitive_topology;
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state->depth_test_enable = cmd_buffer->state.dynamic.depth_test_enable;
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state->depth_write_enable = cmd_buffer->state.dynamic.depth_write_enable;
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state->depth_compare_op = cmd_buffer->state.dynamic.depth_compare_op;
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state->depth_bounds_test_enable = cmd_buffer->state.dynamic.depth_bounds_test_enable;
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state->stencil_test_enable = cmd_buffer->state.dynamic.stencil_test_enable;
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state->stencil_op.front.compare_op = cmd_buffer->state.dynamic.stencil_op.front.compare_op;
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state->stencil_op.front.fail_op = cmd_buffer->state.dynamic.stencil_op.front.fail_op;
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state->stencil_op.front.pass_op = cmd_buffer->state.dynamic.stencil_op.front.pass_op;
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state->stencil_op.front.depth_fail_op = cmd_buffer->state.dynamic.stencil_op.front.depth_fail_op;
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state->stencil_op.back.compare_op = cmd_buffer->state.dynamic.stencil_op.back.compare_op;
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state->stencil_op.back.fail_op = cmd_buffer->state.dynamic.stencil_op.back.fail_op;
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state->stencil_op.back.pass_op = cmd_buffer->state.dynamic.stencil_op.back.pass_op;
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state->stencil_op.back.depth_fail_op = cmd_buffer->state.dynamic.stencil_op.back.depth_fail_op;
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}
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if (state->flags & RADV_META_SAVE_SAMPLE_LOCATIONS) {
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typed_memcpy(&state->sample_location,
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&cmd_buffer->state.dynamic.sample_location, 1);
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}
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if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
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assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE));
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state->old_pipeline = cmd_buffer->state.compute_pipeline;
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}
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if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
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state->old_descriptor_set0 = descriptors_state->sets[0];
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if (!(descriptors_state->valid & 1) || !state->old_descriptor_set0)
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state->flags &= ~RADV_META_SAVE_DESCRIPTORS;
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}
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if (state->flags & RADV_META_SAVE_CONSTANTS) {
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memcpy(state->push_constants, cmd_buffer->push_constants,
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MAX_PUSH_CONSTANTS_SIZE);
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}
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if (state->flags & RADV_META_SAVE_PASS) {
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state->pass = cmd_buffer->state.pass;
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state->subpass = cmd_buffer->state.subpass;
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state->framebuffer = cmd_buffer->state.framebuffer;
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state->attachments = cmd_buffer->state.attachments;
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state->render_area = cmd_buffer->state.render_area;
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}
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}
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void
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radv_meta_restore(const struct radv_meta_saved_state *state,
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struct radv_cmd_buffer *cmd_buffer)
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{
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VkPipelineBindPoint bind_point =
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state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
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VK_PIPELINE_BIND_POINT_GRAPHICS :
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VK_PIPELINE_BIND_POINT_COMPUTE;
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if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
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radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
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VK_PIPELINE_BIND_POINT_GRAPHICS,
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radv_pipeline_to_handle(state->old_pipeline));
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
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/* Restore all viewports. */
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cmd_buffer->state.dynamic.viewport.count = state->viewport.count;
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typed_memcpy(cmd_buffer->state.dynamic.viewport.viewports,
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state->viewport.viewports,
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MAX_VIEWPORTS);
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/* Restore all scissors. */
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cmd_buffer->state.dynamic.scissor.count = state->scissor.count;
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typed_memcpy(cmd_buffer->state.dynamic.scissor.scissors,
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state->scissor.scissors,
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MAX_SCISSORS);
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cmd_buffer->state.dynamic.cull_mode = state->cull_mode;
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cmd_buffer->state.dynamic.front_face = state->front_face;
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cmd_buffer->state.dynamic.primitive_topology = state->primitive_topology;
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cmd_buffer->state.dynamic.depth_test_enable = state->depth_test_enable;
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cmd_buffer->state.dynamic.depth_write_enable = state->depth_write_enable;
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cmd_buffer->state.dynamic.depth_compare_op = state->depth_compare_op;
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cmd_buffer->state.dynamic.depth_bounds_test_enable = state->depth_bounds_test_enable;
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cmd_buffer->state.dynamic.stencil_test_enable = state->stencil_test_enable;
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cmd_buffer->state.dynamic.stencil_op.front.compare_op = state->stencil_op.front.compare_op;
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cmd_buffer->state.dynamic.stencil_op.front.fail_op = state->stencil_op.front.fail_op;
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cmd_buffer->state.dynamic.stencil_op.front.pass_op = state->stencil_op.front.pass_op;
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cmd_buffer->state.dynamic.stencil_op.front.depth_fail_op = state->stencil_op.front.depth_fail_op;
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cmd_buffer->state.dynamic.stencil_op.back.compare_op = state->stencil_op.back.compare_op;
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cmd_buffer->state.dynamic.stencil_op.back.fail_op = state->stencil_op.back.fail_op;
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cmd_buffer->state.dynamic.stencil_op.back.pass_op = state->stencil_op.back.pass_op;
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cmd_buffer->state.dynamic.stencil_op.back.depth_fail_op = state->stencil_op.back.depth_fail_op;
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT |
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RADV_CMD_DIRTY_DYNAMIC_SCISSOR |
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RADV_CMD_DIRTY_DYNAMIC_CULL_MODE |
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RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE |
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RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY |
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RADV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE |
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RADV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE |
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RADV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
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RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE |
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RADV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE |
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RADV_CMD_DIRTY_DYNAMIC_STENCIL_OP;
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}
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if (state->flags & RADV_META_SAVE_SAMPLE_LOCATIONS) {
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typed_memcpy(&cmd_buffer->state.dynamic.sample_location.locations,
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&state->sample_location.locations, 1);
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS;
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}
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if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
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radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
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VK_PIPELINE_BIND_POINT_COMPUTE,
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radv_pipeline_to_handle(state->old_pipeline));
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}
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if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
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radv_set_descriptor_set(cmd_buffer, bind_point,
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state->old_descriptor_set0, 0);
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}
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if (state->flags & RADV_META_SAVE_CONSTANTS) {
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VkShaderStageFlags stages = VK_SHADER_STAGE_COMPUTE_BIT;
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if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE)
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stages |= VK_SHADER_STAGE_ALL_GRAPHICS;
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radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
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VK_NULL_HANDLE, stages, 0,
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MAX_PUSH_CONSTANTS_SIZE,
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state->push_constants);
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}
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if (state->flags & RADV_META_SAVE_PASS) {
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cmd_buffer->state.pass = state->pass;
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cmd_buffer->state.subpass = state->subpass;
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cmd_buffer->state.framebuffer = state->framebuffer;
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cmd_buffer->state.attachments = state->attachments;
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cmd_buffer->state.render_area = state->render_area;
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if (state->subpass)
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER;
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}
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}
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VkImageViewType
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radv_meta_get_view_type(const struct radv_image *image)
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{
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switch (image->type) {
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case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
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case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
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case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
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default:
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unreachable("bad VkImageViewType");
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}
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}
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/**
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* When creating a destination VkImageView, this function provides the needed
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* VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
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*/
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uint32_t
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radv_meta_get_iview_layer(const struct radv_image *dest_image,
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const VkImageSubresourceLayers *dest_subresource,
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const VkOffset3D *dest_offset)
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{
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switch (dest_image->type) {
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case VK_IMAGE_TYPE_1D:
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case VK_IMAGE_TYPE_2D:
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return dest_subresource->baseArrayLayer;
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case VK_IMAGE_TYPE_3D:
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/* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
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* but meta does it anyway. When doing so, we translate the
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* destination's z offset into an array offset.
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*/
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return dest_offset->z;
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default:
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assert(!"bad VkImageType");
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return 0;
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}
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}
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static void *
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meta_alloc(void* _device, size_t size, size_t alignment,
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VkSystemAllocationScope allocationScope)
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{
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struct radv_device *device = _device;
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return device->vk.alloc.pfnAllocation(device->vk.alloc.pUserData, size, alignment,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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}
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static void *
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meta_realloc(void* _device, void *original, size_t size, size_t alignment,
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VkSystemAllocationScope allocationScope)
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{
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struct radv_device *device = _device;
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return device->vk.alloc.pfnReallocation(device->vk.alloc.pUserData, original,
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size, alignment,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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}
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static void
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meta_free(void* _device, void *data)
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{
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struct radv_device *device = _device;
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return device->vk.alloc.pfnFree(device->vk.alloc.pUserData, data);
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}
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static bool
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radv_builtin_cache_path(char *path)
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{
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char *xdg_cache_home = getenv("XDG_CACHE_HOME");
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const char *suffix = "/radv_builtin_shaders";
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const char *suffix2 = "/.cache/radv_builtin_shaders";
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struct passwd pwd, *result;
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char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
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int ret;
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if (xdg_cache_home) {
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ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
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xdg_cache_home, suffix, sizeof(void *) * 8);
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return ret > 0 && ret < PATH_MAX + 1;
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}
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getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
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if (!result)
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return false;
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strcpy(path, pwd.pw_dir);
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strcat(path, "/.cache");
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if (mkdir(path, 0755) && errno != EEXIST)
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return false;
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ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
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pwd.pw_dir, suffix2, sizeof(void *) * 8);
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return ret > 0 && ret < PATH_MAX + 1;
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}
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static bool
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radv_load_meta_pipeline(struct radv_device *device)
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{
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char path[PATH_MAX + 1];
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struct stat st;
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void *data = NULL;
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bool ret = false;
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if (!radv_builtin_cache_path(path))
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return false;
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int fd = open(path, O_RDONLY);
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if (fd < 0)
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return false;
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if (fstat(fd, &st))
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goto fail;
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data = malloc(st.st_size);
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if (!data)
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goto fail;
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if(read(fd, data, st.st_size) == -1)
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goto fail;
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ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
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fail:
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free(data);
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close(fd);
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return ret;
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}
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static void
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radv_store_meta_pipeline(struct radv_device *device)
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{
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char path[PATH_MAX + 1], path2[PATH_MAX + 7];
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size_t size;
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void *data = NULL;
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if (!device->meta_state.cache.modified)
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return;
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if (radv_GetPipelineCacheData(radv_device_to_handle(device),
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&size, NULL))
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return;
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if (!radv_builtin_cache_path(path))
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return;
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strcpy(path2, path);
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strcat(path2, "XXXXXX");
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int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600);
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if (fd < 0)
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return;
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data = malloc(size);
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if (!data)
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goto fail;
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if (radv_GetPipelineCacheData(radv_device_to_handle(device),
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&size, data))
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goto fail;
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if(write(fd, data, size) == -1)
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goto fail;
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rename(path2, path);
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fail:
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free(data);
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close(fd);
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unlink(path2);
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}
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VkResult
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radv_device_init_meta(struct radv_device *device)
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{
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VkResult result;
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memset(&device->meta_state, 0, sizeof(device->meta_state));
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device->meta_state.alloc = (VkAllocationCallbacks) {
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.pUserData = device,
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.pfnAllocation = meta_alloc,
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.pfnReallocation = meta_realloc,
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.pfnFree = meta_free,
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};
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device->meta_state.cache.alloc = device->meta_state.alloc;
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radv_pipeline_cache_init(&device->meta_state.cache, device);
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bool loaded_cache = radv_load_meta_pipeline(device);
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bool on_demand = !loaded_cache;
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mtx_init(&device->meta_state.mtx, mtx_plain);
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result = radv_device_init_meta_clear_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_clear;
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result = radv_device_init_meta_resolve_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_resolve;
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result = radv_device_init_meta_blit_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_blit;
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result = radv_device_init_meta_blit2d_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_blit2d;
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result = radv_device_init_meta_bufimage_state(device);
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if (result != VK_SUCCESS)
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goto fail_bufimage;
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result = radv_device_init_meta_depth_decomp_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_depth_decomp;
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result = radv_device_init_meta_buffer_state(device);
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if (result != VK_SUCCESS)
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goto fail_buffer;
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result = radv_device_init_meta_query_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_query;
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result = radv_device_init_meta_fast_clear_flush_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_fast_clear;
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result = radv_device_init_meta_resolve_compute_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_resolve_compute;
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result = radv_device_init_meta_resolve_fragment_state(device, on_demand);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_resolve_fragment;
|
|
|
|
result = radv_device_init_meta_fmask_expand_state(device);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_fmask_expand;
|
|
|
|
return VK_SUCCESS;
|
|
|
|
fail_fmask_expand:
|
|
radv_device_finish_meta_resolve_fragment_state(device);
|
|
fail_resolve_fragment:
|
|
radv_device_finish_meta_resolve_compute_state(device);
|
|
fail_resolve_compute:
|
|
radv_device_finish_meta_fast_clear_flush_state(device);
|
|
fail_fast_clear:
|
|
radv_device_finish_meta_query_state(device);
|
|
fail_query:
|
|
radv_device_finish_meta_buffer_state(device);
|
|
fail_buffer:
|
|
radv_device_finish_meta_depth_decomp_state(device);
|
|
fail_depth_decomp:
|
|
radv_device_finish_meta_bufimage_state(device);
|
|
fail_bufimage:
|
|
radv_device_finish_meta_blit2d_state(device);
|
|
fail_blit2d:
|
|
radv_device_finish_meta_blit_state(device);
|
|
fail_blit:
|
|
radv_device_finish_meta_resolve_state(device);
|
|
fail_resolve:
|
|
radv_device_finish_meta_clear_state(device);
|
|
fail_clear:
|
|
mtx_destroy(&device->meta_state.mtx);
|
|
radv_pipeline_cache_finish(&device->meta_state.cache);
|
|
return result;
|
|
}
|
|
|
|
void
|
|
radv_device_finish_meta(struct radv_device *device)
|
|
{
|
|
radv_device_finish_meta_clear_state(device);
|
|
radv_device_finish_meta_resolve_state(device);
|
|
radv_device_finish_meta_blit_state(device);
|
|
radv_device_finish_meta_blit2d_state(device);
|
|
radv_device_finish_meta_bufimage_state(device);
|
|
radv_device_finish_meta_depth_decomp_state(device);
|
|
radv_device_finish_meta_query_state(device);
|
|
radv_device_finish_meta_buffer_state(device);
|
|
radv_device_finish_meta_fast_clear_flush_state(device);
|
|
radv_device_finish_meta_resolve_compute_state(device);
|
|
radv_device_finish_meta_resolve_fragment_state(device);
|
|
radv_device_finish_meta_fmask_expand_state(device);
|
|
|
|
radv_store_meta_pipeline(device);
|
|
radv_pipeline_cache_finish(&device->meta_state.cache);
|
|
mtx_destroy(&device->meta_state.mtx);
|
|
}
|
|
|
|
nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)
|
|
{
|
|
|
|
nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(vs_b->shader, nir_intrinsic_load_vertex_id_zero_base);
|
|
nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid");
|
|
nir_builder_instr_insert(vs_b, &vertex_id->instr);
|
|
|
|
/* vertex 0 - -1.0, -1.0 */
|
|
/* vertex 1 - -1.0, 1.0 */
|
|
/* vertex 2 - 1.0, -1.0 */
|
|
/* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
|
|
channel 1 is vertex id != 1 ? -1.0 : 1.0 */
|
|
|
|
nir_ssa_def *c0cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
|
|
nir_imm_int(vs_b, 2));
|
|
nir_ssa_def *c1cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
|
|
nir_imm_int(vs_b, 1));
|
|
|
|
nir_ssa_def *comp[4];
|
|
comp[0] = nir_bcsel(vs_b, c0cmp,
|
|
nir_imm_float(vs_b, -1.0),
|
|
nir_imm_float(vs_b, 1.0));
|
|
|
|
comp[1] = nir_bcsel(vs_b, c1cmp,
|
|
nir_imm_float(vs_b, -1.0),
|
|
nir_imm_float(vs_b, 1.0));
|
|
comp[2] = comp2;
|
|
comp[3] = nir_imm_float(vs_b, 1.0);
|
|
nir_ssa_def *outvec = nir_vec(vs_b, comp, 4);
|
|
|
|
return outvec;
|
|
}
|
|
|
|
nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b)
|
|
{
|
|
return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0));
|
|
}
|
|
|
|
/* vertex shader that generates vertices */
|
|
nir_shader *
|
|
radv_meta_build_nir_vs_generate_vertices(void)
|
|
{
|
|
const struct glsl_type *vec4 = glsl_vec4_type();
|
|
|
|
nir_builder b;
|
|
nir_variable *v_position;
|
|
|
|
nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
|
|
b.shader->info.name = ralloc_strdup(b.shader, "meta_vs_gen_verts");
|
|
|
|
nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
|
|
|
|
v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
|
|
"gl_Position");
|
|
v_position->data.location = VARYING_SLOT_POS;
|
|
|
|
nir_store_var(&b, v_position, outvec, 0xf);
|
|
|
|
return b.shader;
|
|
}
|
|
|
|
nir_shader *
|
|
radv_meta_build_nir_fs_noop(void)
|
|
{
|
|
nir_builder b;
|
|
|
|
nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
|
|
b.shader->info.name = ralloc_asprintf(b.shader,
|
|
"meta_noop_fs");
|
|
|
|
return b.shader;
|
|
}
|
|
|
|
void radv_meta_build_resolve_shader_core(nir_builder *b,
|
|
bool is_integer,
|
|
int samples,
|
|
nir_variable *input_img,
|
|
nir_variable *color,
|
|
nir_ssa_def *img_coord)
|
|
{
|
|
/* do a txf_ms on each sample */
|
|
nir_ssa_def *tmp;
|
|
nir_if *outer_if = NULL;
|
|
|
|
nir_ssa_def *input_img_deref = &nir_build_deref_var(b, input_img)->dest.ssa;
|
|
|
|
nir_tex_instr *tex = nir_tex_instr_create(b->shader, 3);
|
|
tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
|
|
tex->op = nir_texop_txf_ms;
|
|
tex->src[0].src_type = nir_tex_src_coord;
|
|
tex->src[0].src = nir_src_for_ssa(img_coord);
|
|
tex->src[1].src_type = nir_tex_src_ms_index;
|
|
tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
|
|
tex->src[2].src_type = nir_tex_src_texture_deref;
|
|
tex->src[2].src = nir_src_for_ssa(input_img_deref);
|
|
tex->dest_type = nir_type_float;
|
|
tex->is_array = false;
|
|
tex->coord_components = 2;
|
|
|
|
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
|
|
nir_builder_instr_insert(b, &tex->instr);
|
|
|
|
tmp = &tex->dest.ssa;
|
|
|
|
if (!is_integer && samples > 1) {
|
|
nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 2);
|
|
tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
|
|
tex_all_same->op = nir_texop_samples_identical;
|
|
tex_all_same->src[0].src_type = nir_tex_src_coord;
|
|
tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
|
|
tex_all_same->src[1].src_type = nir_tex_src_texture_deref;
|
|
tex_all_same->src[1].src = nir_src_for_ssa(input_img_deref);
|
|
tex_all_same->dest_type = nir_type_float;
|
|
tex_all_same->is_array = false;
|
|
tex_all_same->coord_components = 2;
|
|
|
|
nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
|
|
nir_builder_instr_insert(b, &tex_all_same->instr);
|
|
|
|
nir_ssa_def *all_same = nir_ieq(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0));
|
|
nir_if *if_stmt = nir_if_create(b->shader);
|
|
if_stmt->condition = nir_src_for_ssa(all_same);
|
|
nir_cf_node_insert(b->cursor, &if_stmt->cf_node);
|
|
|
|
b->cursor = nir_after_cf_list(&if_stmt->then_list);
|
|
for (int i = 1; i < samples; i++) {
|
|
nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3);
|
|
tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
|
|
tex_add->op = nir_texop_txf_ms;
|
|
tex_add->src[0].src_type = nir_tex_src_coord;
|
|
tex_add->src[0].src = nir_src_for_ssa(img_coord);
|
|
tex_add->src[1].src_type = nir_tex_src_ms_index;
|
|
tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
|
|
tex_add->src[2].src_type = nir_tex_src_texture_deref;
|
|
tex_add->src[2].src = nir_src_for_ssa(input_img_deref);
|
|
tex_add->dest_type = nir_type_float;
|
|
tex_add->is_array = false;
|
|
tex_add->coord_components = 2;
|
|
|
|
nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
|
|
nir_builder_instr_insert(b, &tex_add->instr);
|
|
|
|
tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
|
|
}
|
|
|
|
tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
|
|
nir_store_var(b, color, tmp, 0xf);
|
|
b->cursor = nir_after_cf_list(&if_stmt->else_list);
|
|
outer_if = if_stmt;
|
|
}
|
|
nir_store_var(b, color, &tex->dest.ssa, 0xf);
|
|
|
|
if (outer_if)
|
|
b->cursor = nir_after_cf_node(&outer_if->cf_node);
|
|
}
|