.. |
ci
|
radeonsi/test: use -t for deqp tests
|
2021-09-21 08:37:57 +00:00 |
glsl_tests
|
…
|
|
driinfo_radeonsi.h
|
driconf: Stop quoting true/false in boolean option definitions.
|
2020-10-02 23:59:52 +00:00 |
gfx10_query.c
|
radeonsi: unify internal compute with SSBOs in si_launch_grid_internal_ssbos
|
2021-04-13 03:17:42 +00:00 |
gfx10_shader_ngg.c
|
radeonsi: enable NGG passthrough when LDS is used, document the real constraints
|
2021-09-14 15:24:11 +00:00 |
meson.build
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_blit.c
|
radeonsi: determine num_vbos_in_user_sgprs from template arguments in draw_vbo
|
2021-09-14 15:24:11 +00:00 |
si_buffer.c
|
radeonsi: simplify memory usage checking by merging vram and gtt counters
|
2021-09-01 00:42:58 +00:00 |
si_build_pm4.h
|
radeonsi: convert gfx10_emit_ge_pc_alloc to radeon_opt_set_uconfig_reg
|
2021-09-14 15:24:11 +00:00 |
si_clear.c
|
radeonsi: enable DCC stores for clear_render_target on gfx10
|
2021-09-01 07:51:30 +00:00 |
si_compute.c
|
radeonsi: skip setting some PGM_HI registers by switching to 32-bit addresses
|
2021-09-10 23:32:03 +00:00 |
si_compute.h
|
radeonsi: remove redundant variables from struct si_compute
|
2020-09-25 04:37:23 -04:00 |
si_compute_blit.c
|
radeonsi: clean up typecasts in compute_copy_image
|
2021-09-01 07:51:30 +00:00 |
si_cp_dma.c
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_cp_reg_shadowing.c
|
radeonsi: don't use SQ_NON_EVENT before GE_PC_ALLOC for better perf on Navi1x
|
2021-09-01 00:42:58 +00:00 |
si_debug.c
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_debug_options.h
|
radeonsi: enable uniform inlining by default
|
2021-07-08 18:37:41 +00:00 |
si_descriptors.c
|
radeonsi: determine num_vbos_in_user_sgprs from template arguments in draw_vbo
|
2021-09-14 15:24:11 +00:00 |
si_fence.c
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_get.c
|
radeonsi: copy a few nir_shader_compiler_options from RADV
|
2021-09-13 22:23:27 +00:00 |
si_gfx_cs.c
|
radeonsi: eliminate redundant SPI_SHADER_PGM_RSRC3/4_GS register writes
|
2021-09-14 15:24:11 +00:00 |
si_gpu_load.c
|
…
|
|
si_nir_optim.c
|
radeonsi/nir: add si_nir_is_output_const_if_tex_is_const
|
2021-06-15 11:18:02 +02:00 |
si_perfcounter.c
|
ac/perfcounters: rename num_multi to num_spm_counters
|
2021-06-22 06:38:54 +00:00 |
si_pipe.c
|
radeonsi: move setting most TCS shader key fields out of si_shader_selector_key
|
2021-09-14 15:24:11 +00:00 |
si_pipe.h
|
radeonsi: move setting one GS shader key field out of si_shader_selector_key
|
2021-09-14 15:24:11 +00:00 |
si_pm4.c
|
radeonsi: put si_pm4_state at the beginning of si_shader
|
2021-09-14 15:24:11 +00:00 |
si_pm4.h
|
radeonsi: put si_pm4_state at the beginning of si_shader
|
2021-09-14 15:24:11 +00:00 |
si_public.h
|
…
|
|
si_query.c
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_query.h
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_shader.c
|
radeonsi: fix ps SI_PARAM_LINE_STIPPLE_TEX arg
|
2021-09-19 01:24:21 +00:00 |
si_shader.h
|
radeonsi: eliminate redundant SPI_SHADER_PGM_RSRC3/4_GS register writes
|
2021-09-14 15:24:11 +00:00 |
si_shader_internal.h
|
ac,radeonsi: load VS inputs at the call site of nir_intrinsic_load_input
|
2021-09-07 17:51:41 +00:00 |
si_shader_llvm.c
|
radeonsi: enable NGG passthrough when LDS is used, document the real constraints
|
2021-09-14 15:24:11 +00:00 |
si_shader_llvm_gs.c
|
radeonsi: interleave si_shader_info::input_* in memory for faster emit_spi_map
|
2021-09-14 15:24:11 +00:00 |
si_shader_llvm_ps.c
|
ac: remove needless parameters from ac_shader_abi::emit_outputs
|
2021-09-07 17:51:41 +00:00 |
si_shader_llvm_resources.c
|
radeonsi: fix DCC image stores with image descriptors in user SGPRs
|
2021-09-13 22:23:27 +00:00 |
si_shader_llvm_tess.c
|
radeonsi: interleave si_shader_info::input_* in memory for faster emit_spi_map
|
2021-09-14 15:24:11 +00:00 |
si_shader_llvm_vs.c
|
radeonsi: precompute more spi_map code
|
2021-09-14 15:24:11 +00:00 |
si_shader_nir.c
|
radeonsi: precompute more spi_map code
|
2021-09-14 15:24:11 +00:00 |
si_shaderlib_nir.c
|
gallium: Remove "optimize" parameter from pipe_screen::finalize_nir
|
2021-08-13 15:45:29 -07:00 |
si_shaderlib_tgsi.c
|
ac,radeonsi: rewrite DCC retiling without the DCC retile map
|
2021-04-13 03:17:42 +00:00 |
si_sqtt.c
|
radeonsi/sqtt: add si_se_is_disabled
|
2021-09-21 08:37:57 +00:00 |
si_state.c
|
radeonsi: determine num_vbos_in_user_sgprs from template arguments in draw_vbo
|
2021-09-14 15:24:11 +00:00 |
si_state.h
|
radeonsi: eliminate redundant SPI_SHADER_PGM_RSRC3/4_GS register writes
|
2021-09-14 15:24:11 +00:00 |
si_state_binning.c
|
radeonsi: remove DFSM after we discovered how bad it is
|
2021-05-25 16:15:44 +00:00 |
si_state_draw.cpp
|
radeonsi: fix incorrect comments about VGT_SHADER_STAGES_EN
|
2021-09-14 15:24:11 +00:00 |
si_state_msaa.c
|
radeonsi: remove the primitive discard compute shader
|
2021-09-10 23:32:03 +00:00 |
si_state_shaders.c
|
radeonsi: enable NGG passthrough when LDS is used, document the real constraints
|
2021-09-14 15:24:11 +00:00 |
si_state_streamout.c
|
amd: fix parsing the last dword of DMA_DATA packets
|
2021-04-02 12:05:00 +00:00 |
si_state_viewport.c
|
radeonsi: move y_inverted out of si_viewports
|
2021-01-22 16:45:30 +00:00 |
si_test_blit.c
|
gallium: split transfer_(un)map into buffer_(un)map and texture_(un)map
|
2021-05-21 17:38:04 +00:00 |
si_test_dma_perf.c
|
radeonsi: merge CP DMA flags with internal compute flags
|
2021-04-02 12:05:00 +00:00 |
si_texture.c
|
radeonsi: simplify memory usage checking by merging vram and gtt counters
|
2021-09-01 00:42:58 +00:00 |
si_uvd.c
|
radeonsi: implement pipe_context.create_video_buffer_with_modifiers
|
2021-04-22 15:57:29 +00:00 |