Samuel Pitoiset 5c8a7fa631 radv: only set WRITE_COMPRESS_ENABLE for storage image descriptors ... This will allow us to reduce the number of situations where the compiler workaround is needed on GFX10.3. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9924>		2021-03-31 17:33:16 +02:00
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amd	radv: only set WRITE_COMPRESS_ENABLE for storage image descriptors	2021-03-31 17:33:16 +02:00
android_stub	android: add some more stub functions for cross compilation	2021-03-25 06:06:16 +00:00
broadcom	broadcom/cle: do not leak spec	2021-03-31 10:13:33 +00:00
compiler	glsl: Initialize parcel_out_uniform_storage members.	2021-03-30 21:26:04 -07:00
drm-shim	drm-shim: report support for timeline semaphores	2021-02-09 21:08:52 +00:00
egl	Revert "egl: Don't add hardware device if there is no render node v2."	2021-03-26 10:32:31 +00:00
etnaviv	etnaviv/drm: only print out fence error on non timeout	2021-03-29 11:54:59 +02:00
freedreno	ir3/isa: account for randomly set by blob lowest bit of ibo atomics	2021-03-31 15:03:35 +00:00
gallium	ci: Bump the llvmpipe test timeout to 240 seconds	2021-03-31 10:47:50 -04:00
gbm	egl: fix software flag in _eglAddDevice call on DRM	2021-03-26 10:32:31 +00:00
getopt	scons: Remove.	2021-03-20 10:38:55 +00:00
glx	glx/drisw: Implement WaitX and WaitGL	2021-03-19 15:43:49 +00:00
gtest	…
hgl	hgl: Major refactor and cleanup	2021-01-09 20:51:35 -06:00
imgui	…
intel	intel/fs/copy_prop: check stride constraints with actual final type	2021-03-29 22:14:45 +00:00
loader	loader: prefer iris on Android	2021-03-31 06:28:18 +00:00
mapi	scons: Remove.	2021-03-20 10:38:55 +00:00
mesa	mesa: Remove redundant gl_config::sampleBuffers	2021-03-30 20:33:51 +00:00
microsoft	nir: port fp16 casting code from dxil	2021-03-22 12:16:59 +10:00
nouveau	nouveau: add drm-shim support	2021-01-11 22:45:01 +00:00
panfrost	panfrost: Move the blend shader cache at the device level	2021-03-29 06:53:50 +00:00
util	util: rework AMD cpu L3 cache affinity code.	2021-03-29 08:31:09 +00:00
virtio	virgl: implement support for PIPE_CAP_STRING_MARKER	2021-03-09 13:57:05 +00:00
vulkan	vulkan: Fix descriptor set creation with zero bindings.	2021-03-29 23:32:50 +00:00
meson.build	nouveau: add drm-shim support	2021-01-11 22:45:01 +00:00