350 lines
12 KiB
C
350 lines
12 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "anv_nir.h"
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#include "anv_private.h"
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#include "nir/nir.h"
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#include "nir/nir_builder.h"
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#include "nir/nir_vulkan.h"
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struct ycbcr_state {
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nir_builder *builder;
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nir_ssa_def *image_size;
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nir_tex_instr *origin_tex;
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nir_deref_instr *tex_deref;
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struct anv_ycbcr_conversion *conversion;
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};
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/* TODO: we should probably replace this with a push constant/uniform. */
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static nir_ssa_def *
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get_texture_size(struct ycbcr_state *state, nir_deref_instr *texture)
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{
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if (state->image_size)
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return state->image_size;
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nir_builder *b = state->builder;
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const struct glsl_type *type = texture->type;
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nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1);
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tex->op = nir_texop_txs;
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tex->sampler_dim = glsl_get_sampler_dim(type);
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tex->is_array = glsl_sampler_type_is_array(type);
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tex->is_shadow = glsl_sampler_type_is_shadow(type);
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tex->dest_type = nir_type_int32;
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tex->src[0].src_type = nir_tex_src_texture_deref;
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tex->src[0].src = nir_src_for_ssa(&texture->dest.ssa);
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nir_ssa_dest_init(&tex->instr, &tex->dest,
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nir_tex_instr_dest_size(tex), 32, NULL);
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nir_builder_instr_insert(b, &tex->instr);
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state->image_size = nir_i2f32(b, &tex->dest.ssa);
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return state->image_size;
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}
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static nir_ssa_def *
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implicit_downsampled_coord(nir_builder *b,
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nir_ssa_def *value,
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nir_ssa_def *max_value,
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int div_scale)
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{
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return nir_fadd(b,
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value,
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nir_fdiv(b,
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nir_imm_float(b, 1.0f),
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nir_fmul(b,
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nir_imm_float(b, div_scale),
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max_value)));
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}
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static nir_ssa_def *
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implicit_downsampled_coords(struct ycbcr_state *state,
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nir_ssa_def *old_coords,
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const struct anv_format_plane *plane_format)
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{
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nir_builder *b = state->builder;
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struct anv_ycbcr_conversion *conversion = state->conversion;
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nir_ssa_def *image_size = get_texture_size(state, state->tex_deref);
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nir_ssa_def *comp[4] = { NULL, };
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int c;
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for (c = 0; c < ARRAY_SIZE(conversion->chroma_offsets); c++) {
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if (plane_format->denominator_scales[c] > 1 &&
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conversion->chroma_offsets[c] == VK_CHROMA_LOCATION_COSITED_EVEN) {
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comp[c] = implicit_downsampled_coord(b,
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nir_channel(b, old_coords, c),
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nir_channel(b, image_size, c),
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plane_format->denominator_scales[c]);
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} else {
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comp[c] = nir_channel(b, old_coords, c);
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}
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}
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/* Leave other coordinates untouched */
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for (; c < old_coords->num_components; c++)
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comp[c] = nir_channel(b, old_coords, c);
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return nir_vec(b, comp, old_coords->num_components);
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}
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static nir_ssa_def *
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create_plane_tex_instr_implicit(struct ycbcr_state *state,
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uint32_t plane)
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{
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nir_builder *b = state->builder;
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struct anv_ycbcr_conversion *conversion = state->conversion;
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const struct anv_format_plane *plane_format =
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&conversion->format->planes[plane];
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nir_tex_instr *old_tex = state->origin_tex;
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nir_tex_instr *tex = nir_tex_instr_create(b->shader, old_tex->num_srcs + 1);
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for (uint32_t i = 0; i < old_tex->num_srcs; i++) {
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tex->src[i].src_type = old_tex->src[i].src_type;
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switch (old_tex->src[i].src_type) {
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case nir_tex_src_coord:
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if (plane_format->has_chroma && conversion->chroma_reconstruction) {
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assert(old_tex->src[i].src.is_ssa);
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tex->src[i].src =
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nir_src_for_ssa(implicit_downsampled_coords(state,
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old_tex->src[i].src.ssa,
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plane_format));
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break;
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}
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FALLTHROUGH;
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default:
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nir_src_copy(&tex->src[i].src, &old_tex->src[i].src);
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break;
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}
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}
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tex->src[tex->num_srcs - 1].src = nir_src_for_ssa(nir_imm_int(b, plane));
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tex->src[tex->num_srcs - 1].src_type = nir_tex_src_plane;
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tex->sampler_dim = old_tex->sampler_dim;
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tex->dest_type = old_tex->dest_type;
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tex->op = old_tex->op;
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tex->coord_components = old_tex->coord_components;
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tex->is_new_style_shadow = old_tex->is_new_style_shadow;
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tex->component = old_tex->component;
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tex->texture_index = old_tex->texture_index;
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tex->sampler_index = old_tex->sampler_index;
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tex->is_array = old_tex->is_array;
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nir_ssa_dest_init(&tex->instr, &tex->dest,
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old_tex->dest.ssa.num_components,
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nir_dest_bit_size(old_tex->dest), NULL);
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nir_builder_instr_insert(b, &tex->instr);
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return &tex->dest.ssa;
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}
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static unsigned
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channel_to_component(enum isl_channel_select channel)
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{
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switch (channel) {
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case ISL_CHANNEL_SELECT_RED:
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return 0;
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case ISL_CHANNEL_SELECT_GREEN:
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return 1;
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case ISL_CHANNEL_SELECT_BLUE:
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return 2;
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case ISL_CHANNEL_SELECT_ALPHA:
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return 3;
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default:
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unreachable("invalid channel");
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return 0;
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}
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}
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static enum isl_channel_select
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swizzle_channel(struct isl_swizzle swizzle, unsigned channel)
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{
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switch (channel) {
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case 0:
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return swizzle.r;
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case 1:
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return swizzle.g;
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case 2:
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return swizzle.b;
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case 3:
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return swizzle.a;
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default:
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unreachable("invalid channel");
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return 0;
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}
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}
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static bool
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anv_nir_lower_ycbcr_textures_instr(nir_builder *builder,
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nir_instr *instr,
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void *cb_data)
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{
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const struct anv_pipeline_layout *layout = cb_data;
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if (instr->type != nir_instr_type_tex)
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return false;
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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int deref_src_idx = nir_tex_instr_src_index(tex, nir_tex_src_texture_deref);
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assert(deref_src_idx >= 0);
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nir_deref_instr *deref = nir_src_as_deref(tex->src[deref_src_idx].src);
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nir_variable *var = nir_deref_instr_get_variable(deref);
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const struct anv_descriptor_set_layout *set_layout =
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layout->set[var->data.descriptor_set].layout;
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const struct anv_descriptor_set_binding_layout *binding =
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&set_layout->binding[var->data.binding];
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/* For the following instructions, we don't apply any change and let the
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* instruction apply to the first plane.
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*/
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if (tex->op == nir_texop_txs ||
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tex->op == nir_texop_query_levels ||
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tex->op == nir_texop_lod)
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return false;
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if (binding->immutable_samplers == NULL)
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return false;
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assert(tex->texture_index == 0);
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unsigned array_index = 0;
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if (deref->deref_type != nir_deref_type_var) {
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assert(deref->deref_type == nir_deref_type_array);
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if (!nir_src_is_const(deref->arr.index))
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return false;
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array_index = nir_src_as_uint(deref->arr.index);
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array_index = MIN2(array_index, binding->array_size - 1);
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}
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const struct anv_sampler *sampler = binding->immutable_samplers[array_index];
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if (sampler->conversion == NULL)
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return false;
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struct ycbcr_state state = {
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.builder = builder,
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.origin_tex = tex,
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.tex_deref = deref,
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.conversion = sampler->conversion,
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};
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builder->cursor = nir_before_instr(&tex->instr);
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const struct anv_format *format = state.conversion->format;
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const struct isl_format_layout *y_isl_layout = NULL;
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for (uint32_t p = 0; p < format->n_planes; p++) {
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if (!format->planes[p].has_chroma)
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y_isl_layout = isl_format_get_layout(format->planes[p].isl_format);
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}
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assert(y_isl_layout != NULL);
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uint8_t y_bpc = y_isl_layout->channels_array[0].bits;
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/* |ycbcr_comp| holds components in the order : Cr-Y-Cb */
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nir_ssa_def *zero = nir_imm_float(builder, 0.0f);
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nir_ssa_def *one = nir_imm_float(builder, 1.0f);
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/* Use extra 2 channels for following swizzle */
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nir_ssa_def *ycbcr_comp[5] = { zero, zero, zero, one, zero };
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uint8_t ycbcr_bpcs[5];
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memset(ycbcr_bpcs, y_bpc, sizeof(ycbcr_bpcs));
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/* Go through all the planes and gather the samples into a |ycbcr_comp|
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* while applying a swizzle required by the spec:
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*
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* R, G, B should respectively map to Cr, Y, Cb
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*/
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for (uint32_t p = 0; p < format->n_planes; p++) {
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const struct anv_format_plane *plane_format = &format->planes[p];
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nir_ssa_def *plane_sample = create_plane_tex_instr_implicit(&state, p);
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for (uint32_t pc = 0; pc < 4; pc++) {
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enum isl_channel_select ycbcr_swizzle =
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swizzle_channel(plane_format->ycbcr_swizzle, pc);
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if (ycbcr_swizzle == ISL_CHANNEL_SELECT_ZERO)
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continue;
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unsigned ycbcr_component = channel_to_component(ycbcr_swizzle);
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ycbcr_comp[ycbcr_component] = nir_channel(builder, plane_sample, pc);
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/* Also compute the number of bits for each component. */
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const struct isl_format_layout *isl_layout =
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isl_format_get_layout(plane_format->isl_format);
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ycbcr_bpcs[ycbcr_component] = isl_layout->channels_array[pc].bits;
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}
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}
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/* Now remaps components to the order specified by the conversion. */
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nir_ssa_def *swizzled_comp[4] = { NULL, };
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uint32_t swizzled_bpcs[4] = { 0, };
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for (uint32_t i = 0; i < ARRAY_SIZE(state.conversion->mapping); i++) {
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/* Maps to components in |ycbcr_comp| */
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static const uint32_t swizzle_mapping[] = {
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[VK_COMPONENT_SWIZZLE_ZERO] = 4,
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[VK_COMPONENT_SWIZZLE_ONE] = 3,
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[VK_COMPONENT_SWIZZLE_R] = 0,
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[VK_COMPONENT_SWIZZLE_G] = 1,
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[VK_COMPONENT_SWIZZLE_B] = 2,
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[VK_COMPONENT_SWIZZLE_A] = 3,
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};
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const VkComponentSwizzle m = state.conversion->mapping[i];
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if (m == VK_COMPONENT_SWIZZLE_IDENTITY) {
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swizzled_comp[i] = ycbcr_comp[i];
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swizzled_bpcs[i] = ycbcr_bpcs[i];
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} else {
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swizzled_comp[i] = ycbcr_comp[swizzle_mapping[m]];
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swizzled_bpcs[i] = ycbcr_bpcs[swizzle_mapping[m]];
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}
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}
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nir_ssa_def *result = nir_vec(builder, swizzled_comp, 4);
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if (state.conversion->ycbcr_model != VK_SAMPLER_YCBCR_MODEL_CONVERSION_RGB_IDENTITY) {
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result = nir_convert_ycbcr_to_rgb(builder,
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state.conversion->ycbcr_model,
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state.conversion->ycbcr_range,
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result,
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swizzled_bpcs);
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}
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nir_ssa_def_rewrite_uses(&tex->dest.ssa, result);
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nir_instr_remove(&tex->instr);
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return true;
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}
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bool
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anv_nir_lower_ycbcr_textures(nir_shader *shader,
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const struct anv_pipeline_layout *layout)
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{
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return nir_shader_instructions_pass(shader,
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anv_nir_lower_ycbcr_textures_instr,
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nir_metadata_block_index |
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nir_metadata_dominance,
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(void *)layout);
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}
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