786 lines
25 KiB
C
786 lines
25 KiB
C
/*
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* Copyright (C) 2008 VMware, Inc.
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* Copyright (C) 2014 Broadcom
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* Copyright (C) 2018 Alyssa Rosenzweig
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* Copyright (C) 2019 Collabora, Ltd.
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* Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include "util/u_debug.h"
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#include "util/u_memory.h"
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#include "util/format/u_format.h"
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#include "util/format/u_format_s3tc.h"
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#include "util/u_video.h"
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#include "util/u_screen.h"
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#include "util/os_time.h"
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#include "util/u_process.h"
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#include "pipe/p_defines.h"
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#include "pipe/p_screen.h"
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#include "draw/draw_context.h"
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#include <fcntl.h>
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#include "drm-uapi/drm_fourcc.h"
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#include "drm-uapi/panfrost_drm.h"
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#include "pan_bo.h"
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#include "pan_screen.h"
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#include "pan_resource.h"
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#include "pan_public.h"
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#include "pan_util.h"
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#include "pandecode/decode.h"
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#include "pan_context.h"
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#include "midgard/midgard_compile.h"
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#include "bifrost/bifrost_compile.h"
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#include "panfrost-quirks.h"
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static const struct debug_named_value debug_options[] = {
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{"msgs", PAN_DBG_MSGS, "Print debug messages"},
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{"trace", PAN_DBG_TRACE, "Trace the command stream"},
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{"deqp", PAN_DBG_DEQP, "Hacks for dEQP"},
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{"afbc", PAN_DBG_AFBC, "Enable non-conformant AFBC impl"},
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{"sync", PAN_DBG_SYNC, "Wait for each job's completion and check for any GPU fault"},
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{"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
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{"gles3", PAN_DBG_GLES3, "Enable experimental GLES3 implementation"},
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DEBUG_NAMED_VALUE_END
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};
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DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
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int pan_debug = 0;
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static const char *
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panfrost_get_name(struct pipe_screen *screen)
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{
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return panfrost_model_name(pan_device(screen)->gpu_id);
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}
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static const char *
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panfrost_get_vendor(struct pipe_screen *screen)
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{
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return "Panfrost";
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}
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static const char *
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panfrost_get_device_vendor(struct pipe_screen *screen)
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{
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return "Arm";
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}
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static int
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panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
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{
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/* We expose in-dev stuff for dEQP that we don't want apps to use yet */
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bool is_deqp = pan_debug & PAN_DBG_DEQP;
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struct panfrost_device *dev = pan_device(screen);
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/* Our GLES3 implementation is WIP */
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bool is_gles3 = pan_debug & PAN_DBG_GLES3;
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is_gles3 |= is_deqp;
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switch (param) {
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case PIPE_CAP_NPOT_TEXTURES:
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case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
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case PIPE_CAP_VERTEX_SHADER_SATURATE:
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case PIPE_CAP_POINT_SPRITE:
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return 1;
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return is_gles3 ? 4 : 1;
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/* Throttling frames breaks pipelining */
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case PIPE_CAP_THROTTLE:
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return 0;
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case PIPE_CAP_OCCLUSION_QUERY:
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return 1;
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case PIPE_CAP_QUERY_TIME_ELAPSED:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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case PIPE_CAP_QUERY_TIMESTAMP:
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case PIPE_CAP_QUERY_SO_OVERFLOW:
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return 0;
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case PIPE_CAP_TEXTURE_SWIZZLE:
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return 1;
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
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return 1;
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case PIPE_CAP_TGSI_INSTANCEID:
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case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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case PIPE_CAP_PRIMITIVE_RESTART:
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return 1;
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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return is_gles3 ? 4 : 0;
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case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
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case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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return is_gles3 ? 64 : 0;
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case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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return 1;
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case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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return 256;
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
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return is_gles3 ? 140 : 120;
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case PIPE_CAP_ESSL_FEATURE_LEVEL:
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return is_gles3 ? 300 : 120;
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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return 16;
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return is_deqp;
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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return is_gles3;
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/* For faking GLES 3.1 for dEQP-GLES31 */
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case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
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case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
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case PIPE_CAP_IMAGE_LOAD_FORMATTED:
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case PIPE_CAP_CUBE_MAP_ARRAY:
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return is_deqp;
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/* For faking compute shaders */
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case PIPE_CAP_COMPUTE:
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return is_deqp;
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/* TODO: Where does this req come from in practice? */
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case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
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return 1;
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case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
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return 4096;
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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return 13;
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case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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case PIPE_CAP_INDEP_BLEND_ENABLE:
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case PIPE_CAP_INDEP_BLEND_FUNC:
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return 1;
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
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/* Hardware is natively upper left */
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return 0;
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
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case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
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case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
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case PIPE_CAP_GENERATE_MIPMAP:
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return 1;
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/* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
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case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
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case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
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return dev->quirks & IS_BIFROST;
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/* I really don't want to set this CAP but let's not swim against the
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* tide.. */
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case PIPE_CAP_TGSI_TEXCOORD:
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return 1;
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case PIPE_CAP_SEAMLESS_CUBE_MAP:
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case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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return 1;
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case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
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return 0xffff;
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case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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return 1;
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case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
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return 65536;
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case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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return 0;
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case PIPE_CAP_ENDIANNESS:
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return PIPE_ENDIAN_NATIVE;
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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return 1;
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case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
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return -8;
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case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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return 7;
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case PIPE_CAP_VENDOR_ID:
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case PIPE_CAP_DEVICE_ID:
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return 0xFFFFFFFF;
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case PIPE_CAP_ACCELERATED:
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case PIPE_CAP_UMA:
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case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
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case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
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case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
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case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
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return 1;
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case PIPE_CAP_VIDEO_MEMORY: {
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uint64_t system_memory;
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if (!os_get_total_physical_memory(&system_memory))
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return 0;
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return (int)(system_memory >> 20);
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}
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case PIPE_CAP_SHADER_STENCIL_EXPORT:
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return 1;
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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return 4;
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case PIPE_CAP_MAX_VARYINGS:
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return 16;
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case PIPE_CAP_ALPHA_TEST:
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case PIPE_CAP_FLATSHADE:
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case PIPE_CAP_TWO_SIDED_COLOR:
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case PIPE_CAP_CLIP_PLANES:
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return 0;
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case PIPE_CAP_PACKED_STREAM_OUTPUT:
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return 0;
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case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
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case PIPE_CAP_PSIZ_CLAMPED:
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return 1;
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default:
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return u_pipe_screen_get_param_defaults(screen, param);
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}
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}
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static int
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panfrost_get_shader_param(struct pipe_screen *screen,
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enum pipe_shader_type shader,
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enum pipe_shader_cap param)
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{
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bool is_deqp = pan_debug & PAN_DBG_DEQP;
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struct panfrost_device *dev = pan_device(screen);
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if (shader != PIPE_SHADER_VERTEX &&
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shader != PIPE_SHADER_FRAGMENT &&
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!(shader == PIPE_SHADER_COMPUTE && is_deqp))
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return 0;
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/* this is probably not totally correct.. but it's a start: */
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switch (param) {
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case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
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case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
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return 16384;
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case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
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return 1024;
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case PIPE_SHADER_CAP_MAX_INPUTS:
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return 16;
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case PIPE_SHADER_CAP_MAX_OUTPUTS:
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return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
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case PIPE_SHADER_CAP_MAX_TEMPS:
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return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
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case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
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return 16 * 1024 * sizeof(float);
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case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
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return PAN_MAX_CONST_BUFFERS;
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case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
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return 0;
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case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
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return 1;
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case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
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return 0;
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case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
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return 0;
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case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
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return 1;
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case PIPE_SHADER_CAP_SUBROUTINES:
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return 0;
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case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
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return 0;
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case PIPE_SHADER_CAP_INTEGERS:
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return 1;
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case PIPE_SHADER_CAP_FP16:
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return !(dev->quirks & MIDGARD_BROKEN_FP16);
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case PIPE_SHADER_CAP_INT64_ATOMICS:
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case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
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case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
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case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
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case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
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case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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return 0;
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case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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return 16; /* XXX: How many? */
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case PIPE_SHADER_CAP_PREFERRED_IR:
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return PIPE_SHADER_IR_NIR;
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case PIPE_SHADER_CAP_SUPPORTED_IRS:
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return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
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case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
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return 32;
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case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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return is_deqp ? 8 : 0;
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
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return 0;
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case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
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case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
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return 0;
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default:
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DBG("unknown shader param %d\n", param);
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return 0;
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}
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return 0;
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}
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static float
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panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
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{
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switch (param) {
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case PIPE_CAPF_MAX_LINE_WIDTH:
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/* fall-through */
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case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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return 255.0; /* arbitrary */
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case PIPE_CAPF_MAX_POINT_WIDTH:
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/* fall-through */
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case PIPE_CAPF_MAX_POINT_WIDTH_AA:
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return 1024.0;
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case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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return 16.0;
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case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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return 16.0; /* arbitrary */
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case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
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case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
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case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
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return 0.0f;
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default:
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debug_printf("Unexpected PIPE_CAPF %d query\n", param);
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return 0.0;
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}
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}
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/**
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* Query format support for creating a texture, drawing surface, etc.
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* \param format the format to test
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* \param type one of PIPE_TEXTURE, PIPE_SURFACE
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*/
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static bool
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panfrost_is_format_supported( struct pipe_screen *screen,
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enum pipe_format format,
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enum pipe_texture_target target,
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unsigned sample_count,
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unsigned storage_sample_count,
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unsigned bind)
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{
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const struct util_format_description *format_desc;
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assert(target == PIPE_BUFFER ||
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target == PIPE_TEXTURE_1D ||
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target == PIPE_TEXTURE_1D_ARRAY ||
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target == PIPE_TEXTURE_2D ||
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target == PIPE_TEXTURE_2D_ARRAY ||
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target == PIPE_TEXTURE_RECT ||
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target == PIPE_TEXTURE_3D ||
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target == PIPE_TEXTURE_CUBE ||
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target == PIPE_TEXTURE_CUBE_ARRAY);
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format_desc = util_format_description(format);
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if (!format_desc)
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return false;
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/* MSAA 4x supported, but no more. Technically some revisions of the
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* hardware can go up to 16x but we don't support higher modes yet. */
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if (sample_count > 1 && !(pan_debug & PAN_DBG_DEQP))
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return false;
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if (sample_count > 4)
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return false;
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if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
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return false;
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/* Format wishlist */
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if (format == PIPE_FORMAT_X8Z24_UNORM)
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return false;
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if (format == PIPE_FORMAT_A1B5G5R5_UNORM ||
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format == PIPE_FORMAT_X1B5G5R5_UNORM ||
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format == PIPE_FORMAT_B2G3R3_UNORM)
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return false;
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/* TODO */
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if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
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return FALSE;
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/* Don't confuse poorly written apps (workaround dEQP bug) that expect
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* more alpha than they ask for */
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|
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bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
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bool renderable = bind & PIPE_BIND_RENDER_TARGET;
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if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
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return false;
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switch (format_desc->layout) {
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case UTIL_FORMAT_LAYOUT_PLAIN:
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case UTIL_FORMAT_LAYOUT_OTHER:
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break;
|
|
case UTIL_FORMAT_LAYOUT_ETC:
|
|
case UTIL_FORMAT_LAYOUT_ASTC:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
|
|
if (format_desc->channel[0].size > 32)
|
|
return false;
|
|
|
|
/* Internally, formats that are depth/stencil renderable are limited.
|
|
*
|
|
* In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
|
|
* rendering perspective. That is, we render to Z24S8 (which we can
|
|
* AFBC compress), ignore the different when texturing (who cares?),
|
|
* and then in the off-chance there's a CPU read we blit back to
|
|
* staging.
|
|
*
|
|
* ...alternatively, we can make the gallium frontend deal with that. */
|
|
|
|
if (bind & PIPE_BIND_DEPTH_STENCIL) {
|
|
switch (format) {
|
|
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
|
|
case PIPE_FORMAT_Z24X8_UNORM:
|
|
case PIPE_FORMAT_Z32_UNORM:
|
|
case PIPE_FORMAT_Z32_FLOAT:
|
|
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
|
|
return true;
|
|
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
static int
|
|
panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
|
|
enum pipe_compute_cap param, void *ret)
|
|
{
|
|
const char * const ir = "panfrost";
|
|
|
|
if (!(pan_debug & PAN_DBG_DEQP))
|
|
return 0;
|
|
|
|
#define RET(x) do { \
|
|
if (ret) \
|
|
memcpy(ret, x, sizeof(x)); \
|
|
return sizeof(x); \
|
|
} while (0)
|
|
|
|
switch (param) {
|
|
case PIPE_COMPUTE_CAP_ADDRESS_BITS:
|
|
RET((uint32_t []){ 64 });
|
|
|
|
case PIPE_COMPUTE_CAP_IR_TARGET:
|
|
if (ret)
|
|
sprintf(ret, "%s", ir);
|
|
return strlen(ir) * sizeof(char);
|
|
|
|
case PIPE_COMPUTE_CAP_GRID_DIMENSION:
|
|
RET((uint64_t []) { 3 });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
|
|
RET(((uint64_t []) { 65535, 65535, 65535 }));
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
|
|
RET(((uint64_t []) { 1024, 1024, 64 }));
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
|
|
RET((uint64_t []) { 1024 });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
|
|
RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
|
|
RET((uint64_t []) { 32768 });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
|
|
case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
|
|
RET((uint64_t []) { 4096 });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
|
|
RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
|
|
RET((uint32_t []) { 800 /* MHz -- TODO */ });
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
|
|
RET((uint32_t []) { 9999 }); // TODO
|
|
|
|
case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
|
|
RET((uint32_t []) { 1 }); // TODO
|
|
|
|
case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
|
|
RET((uint32_t []) { 32 }); // TODO
|
|
|
|
case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
|
|
RET((uint64_t []) { 1024 }); // TODO
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
panfrost_destroy_screen(struct pipe_screen *pscreen)
|
|
{
|
|
panfrost_close_device(pan_device(pscreen));
|
|
ralloc_free(pscreen);
|
|
}
|
|
|
|
static uint64_t
|
|
panfrost_get_timestamp(struct pipe_screen *_screen)
|
|
{
|
|
return os_time_get_nano();
|
|
}
|
|
|
|
static void
|
|
panfrost_fence_reference(struct pipe_screen *pscreen,
|
|
struct pipe_fence_handle **ptr,
|
|
struct pipe_fence_handle *fence)
|
|
{
|
|
struct panfrost_fence **p = (struct panfrost_fence **)ptr;
|
|
struct panfrost_fence *f = (struct panfrost_fence *)fence;
|
|
struct panfrost_fence *old = *p;
|
|
|
|
if (pipe_reference(&(*p)->reference, &f->reference)) {
|
|
util_dynarray_foreach(&old->syncfds, int, fd)
|
|
close(*fd);
|
|
util_dynarray_fini(&old->syncfds);
|
|
free(old);
|
|
}
|
|
*p = f;
|
|
}
|
|
|
|
static bool
|
|
panfrost_fence_finish(struct pipe_screen *pscreen,
|
|
struct pipe_context *ctx,
|
|
struct pipe_fence_handle *fence,
|
|
uint64_t timeout)
|
|
{
|
|
struct panfrost_device *dev = pan_device(pscreen);
|
|
struct panfrost_fence *f = (struct panfrost_fence *)fence;
|
|
struct util_dynarray syncobjs;
|
|
int ret;
|
|
|
|
/* All fences were already signaled */
|
|
if (!util_dynarray_num_elements(&f->syncfds, int))
|
|
return true;
|
|
|
|
util_dynarray_init(&syncobjs, NULL);
|
|
util_dynarray_foreach(&f->syncfds, int, fd) {
|
|
uint32_t syncobj;
|
|
|
|
ret = drmSyncobjCreate(dev->fd, 0, &syncobj);
|
|
assert(!ret);
|
|
|
|
ret = drmSyncobjImportSyncFile(dev->fd, syncobj, *fd);
|
|
assert(!ret);
|
|
util_dynarray_append(&syncobjs, uint32_t, syncobj);
|
|
}
|
|
|
|
uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
|
|
if (abs_timeout == OS_TIMEOUT_INFINITE)
|
|
abs_timeout = INT64_MAX;
|
|
|
|
ret = drmSyncobjWait(dev->fd, util_dynarray_begin(&syncobjs),
|
|
util_dynarray_num_elements(&syncobjs, uint32_t),
|
|
abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
|
|
NULL);
|
|
|
|
util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
|
|
drmSyncobjDestroy(dev->fd, *syncobj);
|
|
|
|
return ret >= 0;
|
|
}
|
|
|
|
struct panfrost_fence *
|
|
panfrost_fence_create(struct panfrost_context *ctx,
|
|
struct util_dynarray *fences)
|
|
{
|
|
struct panfrost_device *device = pan_device(ctx->base.screen);
|
|
struct panfrost_fence *f = calloc(1, sizeof(*f));
|
|
if (!f)
|
|
return NULL;
|
|
|
|
util_dynarray_init(&f->syncfds, NULL);
|
|
|
|
/* Export fences from all pending batches. */
|
|
util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
|
|
int fd = -1;
|
|
|
|
/* The fence is already signaled, no need to export it. */
|
|
if ((*fence)->signaled)
|
|
continue;
|
|
|
|
drmSyncobjExportSyncFile(device->fd, (*fence)->syncobj, &fd);
|
|
if (fd == -1)
|
|
fprintf(stderr, "export failed: %m\n");
|
|
|
|
assert(fd != -1);
|
|
util_dynarray_append(&f->syncfds, int, fd);
|
|
}
|
|
|
|
pipe_reference_init(&f->reference, 1);
|
|
|
|
return f;
|
|
}
|
|
|
|
static const void *
|
|
panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
|
|
enum pipe_shader_ir ir,
|
|
enum pipe_shader_type shader)
|
|
{
|
|
if (pan_device(pscreen)->quirks & IS_BIFROST)
|
|
return &bifrost_nir_options;
|
|
else
|
|
return &midgard_nir_options;
|
|
}
|
|
|
|
struct pipe_screen *
|
|
panfrost_create_screen(int fd, struct renderonly *ro)
|
|
{
|
|
pan_debug = debug_get_option_pan_debug();
|
|
|
|
/* Blacklist apps known to be buggy under Panfrost */
|
|
const char *proc = util_get_process_name();
|
|
const char *blacklist[] = {
|
|
"chromium",
|
|
"chrome",
|
|
};
|
|
|
|
for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
|
|
if ((strcmp(blacklist[i], proc) == 0))
|
|
return NULL;
|
|
}
|
|
|
|
/* Create the screen */
|
|
struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
|
|
|
|
if (!screen)
|
|
return NULL;
|
|
|
|
struct panfrost_device *dev = pan_device(&screen->base);
|
|
panfrost_open_device(screen, fd, dev);
|
|
|
|
if (ro) {
|
|
dev->ro = renderonly_dup(ro);
|
|
if (!dev->ro) {
|
|
DBG("Failed to dup renderonly object\n");
|
|
free(screen);
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
/* Check if we're loading against a supported GPU model. */
|
|
|
|
switch (dev->gpu_id) {
|
|
case 0x720: /* T720 */
|
|
case 0x750: /* T760 */
|
|
case 0x820: /* T820 */
|
|
case 0x860: /* T860 */
|
|
break;
|
|
default:
|
|
/* Fail to load against untested models */
|
|
debug_printf("panfrost: Unsupported model %X", dev->gpu_id);
|
|
panfrost_destroy_screen(&(screen->base));
|
|
return NULL;
|
|
}
|
|
|
|
if (pan_debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
|
|
pandecode_initialize(!(pan_debug & PAN_DBG_TRACE));
|
|
|
|
screen->base.destroy = panfrost_destroy_screen;
|
|
|
|
screen->base.get_name = panfrost_get_name;
|
|
screen->base.get_vendor = panfrost_get_vendor;
|
|
screen->base.get_device_vendor = panfrost_get_device_vendor;
|
|
screen->base.get_param = panfrost_get_param;
|
|
screen->base.get_shader_param = panfrost_get_shader_param;
|
|
screen->base.get_compute_param = panfrost_get_compute_param;
|
|
screen->base.get_paramf = panfrost_get_paramf;
|
|
screen->base.get_timestamp = panfrost_get_timestamp;
|
|
screen->base.is_format_supported = panfrost_is_format_supported;
|
|
screen->base.context_create = panfrost_create_context;
|
|
screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
|
|
screen->base.fence_reference = panfrost_fence_reference;
|
|
screen->base.fence_finish = panfrost_fence_finish;
|
|
screen->base.set_damage_region = panfrost_resource_set_damage_region;
|
|
|
|
panfrost_resource_screen_init(&screen->base);
|
|
|
|
return &screen->base;
|
|
}
|