223 lines
8.6 KiB
C
223 lines
8.6 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* @file iris_formats.c
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*
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* Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*).
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* Provides information about which formats support what features.
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*/
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#include "util/bitscan.h"
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#include "util/macros.h"
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#include "util/format/u_format.h"
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#include "iris_resource.h"
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#include "iris_screen.h"
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struct iris_format_info
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iris_format_for_usage(const struct gen_device_info *devinfo,
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enum pipe_format pformat,
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isl_surf_usage_flags_t usage)
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{
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enum isl_format format = isl_format_for_pipe_format(pformat);
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struct isl_swizzle swizzle = ISL_SWIZZLE_IDENTITY;
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if (format == ISL_FORMAT_UNSUPPORTED)
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return (struct iris_format_info) { .fmt = format, .swizzle = swizzle };
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const struct isl_format_layout *fmtl = isl_format_get_layout(format);
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if (!util_format_is_srgb(pformat)) {
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if (util_format_is_intensity(pformat)) {
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swizzle = ISL_SWIZZLE(RED, RED, RED, RED);
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} else if (util_format_is_luminance(pformat)) {
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swizzle = ISL_SWIZZLE(RED, RED, RED, ONE);
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} else if (util_format_is_luminance_alpha(pformat)) {
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swizzle = ISL_SWIZZLE(RED, RED, RED, GREEN);
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} else if (util_format_is_alpha(pformat)) {
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swizzle = ISL_SWIZZLE(ZERO, ZERO, ZERO, RED);
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}
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}
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/* When faking RGBX pipe formats with RGBA ISL formats, override alpha. */
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if (!util_format_has_alpha(pformat) && fmtl->channels.a.type != ISL_VOID) {
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swizzle = ISL_SWIZZLE(RED, GREEN, BLUE, ONE);
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}
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if ((usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) &&
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pformat == PIPE_FORMAT_A8_UNORM) {
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/* Most of the hardware A/LA formats are not renderable, except
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* for A8_UNORM. SURFACE_STATE's shader channel select fields
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* cannot be used to swap RGB and A channels when rendering (as
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* it could impact alpha blending), so we have to use the actual
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* A8_UNORM format when rendering.
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*/
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format = ISL_FORMAT_A8_UNORM;
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swizzle = ISL_SWIZZLE_IDENTITY;
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}
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/* We choose RGBA over RGBX for rendering the hardware doesn't support
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* rendering to RGBX. However, when this internal override is used on Gen9+,
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* fast clears don't work correctly.
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*
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* i965 fixes this by pretending to not support RGBX formats, and the higher
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* layers of Mesa pick the RGBA format instead. Gallium doesn't work that
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* way, and might choose a different format, like BGRX instead of RGBX,
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* which will also cause problems when sampling from a surface fast cleared
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* as RGBX. So we always choose RGBA instead of RGBX explicitly
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* here.
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*/
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if (isl_format_is_rgbx(format) &&
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!isl_format_supports_rendering(devinfo, format)) {
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format = isl_format_rgbx_to_rgba(format);
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swizzle = ISL_SWIZZLE(RED, GREEN, BLUE, ONE);
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}
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return (struct iris_format_info) { .fmt = format, .swizzle = swizzle };
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}
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/**
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* The pscreen->is_format_supported() driver hook.
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*
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* Returns true if the given format is supported for the given usage
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* (PIPE_BIND_*) and sample count.
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*/
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bool
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iris_is_format_supported(struct pipe_screen *pscreen,
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enum pipe_format pformat,
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enum pipe_texture_target target,
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unsigned sample_count,
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unsigned storage_sample_count,
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unsigned usage)
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{
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struct iris_screen *screen = (struct iris_screen *) pscreen;
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const struct gen_device_info *devinfo = &screen->devinfo;
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uint32_t max_samples = devinfo->gen == 8 ? 8 : 16;
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if (sample_count > max_samples ||
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!util_is_power_of_two_or_zero(sample_count))
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return false;
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if (pformat == PIPE_FORMAT_NONE)
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return true;
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enum isl_format format = isl_format_for_pipe_format(pformat);
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if (format == ISL_FORMAT_UNSUPPORTED)
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return false;
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const struct isl_format_layout *fmtl = isl_format_get_layout(format);
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const bool is_integer = isl_format_has_int_channel(format);
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bool supported = true;
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if (sample_count > 1)
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supported &= isl_format_supports_multisampling(devinfo, format);
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if (usage & PIPE_BIND_DEPTH_STENCIL) {
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supported &= format == ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS ||
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format == ISL_FORMAT_R32_FLOAT ||
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format == ISL_FORMAT_R24_UNORM_X8_TYPELESS ||
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format == ISL_FORMAT_R16_UNORM ||
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format == ISL_FORMAT_R8_UINT;
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}
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if (usage & PIPE_BIND_RENDER_TARGET) {
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/* Alpha and luminance-alpha formats other than A8_UNORM are not
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* renderable. For texturing, we can use R or RG formats with
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* shader channel selects (SCS) to swizzle the data into the correct
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* channels. But for render targets, the hardware prohibits using
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* SCS to move shader outputs between the RGB and A channels, as it
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* would alter what data is used for alpha blending.
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*
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* For BLORP, we can apply the swizzle in the shader. But for
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* general rendering, this would mean recompiling the shader, which
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* we'd like to avoid doing. So we mark these formats non-renderable.
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*
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* We do support A8_UNORM as it's required and is renderable.
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*/
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if (pformat != PIPE_FORMAT_A8_UNORM &&
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(util_format_is_alpha(pformat) ||
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util_format_is_luminance_alpha(pformat)))
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supported = false;
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enum isl_format rt_format = format;
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if (isl_format_is_rgbx(format) &&
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!isl_format_supports_rendering(devinfo, format))
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rt_format = isl_format_rgbx_to_rgba(format);
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supported &= isl_format_supports_rendering(devinfo, rt_format);
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if (!is_integer)
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supported &= isl_format_supports_alpha_blending(devinfo, rt_format);
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}
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if (usage & PIPE_BIND_SHADER_IMAGE) {
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/* Dataport doesn't support compression, and we can't resolve an MCS
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* compressed surface. (Buffer images may have sample count of 0.)
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*/
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supported &= sample_count == 0;
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supported &= isl_format_supports_typed_writes(devinfo, format);
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supported &= isl_has_matching_typed_storage_image_format(devinfo, format);
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}
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if (usage & PIPE_BIND_SAMPLER_VIEW) {
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supported &= isl_format_supports_sampling(devinfo, format);
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if (!is_integer)
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supported &= isl_format_supports_filtering(devinfo, format);
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/* Don't advertise 3-component RGB formats for non-buffer textures.
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* This ensures that they are renderable from an API perspective since
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* gallium frontends will fall back to RGBA or RGBX, which are
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* renderable. We want to render internally for copies and blits,
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* even if the application doesn't.
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*
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* Buffer textures don't need to be renderable, so we support real RGB.
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* This is useful for PBO upload, and 32-bit RGB support is mandatory.
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*/
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if (target != PIPE_BUFFER)
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supported &= fmtl->bpb != 24 && fmtl->bpb != 48 && fmtl->bpb != 96;
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}
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if (usage & PIPE_BIND_VERTEX_BUFFER)
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supported &= isl_format_supports_vertex_fetch(devinfo, format);
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if (usage & PIPE_BIND_INDEX_BUFFER) {
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supported &= format == ISL_FORMAT_R8_UINT ||
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format == ISL_FORMAT_R16_UINT ||
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format == ISL_FORMAT_R32_UINT;
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}
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/* TODO: Support ASTC 5x5 on Gen9 properly. This means implementing
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* a complex sampler workaround (see i965's gen9_apply_astc5x5_wa_flush).
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* Without it, st/mesa will emulate ASTC 5x5 via uncompressed textures.
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*/
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if (devinfo->gen == 9 && (format == ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16 ||
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format == ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB))
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return false;
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return supported;
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}
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