171 lines
5.0 KiB
C
171 lines
5.0 KiB
C
/**************************************************************************
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Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
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VA Linux Systems Inc., Fremont, California.
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All Rights Reserved.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial
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portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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/*
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* Authors:
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* Kevin E. Martin <martin@valinux.com>
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* Gareth Hughes <gareth@valinux.com>
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*/
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#ifndef __RADEON_IOCTL_H__
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#define __RADEON_IOCTL_H__
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#include "radeon_bo_gem.h"
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#include "radeon_cs_gem.h"
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extern void radeonEmitVertexAOS( r100ContextPtr rmesa,
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GLuint vertex_size,
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struct radeon_bo *bo,
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GLuint offset );
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extern void radeonEmitVbufPrim( r100ContextPtr rmesa,
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GLuint vertex_format,
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GLuint primitive,
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GLuint vertex_nr );
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extern void radeonFlushElts( struct gl_context *ctx );
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extern GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
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GLuint vertex_format,
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GLuint primitive,
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GLuint min_nr );
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extern void radeonEmitAOS( r100ContextPtr rmesa,
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GLuint n,
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GLuint offset );
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extern void radeonEmitBlit( r100ContextPtr rmesa,
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GLuint color_fmt,
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GLuint src_pitch,
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GLuint src_offset,
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GLuint dst_pitch,
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GLuint dst_offset,
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GLint srcx, GLint srcy,
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GLint dstx, GLint dsty,
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GLuint w, GLuint h );
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extern void radeonEmitWait( r100ContextPtr rmesa, GLuint flags );
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extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * );
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extern void radeonFlush( struct gl_context *ctx, unsigned gallium_flush_flags );
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extern void radeonFinish( struct gl_context *ctx );
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extern void radeonInitIoctlFuncs( struct gl_context *ctx );
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extern void radeonGetAllParams( r100ContextPtr rmesa );
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extern void radeonSetUpAtomList( r100ContextPtr rmesa );
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/* ================================================================
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* Helper macros:
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*/
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/* Close off the last primitive, if it exists.
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*/
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#define RADEON_NEWPRIM( rmesa ) \
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do { \
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if ( rmesa->radeon.dma.flush ) \
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rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \
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} while (0)
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/* Can accommodate several state changes and primitive changes without
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* actually firing the buffer.
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*/
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#define RADEON_STATECHANGE( rmesa, ATOM ) \
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do { \
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RADEON_NEWPRIM( rmesa ); \
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rmesa->hw.ATOM.dirty = GL_TRUE; \
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rmesa->radeon.hw.is_dirty = GL_TRUE; \
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} while (0)
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#define RADEON_DB_STATE( ATOM ) \
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memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
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rmesa->hw.ATOM.cmd_size * 4)
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static inline int RADEON_DB_STATECHANGE(r100ContextPtr rmesa,
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struct radeon_state_atom *atom )
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{
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if (memcmp(atom->cmd, atom->lastcmd, atom->cmd_size*4)) {
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GLuint *tmp;
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RADEON_NEWPRIM( rmesa );
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atom->dirty = GL_TRUE;
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rmesa->radeon.hw.is_dirty = GL_TRUE;
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tmp = atom->cmd;
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atom->cmd = atom->lastcmd;
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atom->lastcmd = tmp;
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return 1;
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}
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else
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return 0;
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}
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/* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ
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* are available, you will also be adding an rmesa->state.max_state_size because
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* r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
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*/
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#if RADEON_OLD_PACKETS
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#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2))+nr*2)
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#define VERT_AOS_BUFSZ (0)
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#define ELTS_BUFSZ(nr) (24 + nr * 2)
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#define VBUF_BUFSZ (8)
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#else
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#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2) + nr*2))
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#define VERT_AOS_BUFSZ (5)
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#define ELTS_BUFSZ(nr) (16 + nr * 2)
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#define VBUF_BUFSZ (4)
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#endif
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#define SCISSOR_BUFSZ (8)
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#define INDEX_BUFSZ (7)
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static inline uint32_t cmdpacket3(int cmd_type)
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{
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drm_radeon_cmd_header_t cmd;
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cmd.i = 0;
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cmd.header.cmd_type = cmd_type;
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return (uint32_t)cmd.i;
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}
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#define OUT_BATCH_PACKET3(packet, num_extra) do { \
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OUT_BATCH(CP_PACKET2); \
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OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
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} while(0)
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#define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \
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OUT_BATCH(CP_PACKET2); \
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OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
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} while(0)
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#endif /* __RADEON_IOCTL_H__ */
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