462 lines
13 KiB
C
462 lines
13 KiB
C
/**************************************************************************
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Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
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VA Linux Systems Inc., Fremont, California.
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Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
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The Weather Channel (TM) funded Tungsten Graphics to develop the
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initial release of the Radeon 8500 driver under the XFree86 license.
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This notice must be preserved.
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All Rights Reserved.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial
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portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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/*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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* Keith Whitwell <keithw@vmware.com>
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* Kevin E. Martin <martin@valinux.com>
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* Nicolai Haehnle <prefect_@gmx.net>
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*/
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#ifndef __RADEON_CONTEXT_H__
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#define __RADEON_CONTEXT_H__
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#include "tnl/t_vertex.h"
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#include "dri_util.h"
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#include "drm-uapi/drm.h"
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#include "radeon_drm.h"
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#include "main/macros.h"
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#include "main/mtypes.h"
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#include "radeon_screen.h"
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#include "radeon_common.h"
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struct r100_context;
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typedef struct r100_context r100ContextRec;
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typedef struct r100_context *r100ContextPtr;
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#define R100_TEX_ALL 0x7
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/* used for both tcl_vtx and vc_frmt tex bits (they are identical) */
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#define RADEON_ST_BIT(unit) \
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(unit == 0 ? RADEON_CP_VC_FRMT_ST0 : (RADEON_CP_VC_FRMT_ST1 >> 2) << (2 * unit))
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#define RADEON_Q_BIT(unit) \
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(unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit))
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struct radeon_texture_env_state {
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radeonTexObjPtr texobj;
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GLenum format;
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GLenum envMode;
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};
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struct radeon_texture_state {
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struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS];
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};
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/* Trying to keep these relatively short as the variables are becoming
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* extravagently long. Drop the driver name prefix off the front of
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* everything - I think we know which driver we're in by now, and keep the
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* prefix to 3 letters unless absolutely impossible.
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*/
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#define CTX_CMD_0 0
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#define CTX_PP_MISC 1
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#define CTX_PP_FOG_COLOR 2
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#define CTX_RE_SOLID_COLOR 3
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#define CTX_RB3D_BLENDCNTL 4
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#define CTX_RB3D_DEPTHOFFSET 5
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#define CTX_RB3D_DEPTHPITCH 6
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#define CTX_RB3D_ZSTENCILCNTL 7
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#define CTX_CMD_1 8
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#define CTX_PP_CNTL 9
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#define CTX_RB3D_CNTL 10
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#define CTX_RB3D_COLOROFFSET 11
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#define CTX_CMD_2 12
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#define CTX_RB3D_COLORPITCH 13
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#define CTX_STATE_SIZE 14
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#define SET_CMD_0 0
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#define SET_SE_CNTL 1
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#define SET_SE_COORDFMT 2
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#define SET_CMD_1 3
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#define SET_SE_CNTL_STATUS 4
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#define SET_STATE_SIZE 5
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#define LIN_CMD_0 0
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#define LIN_RE_LINE_PATTERN 1
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#define LIN_RE_LINE_STATE 2
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#define LIN_CMD_1 3
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#define LIN_SE_LINE_WIDTH 4
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#define LIN_STATE_SIZE 5
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#define MSK_CMD_0 0
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#define MSK_RB3D_STENCILREFMASK 1
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#define MSK_RB3D_ROPCNTL 2
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#define MSK_RB3D_PLANEMASK 3
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#define MSK_STATE_SIZE 4
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#define VPT_CMD_0 0
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#define VPT_SE_VPORT_XSCALE 1
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#define VPT_SE_VPORT_XOFFSET 2
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#define VPT_SE_VPORT_YSCALE 3
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#define VPT_SE_VPORT_YOFFSET 4
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#define VPT_SE_VPORT_ZSCALE 5
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#define VPT_SE_VPORT_ZOFFSET 6
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#define VPT_STATE_SIZE 7
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#define MSC_CMD_0 0
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#define MSC_RE_MISC 1
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#define MSC_STATE_SIZE 2
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#define TEX_CMD_0 0
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#define TEX_PP_TXFILTER 1
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#define TEX_PP_TXFORMAT 2
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#define TEX_PP_TXOFFSET 3
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#define TEX_PP_TXCBLEND 4
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#define TEX_PP_TXABLEND 5
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#define TEX_PP_TFACTOR 6
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#define TEX_CMD_1 7
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#define TEX_PP_BORDER_COLOR 8
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#define TEX_STATE_SIZE 9
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#define TXR_CMD_0 0 /* rectangle textures */
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#define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */
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#define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */
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#define TXR_STATE_SIZE 3
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#define CUBE_CMD_0 0
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#define CUBE_PP_CUBIC_FACES 1
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#define CUBE_CMD_1 2
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#define CUBE_PP_CUBIC_OFFSET_0 3
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#define CUBE_PP_CUBIC_OFFSET_1 4
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#define CUBE_PP_CUBIC_OFFSET_2 5
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#define CUBE_PP_CUBIC_OFFSET_3 6
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#define CUBE_PP_CUBIC_OFFSET_4 7
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#define CUBE_STATE_SIZE 8
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#define ZBS_CMD_0 0
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#define ZBS_SE_ZBIAS_FACTOR 1
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#define ZBS_SE_ZBIAS_CONSTANT 2
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#define ZBS_STATE_SIZE 3
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#define TCL_CMD_0 0
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#define TCL_OUTPUT_VTXFMT 1
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#define TCL_OUTPUT_VTXSEL 2
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#define TCL_MATRIX_SELECT_0 3
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#define TCL_MATRIX_SELECT_1 4
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#define TCL_UCP_VERT_BLEND_CTL 5
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#define TCL_TEXTURE_PROC_CTL 6
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#define TCL_LIGHT_MODEL_CTL 7
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#define TCL_PER_LIGHT_CTL_0 8
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#define TCL_PER_LIGHT_CTL_1 9
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#define TCL_PER_LIGHT_CTL_2 10
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#define TCL_PER_LIGHT_CTL_3 11
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#define TCL_STATE_SIZE 12
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#define MTL_CMD_0 0
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#define MTL_EMMISSIVE_RED 1
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#define MTL_EMMISSIVE_GREEN 2
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#define MTL_EMMISSIVE_BLUE 3
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#define MTL_EMMISSIVE_ALPHA 4
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#define MTL_AMBIENT_RED 5
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#define MTL_AMBIENT_GREEN 6
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#define MTL_AMBIENT_BLUE 7
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#define MTL_AMBIENT_ALPHA 8
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#define MTL_DIFFUSE_RED 9
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#define MTL_DIFFUSE_GREEN 10
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#define MTL_DIFFUSE_BLUE 11
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#define MTL_DIFFUSE_ALPHA 12
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#define MTL_SPECULAR_RED 13
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#define MTL_SPECULAR_GREEN 14
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#define MTL_SPECULAR_BLUE 15
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#define MTL_SPECULAR_ALPHA 16
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#define MTL_SHININESS 17
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#define MTL_STATE_SIZE 18
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#define VTX_CMD_0 0
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#define VTX_SE_COORD_FMT 1
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#define VTX_STATE_SIZE 2
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#define MAT_CMD_0 0
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#define MAT_ELT_0 1
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#define MAT_STATE_SIZE 17
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#define GRD_CMD_0 0
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#define GRD_VERT_GUARD_CLIP_ADJ 1
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#define GRD_VERT_GUARD_DISCARD_ADJ 2
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#define GRD_HORZ_GUARD_CLIP_ADJ 3
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#define GRD_HORZ_GUARD_DISCARD_ADJ 4
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#define GRD_STATE_SIZE 5
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/* position changes frequently when lighting in modelpos - separate
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* out to new state item?
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*/
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#define LIT_CMD_0 0
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#define LIT_AMBIENT_RED 1
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#define LIT_AMBIENT_GREEN 2
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#define LIT_AMBIENT_BLUE 3
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#define LIT_AMBIENT_ALPHA 4
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#define LIT_DIFFUSE_RED 5
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#define LIT_DIFFUSE_GREEN 6
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#define LIT_DIFFUSE_BLUE 7
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#define LIT_DIFFUSE_ALPHA 8
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#define LIT_SPECULAR_RED 9
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#define LIT_SPECULAR_GREEN 10
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#define LIT_SPECULAR_BLUE 11
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#define LIT_SPECULAR_ALPHA 12
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#define LIT_POSITION_X 13
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#define LIT_POSITION_Y 14
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#define LIT_POSITION_Z 15
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#define LIT_POSITION_W 16
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#define LIT_DIRECTION_X 17
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#define LIT_DIRECTION_Y 18
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#define LIT_DIRECTION_Z 19
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#define LIT_DIRECTION_W 20
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#define LIT_ATTEN_QUADRATIC 21
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#define LIT_ATTEN_LINEAR 22
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#define LIT_ATTEN_CONST 23
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#define LIT_ATTEN_XXX 24
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#define LIT_CMD_1 25
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#define LIT_SPOT_DCD 26
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#define LIT_SPOT_EXPONENT 27
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#define LIT_SPOT_CUTOFF 28
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#define LIT_SPECULAR_THRESH 29
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#define LIT_RANGE_CUTOFF 30 /* ? */
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#define LIT_ATTEN_CONST_INV 31
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#define LIT_STATE_SIZE 32
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/* Fog
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*/
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#define FOG_CMD_0 0
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#define FOG_R 1
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#define FOG_C 2
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#define FOG_D 3
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#define FOG_PAD 4
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#define FOG_STATE_SIZE 5
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/* UCP
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*/
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#define UCP_CMD_0 0
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#define UCP_X 1
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#define UCP_Y 2
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#define UCP_Z 3
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#define UCP_W 4
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#define UCP_STATE_SIZE 5
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/* GLT - Global ambient
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*/
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#define GLT_CMD_0 0
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#define GLT_RED 1
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#define GLT_GREEN 2
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#define GLT_BLUE 3
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#define GLT_ALPHA 4
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#define GLT_STATE_SIZE 5
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/* EYE
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*/
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#define EYE_CMD_0 0
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#define EYE_X 1
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#define EYE_Y 2
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#define EYE_Z 3
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#define EYE_RESCALE_FACTOR 4
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#define EYE_STATE_SIZE 5
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#define SHN_CMD_0 0
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#define SHN_SHININESS 1
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#define SHN_STATE_SIZE 2
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#define R100_QUERYOBJ_CMD_0 0
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#define R100_QUERYOBJ_DATA_0 1
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#define R100_QUERYOBJ_CMDSIZE 2
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#define STP_CMD_0 0
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#define STP_DATA_0 1
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#define STP_CMD_1 2
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#define STP_STATE_SIZE 35
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struct r100_hw_state {
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/* Hardware state, stored as cmdbuf commands:
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* -- Need to doublebuffer for
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* - eliding noop statechange loops? (except line stipple count)
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*/
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struct radeon_state_atom ctx;
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struct radeon_state_atom set;
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struct radeon_state_atom lin;
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struct radeon_state_atom msk;
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struct radeon_state_atom vpt;
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struct radeon_state_atom tcl;
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struct radeon_state_atom msc;
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struct radeon_state_atom tex[3];
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struct radeon_state_atom cube[3];
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struct radeon_state_atom zbs;
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struct radeon_state_atom mtl;
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struct radeon_state_atom mat[6];
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struct radeon_state_atom lit[8]; /* includes vec, scl commands */
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struct radeon_state_atom ucp[6];
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struct radeon_state_atom eye; /* eye pos */
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struct radeon_state_atom grd; /* guard band clipping */
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struct radeon_state_atom fog;
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struct radeon_state_atom glt;
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struct radeon_state_atom txr[3]; /* for NPOT */
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struct radeon_state_atom stp;
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};
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struct radeon_stipple_state {
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GLuint mask[32];
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};
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struct r100_state {
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struct radeon_stipple_state stipple;
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struct radeon_texture_state texture;
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};
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#define RADEON_CMD_BUF_SZ (8*1024)
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#define R200_ELT_BUF_SZ (8*1024)
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/* radeon_tcl.c
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*/
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struct r100_tcl_info {
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GLuint vertex_format;
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GLuint hw_primitive;
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/* Temporary for cases where incoming vertex data is incompatible
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* with maos code.
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*/
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GLvector4f ObjClean;
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GLuint *Elts;
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int elt_cmd_offset;
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int elt_cmd_start;
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int elt_used;
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};
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/* radeon_swtcl.c
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*/
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struct r100_swtcl_info {
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GLuint vertex_format;
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GLubyte *verts;
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/* Fallback rasterization functions
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*/
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radeon_point_func draw_point;
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radeon_line_func draw_line;
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radeon_tri_func draw_tri;
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/**
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* Offset of the 4UB color data within a hardware (swtcl) vertex.
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*/
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GLuint coloroffset;
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/**
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* Offset of the 3UB specular color data within a hardware (swtcl) vertex.
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*/
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GLuint specoffset;
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GLboolean needproj;
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};
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/* A maximum total of 20 elements per vertex: 3 floats for position, 3
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* floats for normal, 4 floats for color, 4 bytes for secondary color,
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* 3 floats for each texture unit (9 floats total).
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*
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* The position data is never actually stored here, so 3 elements could be
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* trimmed out of the buffer. This number is only valid for vtxfmt!
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*/
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#define RADEON_MAX_VERTEX_SIZE 20
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struct r100_context {
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struct radeon_context radeon;
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/* Driver and hardware state management
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*/
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struct r100_hw_state hw;
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struct r100_state state;
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/* Vertex buffers
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*/
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struct radeon_ioctl ioctl;
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struct radeon_store store;
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/* TCL stuff
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*/
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GLmatrix TexGenMatrix[RADEON_MAX_TEXTURE_UNITS];
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GLboolean recheck_texgen[RADEON_MAX_TEXTURE_UNITS];
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GLboolean TexGenNeedNormals[RADEON_MAX_TEXTURE_UNITS];
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GLuint TexGenEnabled;
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GLuint NeedTexMatrix;
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GLuint TexMatColSwap;
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GLmatrix tmpmat[RADEON_MAX_TEXTURE_UNITS];
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/* radeon_tcl.c
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*/
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struct r100_tcl_info tcl;
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/* radeon_swtcl.c
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*/
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struct r100_swtcl_info swtcl;
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GLboolean using_hyperz;
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/* Performance counters
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*/
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GLuint boxes; /* Draw performance boxes */
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GLuint hardwareWentIdle;
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GLuint c_clears;
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GLuint c_drawWaits;
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GLuint c_textureSwaps;
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GLuint c_textureBytes;
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GLuint c_vertexBuffers;
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};
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static inline r100ContextPtr
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R100_CONTEXT(struct gl_context *ctx)
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{
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return (r100ContextPtr) ctx;
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}
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#define RADEON_OLD_PACKETS 1
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extern GLboolean r100CreateContext( gl_api api,
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const struct gl_config *glVisual,
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__DRIcontext *driContextPriv,
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const struct __DriverContextConfig *
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ctx_config,
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unsigned *error,
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void *sharedContextPrivate);
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#endif /* __RADEON_CONTEXT_H__ */
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