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mesa/src/amd/vulkan
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Dave Airlie 35c66f3e40 radv/image: bump all the offset to uint64_t. 
So one of the CTS tests tries to allocate a 16384x1 2048 array
texture. This overflows a bunch of calculations when we want it
tiled as the heights goes to 128.

addrlib returns us the correct size (16GB or so), but we mangle
it in the htile calcs due to the 32-bit offset fields, then
userspace gives us the reduced number and we try to allocate
it on a heap and things blow up.

We really need to give the app back the correct size for the
image so we can blow up properly in memory allocation later.

This should fix hangs in
dEQP-VK.pipeline.render_to_image.core.1d_array.huge.width_layers.r8g8b8a8_unorm_d32_sfloat_s8_uint
since
Fixes: ad3d98da9f (radv: enable tc compatible htile for d32s8 also.)

Now there's an open question if we should be enabling tc-compat
htile at all for shallow textures like the above.

This might cause some other wierd side effects in CTS even
without the tc compat so:
Cc: "17.2" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 		2017-10-17 08:28:48 +01:00
..
winsys/amdgpu radv: Only set the MTYPE flags on GFX9+. 2017-10-11 07:57:33 +10:00
.editorconfig amd: add .editorconfig 2017-08-29 01:08:58 +03:00
.gitignore radv: port to using updated anv entrypoint/extension generator. 2017-10-17 16:50:32 +10:00
Makefile.am radv: port to using updated anv entrypoint/extension generator. 2017-10-17 16:50:32 +10:00
Makefile.sources radv: port to using updated anv entrypoint/extension generator. 2017-10-17 16:50:32 +10:00
dev_icd.json.in meson: generate builddir/src/amd/vulkan/dev_icd.json 2017-10-05 23:46:21 +02:00
meson.build meson: generate builddir/src/amd/vulkan/dev_icd.json 2017-10-05 23:46:21 +02:00
radeon_icd.json.in radv: Suffix the radeon_icd file with the host CPU 2016-11-09 21:36:45 +00:00
radv_cmd_buffer.c radv: update ia_multi_vgt when executing secondary buffers 2017-10-16 14:50:30 +02:00
radv_cs.h amd: move r600d_common.h into r600g 2017-10-09 16:27:06 +02:00
radv_debug.c radv: remove duplicate debug_flags field 2017-10-12 08:52:38 +11:00
radv_debug.h radv: dump SPIRV when a GPU hang is detected 2017-10-04 19:37:08 +02:00
radv_descriptor_set.c radv: Don't use a virtual function for getting the buffer virtual address. 2017-09-20 22:04:25 +02:00
radv_descriptor_set.h radv: Only enter the immutable samplers init loop when we have some. 2017-09-20 22:04:25 +02:00
radv_device.c radv: port to using updated anv entrypoint/extension generator. 2017-10-17 16:50:32 +10:00
radv_entrypoints_gen.py radv: port to using updated anv entrypoint/extension generator. 2017-10-17 16:50:32 +10:00
radv_extensions.py radv: port to using updated anv entrypoint/extension generator. 2017-10-17 16:50:32 +10:00
radv_formats.c radv: Add R16G16B16A16_SNORM fast clear support 2017-10-11 07:29:43 +10:00
radv_image.c radv: do not allocate CMASK for non-MSSA images with 128 bit formats 2017-10-14 12:25:48 +02:00
radv_meta.c radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags 2017-10-06 09:49:06 +02:00
radv_meta.h radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags 2017-10-06 09:49:06 +02:00
radv_meta_blit.c radv: add radv_meta_save() helper 2017-10-06 09:49:06 +02:00
radv_meta_blit2d.c radv: remove useless checks around radv_CmdBindPipeline() 2017-10-04 23:18:51 +02:00
radv_meta_buffer.c radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags 2017-10-06 09:49:06 +02:00
radv_meta_bufimage.c radv: remove useless checks around radv_CmdBindPipeline() 2017-10-04 23:18:51 +02:00
radv_meta_clear.c radv: do not allocate CMASK for non-MSSA images with 128 bit formats 2017-10-14 12:25:48 +02:00
radv_meta_copy.c radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags 2017-10-06 09:49:06 +02:00
radv_meta_decompress.c radv: add radv_meta_save() helper 2017-10-06 09:49:06 +02:00
radv_meta_fast_clear.c radv: add radv_meta_save() helper 2017-10-06 09:49:06 +02:00
radv_meta_resolve.c radv: add radv_meta_save() helper 2017-10-06 09:49:06 +02:00
radv_meta_resolve_cs.c radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags 2017-10-06 09:49:06 +02:00
radv_meta_resolve_fs.c radv: add radv_meta_save() helper 2017-10-06 09:49:06 +02:00
radv_pass.c radv: Store multiview info in renderpass. 2017-08-24 19:20:47 +02:00
radv_pipeline.c radv: take unsafe_math and sisched into account when hashing shaders. 2017-10-12 23:46:55 +01:00
radv_pipeline_cache.c radv: take unsafe_math and sisched into account when hashing shaders. 2017-10-12 23:46:55 +01:00
radv_private.h radv/image: bump all the offset to uint64_t. 2017-10-17 08:28:48 +01:00
radv_query.c amd: move r600d_common.h into r600g 2017-10-09 16:27:06 +02:00
radv_radeon_winsys.h radv: Don't use a virtual function for getting the buffer virtual address. 2017-09-20 22:04:25 +02:00
radv_shader.c radv: remove duplicate debug_flags field 2017-10-12 08:52:38 +11:00
radv_shader.h radv: dump SPIRV when a GPU hang is detected 2017-10-04 19:37:08 +02:00
radv_util.c radv: use enum_to_str util functions. 2017-03-04 15:05:14 +00:00
radv_util.h radv: Use proper header guards over 'pragma once' directives 2016-10-10 16:10:56 +11:00
radv_wsi.c radv: replace conditional compilation with MAYBE_UNUSED 2017-09-19 09:46:18 +01:00
radv_wsi_wayland.c radv/wsi: Don't include wayland headers 2017-03-13 11:16:30 +00:00
radv_wsi_x11.c vulkan/wsi/radv: add initial prime support (v1.1) 2017-02-27 05:42:16 +10:00
si_cmd_buffer.c radv: use CLEAR_STATE for initializing some registers 2017-10-12 09:17:43 +02:00
vk_format.h radv: Don't use SRGB format for image stores during resolve. 2017-08-06 16:06:50 +02:00
vk_format_layout.csv
…
vk_format_parse.py amd: remove shebang from python scripts 2017-03-10 14:12:46 +00:00
vk_format_table.py amd: remove shebang from python scripts 2017-03-10 14:12:46 +00:00