mesa/docs/gallium
Vasily Khoruzhick 3bb192a15b gallium: add PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS
Driver should enable this cap if it prefers varyings to be aligned
to power of two in a slot, i.e. vec4 in .xyzw, vec3 in .xyz, vec2 in .xy
or .zw

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13151>
2021-11-15 22:52:55 +00:00
..
cso gallium: add rasterizer depth_clamp enable bit 2021-09-09 18:29:26 +00:00
buffermapping.rst docs: fix invalid rst 2021-04-01 08:15:08 +00:00
context.rst gallium: remove vertices_per_patch, add pipe_context::set_patch_vertices 2021-08-21 00:08:11 +00:00
cso.rst
debugging.rst gallium: when tracing is enabled for threaded drivers, trace the driver thread 2021-04-21 14:28:44 +00:00
distro.rst
format.rst docs/gallium: Document the index buffer format convention 2021-06-01 23:40:47 +00:00
glossary.rst
index.rst docs: Add some documentation of game GL buffer object mapping behavior. 2021-03-09 09:24:23 -08:00
intro.rst
pipeline.txt
postprocess.rst docs: move gallium specific docs into gallium folder 2020-07-07 10:22:08 +00:00
resources.rst
screen.rst gallium: add PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS 2021-11-15 22:52:55 +00:00
tgsi.rst gallium/tgsi: rip out cylindrical wrap support 2021-08-25 19:37:16 +00:00