663 lines
24 KiB
C
663 lines
24 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <math.h>
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#include "vtn_private.h"
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/*
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* Normally, column vectors in SPIR-V correspond to a single NIR SSA
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* definition. But for matrix multiplies, we want to do one routine for
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* multiplying a matrix by a matrix and then pretend that vectors are matrices
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* with one column. So we "wrap" these things, and unwrap the result before we
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* send it off.
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*/
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static struct vtn_ssa_value *
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wrap_matrix(struct vtn_builder *b, struct vtn_ssa_value *val)
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{
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if (val == NULL)
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return NULL;
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if (glsl_type_is_matrix(val->type))
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return val;
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struct vtn_ssa_value *dest = rzalloc(b, struct vtn_ssa_value);
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dest->type = val->type;
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dest->elems = ralloc_array(b, struct vtn_ssa_value *, 1);
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dest->elems[0] = val;
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return dest;
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}
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static struct vtn_ssa_value *
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unwrap_matrix(struct vtn_ssa_value *val)
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{
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if (glsl_type_is_matrix(val->type))
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return val;
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return val->elems[0];
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}
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static struct vtn_ssa_value *
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matrix_multiply(struct vtn_builder *b,
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struct vtn_ssa_value *_src0, struct vtn_ssa_value *_src1)
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{
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struct vtn_ssa_value *src0 = wrap_matrix(b, _src0);
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struct vtn_ssa_value *src1 = wrap_matrix(b, _src1);
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struct vtn_ssa_value *src0_transpose = wrap_matrix(b, _src0->transposed);
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struct vtn_ssa_value *src1_transpose = wrap_matrix(b, _src1->transposed);
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unsigned src0_rows = glsl_get_vector_elements(src0->type);
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unsigned src0_columns = glsl_get_matrix_columns(src0->type);
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unsigned src1_columns = glsl_get_matrix_columns(src1->type);
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const struct glsl_type *dest_type;
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if (src1_columns > 1) {
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dest_type = glsl_matrix_type(glsl_get_base_type(src0->type),
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src0_rows, src1_columns);
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} else {
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dest_type = glsl_vector_type(glsl_get_base_type(src0->type), src0_rows);
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}
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struct vtn_ssa_value *dest = vtn_create_ssa_value(b, dest_type);
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dest = wrap_matrix(b, dest);
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bool transpose_result = false;
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if (src0_transpose && src1_transpose) {
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/* transpose(A) * transpose(B) = transpose(B * A) */
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src1 = src0_transpose;
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src0 = src1_transpose;
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src0_transpose = NULL;
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src1_transpose = NULL;
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transpose_result = true;
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}
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if (src0_transpose && !src1_transpose &&
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glsl_get_base_type(src0->type) == GLSL_TYPE_FLOAT) {
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/* We already have the rows of src0 and the columns of src1 available,
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* so we can just take the dot product of each row with each column to
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* get the result.
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*/
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for (unsigned i = 0; i < src1_columns; i++) {
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nir_ssa_def *vec_src[4];
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for (unsigned j = 0; j < src0_rows; j++) {
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vec_src[j] = nir_fdot(&b->nb, src0_transpose->elems[j]->def,
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src1->elems[i]->def);
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}
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dest->elems[i]->def = nir_vec(&b->nb, vec_src, src0_rows);
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}
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} else {
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/* We don't handle the case where src1 is transposed but not src0, since
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* the general case only uses individual components of src1 so the
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* optimizer should chew through the transpose we emitted for src1.
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*/
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for (unsigned i = 0; i < src1_columns; i++) {
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/* dest[i] = sum(src0[j] * src1[i][j] for all j) */
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dest->elems[i]->def =
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nir_fmul(&b->nb, src0->elems[0]->def,
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nir_channel(&b->nb, src1->elems[i]->def, 0));
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for (unsigned j = 1; j < src0_columns; j++) {
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dest->elems[i]->def =
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nir_fadd(&b->nb, dest->elems[i]->def,
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nir_fmul(&b->nb, src0->elems[j]->def,
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nir_channel(&b->nb, src1->elems[i]->def, j)));
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}
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}
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}
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dest = unwrap_matrix(dest);
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if (transpose_result)
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dest = vtn_ssa_transpose(b, dest);
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return dest;
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}
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static struct vtn_ssa_value *
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mat_times_scalar(struct vtn_builder *b,
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struct vtn_ssa_value *mat,
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nir_ssa_def *scalar)
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{
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struct vtn_ssa_value *dest = vtn_create_ssa_value(b, mat->type);
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for (unsigned i = 0; i < glsl_get_matrix_columns(mat->type); i++) {
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if (glsl_base_type_is_integer(glsl_get_base_type(mat->type)))
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dest->elems[i]->def = nir_imul(&b->nb, mat->elems[i]->def, scalar);
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else
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dest->elems[i]->def = nir_fmul(&b->nb, mat->elems[i]->def, scalar);
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}
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return dest;
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}
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static void
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vtn_handle_matrix_alu(struct vtn_builder *b, SpvOp opcode,
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struct vtn_value *dest,
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struct vtn_ssa_value *src0, struct vtn_ssa_value *src1)
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{
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switch (opcode) {
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case SpvOpFNegate: {
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dest->ssa = vtn_create_ssa_value(b, src0->type);
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unsigned cols = glsl_get_matrix_columns(src0->type);
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for (unsigned i = 0; i < cols; i++)
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dest->ssa->elems[i]->def = nir_fneg(&b->nb, src0->elems[i]->def);
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break;
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}
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case SpvOpFAdd: {
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dest->ssa = vtn_create_ssa_value(b, src0->type);
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unsigned cols = glsl_get_matrix_columns(src0->type);
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for (unsigned i = 0; i < cols; i++)
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dest->ssa->elems[i]->def =
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nir_fadd(&b->nb, src0->elems[i]->def, src1->elems[i]->def);
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break;
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}
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case SpvOpFSub: {
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dest->ssa = vtn_create_ssa_value(b, src0->type);
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unsigned cols = glsl_get_matrix_columns(src0->type);
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for (unsigned i = 0; i < cols; i++)
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dest->ssa->elems[i]->def =
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nir_fsub(&b->nb, src0->elems[i]->def, src1->elems[i]->def);
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break;
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}
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case SpvOpTranspose:
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dest->ssa = vtn_ssa_transpose(b, src0);
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break;
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case SpvOpMatrixTimesScalar:
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if (src0->transposed) {
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dest->ssa = vtn_ssa_transpose(b, mat_times_scalar(b, src0->transposed,
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src1->def));
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} else {
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dest->ssa = mat_times_scalar(b, src0, src1->def);
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}
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break;
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case SpvOpVectorTimesMatrix:
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case SpvOpMatrixTimesVector:
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case SpvOpMatrixTimesMatrix:
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if (opcode == SpvOpVectorTimesMatrix) {
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dest->ssa = matrix_multiply(b, vtn_ssa_transpose(b, src1), src0);
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} else {
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dest->ssa = matrix_multiply(b, src0, src1);
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}
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break;
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default: vtn_fail("unknown matrix opcode");
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}
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}
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static void
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vtn_handle_bitcast(struct vtn_builder *b, struct vtn_ssa_value *dest,
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struct nir_ssa_def *src)
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{
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if (glsl_get_vector_elements(dest->type) == src->num_components) {
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/* From the definition of OpBitcast in the SPIR-V 1.2 spec:
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*
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* "If Result Type has the same number of components as Operand, they
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* must also have the same component width, and results are computed per
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* component."
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*/
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dest->def = nir_imov(&b->nb, src);
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return;
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}
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/* From the definition of OpBitcast in the SPIR-V 1.2 spec:
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*
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* "If Result Type has a different number of components than Operand, the
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* total number of bits in Result Type must equal the total number of bits
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* in Operand. Let L be the type, either Result Type or Operand’s type, that
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* has the larger number of components. Let S be the other type, with the
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* smaller number of components. The number of components in L must be an
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* integer multiple of the number of components in S. The first component
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* (that is, the only or lowest-numbered component) of S maps to the first
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* components of L, and so on, up to the last component of S mapping to the
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* last components of L. Within this mapping, any single component of S
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* (mapping to multiple components of L) maps its lower-ordered bits to the
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* lower-numbered components of L."
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*/
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unsigned src_bit_size = src->bit_size;
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unsigned dest_bit_size = glsl_get_bit_size(dest->type);
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unsigned src_components = src->num_components;
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unsigned dest_components = glsl_get_vector_elements(dest->type);
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vtn_assert(src_bit_size * src_components == dest_bit_size * dest_components);
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nir_ssa_def *dest_chan[4];
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if (src_bit_size > dest_bit_size) {
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vtn_assert(src_bit_size % dest_bit_size == 0);
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unsigned divisor = src_bit_size / dest_bit_size;
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for (unsigned comp = 0; comp < src_components; comp++) {
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vtn_assert(src_bit_size == 64);
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vtn_assert(dest_bit_size == 32);
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nir_ssa_def *split =
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nir_unpack_64_2x32(&b->nb, nir_channel(&b->nb, src, comp));
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for (unsigned i = 0; i < divisor; i++)
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dest_chan[divisor * comp + i] = nir_channel(&b->nb, split, i);
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}
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} else {
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vtn_assert(dest_bit_size % src_bit_size == 0);
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unsigned divisor = dest_bit_size / src_bit_size;
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for (unsigned comp = 0; comp < dest_components; comp++) {
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unsigned channels = ((1 << divisor) - 1) << (comp * divisor);
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nir_ssa_def *src_chan =
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nir_channels(&b->nb, src, channels);
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vtn_assert(dest_bit_size == 64);
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vtn_assert(src_bit_size == 32);
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dest_chan[comp] = nir_pack_64_2x32(&b->nb, src_chan);
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}
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}
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dest->def = nir_vec(&b->nb, dest_chan, dest_components);
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}
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nir_op
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vtn_nir_alu_op_for_spirv_opcode(struct vtn_builder *b,
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SpvOp opcode, bool *swap,
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unsigned src_bit_size, unsigned dst_bit_size)
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{
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/* Indicates that the first two arguments should be swapped. This is
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* used for implementing greater-than and less-than-or-equal.
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*/
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*swap = false;
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switch (opcode) {
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case SpvOpSNegate: return nir_op_ineg;
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case SpvOpFNegate: return nir_op_fneg;
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case SpvOpNot: return nir_op_inot;
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case SpvOpIAdd: return nir_op_iadd;
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case SpvOpFAdd: return nir_op_fadd;
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case SpvOpISub: return nir_op_isub;
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case SpvOpFSub: return nir_op_fsub;
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case SpvOpIMul: return nir_op_imul;
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case SpvOpFMul: return nir_op_fmul;
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case SpvOpUDiv: return nir_op_udiv;
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case SpvOpSDiv: return nir_op_idiv;
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case SpvOpFDiv: return nir_op_fdiv;
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case SpvOpUMod: return nir_op_umod;
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case SpvOpSMod: return nir_op_imod;
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case SpvOpFMod: return nir_op_fmod;
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case SpvOpSRem: return nir_op_irem;
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case SpvOpFRem: return nir_op_frem;
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case SpvOpShiftRightLogical: return nir_op_ushr;
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case SpvOpShiftRightArithmetic: return nir_op_ishr;
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case SpvOpShiftLeftLogical: return nir_op_ishl;
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case SpvOpLogicalOr: return nir_op_ior;
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case SpvOpLogicalEqual: return nir_op_ieq;
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case SpvOpLogicalNotEqual: return nir_op_ine;
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case SpvOpLogicalAnd: return nir_op_iand;
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case SpvOpLogicalNot: return nir_op_inot;
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case SpvOpBitwiseOr: return nir_op_ior;
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case SpvOpBitwiseXor: return nir_op_ixor;
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case SpvOpBitwiseAnd: return nir_op_iand;
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case SpvOpSelect: return nir_op_bcsel;
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case SpvOpIEqual: return nir_op_ieq;
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case SpvOpBitFieldInsert: return nir_op_bitfield_insert;
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case SpvOpBitFieldSExtract: return nir_op_ibitfield_extract;
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case SpvOpBitFieldUExtract: return nir_op_ubitfield_extract;
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case SpvOpBitReverse: return nir_op_bitfield_reverse;
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case SpvOpBitCount: return nir_op_bit_count;
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/* The ordered / unordered operators need special implementation besides
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* the logical operator to use since they also need to check if operands are
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* ordered.
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*/
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case SpvOpFOrdEqual: return nir_op_feq;
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case SpvOpFUnordEqual: return nir_op_feq;
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case SpvOpINotEqual: return nir_op_ine;
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case SpvOpFOrdNotEqual: return nir_op_fne;
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case SpvOpFUnordNotEqual: return nir_op_fne;
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case SpvOpULessThan: return nir_op_ult;
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case SpvOpSLessThan: return nir_op_ilt;
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case SpvOpFOrdLessThan: return nir_op_flt;
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case SpvOpFUnordLessThan: return nir_op_flt;
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case SpvOpUGreaterThan: *swap = true; return nir_op_ult;
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case SpvOpSGreaterThan: *swap = true; return nir_op_ilt;
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case SpvOpFOrdGreaterThan: *swap = true; return nir_op_flt;
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case SpvOpFUnordGreaterThan: *swap = true; return nir_op_flt;
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case SpvOpULessThanEqual: *swap = true; return nir_op_uge;
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case SpvOpSLessThanEqual: *swap = true; return nir_op_ige;
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case SpvOpFOrdLessThanEqual: *swap = true; return nir_op_fge;
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case SpvOpFUnordLessThanEqual: *swap = true; return nir_op_fge;
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case SpvOpUGreaterThanEqual: return nir_op_uge;
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case SpvOpSGreaterThanEqual: return nir_op_ige;
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case SpvOpFOrdGreaterThanEqual: return nir_op_fge;
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case SpvOpFUnordGreaterThanEqual: return nir_op_fge;
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/* Conversions: */
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case SpvOpQuantizeToF16: return nir_op_fquantize2f16;
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case SpvOpUConvert:
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case SpvOpConvertFToU:
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case SpvOpConvertFToS:
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case SpvOpConvertSToF:
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case SpvOpConvertUToF:
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case SpvOpSConvert:
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case SpvOpFConvert: {
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nir_alu_type src_type;
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nir_alu_type dst_type;
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switch (opcode) {
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case SpvOpConvertFToS:
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src_type = nir_type_float;
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dst_type = nir_type_int;
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break;
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case SpvOpConvertFToU:
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src_type = nir_type_float;
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dst_type = nir_type_uint;
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break;
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case SpvOpFConvert:
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src_type = dst_type = nir_type_float;
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break;
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case SpvOpConvertSToF:
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src_type = nir_type_int;
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dst_type = nir_type_float;
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break;
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case SpvOpSConvert:
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src_type = dst_type = nir_type_int;
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break;
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case SpvOpConvertUToF:
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src_type = nir_type_uint;
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dst_type = nir_type_float;
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break;
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case SpvOpUConvert:
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src_type = dst_type = nir_type_uint;
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break;
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default:
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unreachable("Invalid opcode");
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}
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src_type |= src_bit_size;
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dst_type |= dst_bit_size;
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return nir_type_conversion_op(src_type, dst_type, nir_rounding_mode_undef);
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}
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/* Derivatives: */
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case SpvOpDPdx: return nir_op_fddx;
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case SpvOpDPdy: return nir_op_fddy;
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case SpvOpDPdxFine: return nir_op_fddx_fine;
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case SpvOpDPdyFine: return nir_op_fddy_fine;
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case SpvOpDPdxCoarse: return nir_op_fddx_coarse;
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case SpvOpDPdyCoarse: return nir_op_fddy_coarse;
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default:
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vtn_fail("No NIR equivalent");
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}
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}
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static void
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handle_no_contraction(struct vtn_builder *b, struct vtn_value *val, int member,
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const struct vtn_decoration *dec, void *_void)
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{
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vtn_assert(dec->scope == VTN_DEC_DECORATION);
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if (dec->decoration != SpvDecorationNoContraction)
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return;
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b->nb.exact = true;
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}
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static void
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handle_rounding_mode(struct vtn_builder *b, struct vtn_value *val, int member,
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const struct vtn_decoration *dec, void *_out_rounding_mode)
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{
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nir_rounding_mode *out_rounding_mode = _out_rounding_mode;
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assert(dec->scope == VTN_DEC_DECORATION);
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if (dec->decoration != SpvDecorationFPRoundingMode)
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return;
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switch (dec->literals[0]) {
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case SpvFPRoundingModeRTE:
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*out_rounding_mode = nir_rounding_mode_rtne;
|
||
break;
|
||
case SpvFPRoundingModeRTZ:
|
||
*out_rounding_mode = nir_rounding_mode_rtz;
|
||
break;
|
||
default:
|
||
unreachable("Not supported rounding mode");
|
||
break;
|
||
}
|
||
}
|
||
|
||
void
|
||
vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
|
||
const uint32_t *w, unsigned count)
|
||
{
|
||
struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
|
||
const struct glsl_type *type =
|
||
vtn_value(b, w[1], vtn_value_type_type)->type->type;
|
||
|
||
vtn_foreach_decoration(b, val, handle_no_contraction, NULL);
|
||
|
||
/* Collect the various SSA sources */
|
||
const unsigned num_inputs = count - 3;
|
||
struct vtn_ssa_value *vtn_src[4] = { NULL, };
|
||
for (unsigned i = 0; i < num_inputs; i++)
|
||
vtn_src[i] = vtn_ssa_value(b, w[i + 3]);
|
||
|
||
if (glsl_type_is_matrix(vtn_src[0]->type) ||
|
||
(num_inputs >= 2 && glsl_type_is_matrix(vtn_src[1]->type))) {
|
||
vtn_handle_matrix_alu(b, opcode, val, vtn_src[0], vtn_src[1]);
|
||
b->nb.exact = false;
|
||
return;
|
||
}
|
||
|
||
val->ssa = vtn_create_ssa_value(b, type);
|
||
nir_ssa_def *src[4] = { NULL, };
|
||
for (unsigned i = 0; i < num_inputs; i++) {
|
||
vtn_assert(glsl_type_is_vector_or_scalar(vtn_src[i]->type));
|
||
src[i] = vtn_src[i]->def;
|
||
}
|
||
|
||
switch (opcode) {
|
||
case SpvOpAny:
|
||
if (src[0]->num_components == 1) {
|
||
val->ssa->def = nir_imov(&b->nb, src[0]);
|
||
} else {
|
||
nir_op op;
|
||
switch (src[0]->num_components) {
|
||
case 2: op = nir_op_bany_inequal2; break;
|
||
case 3: op = nir_op_bany_inequal3; break;
|
||
case 4: op = nir_op_bany_inequal4; break;
|
||
default: vtn_fail("invalid number of components");
|
||
}
|
||
val->ssa->def = nir_build_alu(&b->nb, op, src[0],
|
||
nir_imm_int(&b->nb, NIR_FALSE),
|
||
NULL, NULL);
|
||
}
|
||
break;
|
||
|
||
case SpvOpAll:
|
||
if (src[0]->num_components == 1) {
|
||
val->ssa->def = nir_imov(&b->nb, src[0]);
|
||
} else {
|
||
nir_op op;
|
||
switch (src[0]->num_components) {
|
||
case 2: op = nir_op_ball_iequal2; break;
|
||
case 3: op = nir_op_ball_iequal3; break;
|
||
case 4: op = nir_op_ball_iequal4; break;
|
||
default: vtn_fail("invalid number of components");
|
||
}
|
||
val->ssa->def = nir_build_alu(&b->nb, op, src[0],
|
||
nir_imm_int(&b->nb, NIR_TRUE),
|
||
NULL, NULL);
|
||
}
|
||
break;
|
||
|
||
case SpvOpOuterProduct: {
|
||
for (unsigned i = 0; i < src[1]->num_components; i++) {
|
||
val->ssa->elems[i]->def =
|
||
nir_fmul(&b->nb, src[0], nir_channel(&b->nb, src[1], i));
|
||
}
|
||
break;
|
||
}
|
||
|
||
case SpvOpDot:
|
||
val->ssa->def = nir_fdot(&b->nb, src[0], src[1]);
|
||
break;
|
||
|
||
case SpvOpIAddCarry:
|
||
vtn_assert(glsl_type_is_struct(val->ssa->type));
|
||
val->ssa->elems[0]->def = nir_iadd(&b->nb, src[0], src[1]);
|
||
val->ssa->elems[1]->def = nir_uadd_carry(&b->nb, src[0], src[1]);
|
||
break;
|
||
|
||
case SpvOpISubBorrow:
|
||
vtn_assert(glsl_type_is_struct(val->ssa->type));
|
||
val->ssa->elems[0]->def = nir_isub(&b->nb, src[0], src[1]);
|
||
val->ssa->elems[1]->def = nir_usub_borrow(&b->nb, src[0], src[1]);
|
||
break;
|
||
|
||
case SpvOpUMulExtended:
|
||
vtn_assert(glsl_type_is_struct(val->ssa->type));
|
||
val->ssa->elems[0]->def = nir_imul(&b->nb, src[0], src[1]);
|
||
val->ssa->elems[1]->def = nir_umul_high(&b->nb, src[0], src[1]);
|
||
break;
|
||
|
||
case SpvOpSMulExtended:
|
||
vtn_assert(glsl_type_is_struct(val->ssa->type));
|
||
val->ssa->elems[0]->def = nir_imul(&b->nb, src[0], src[1]);
|
||
val->ssa->elems[1]->def = nir_imul_high(&b->nb, src[0], src[1]);
|
||
break;
|
||
|
||
case SpvOpFwidth:
|
||
val->ssa->def = nir_fadd(&b->nb,
|
||
nir_fabs(&b->nb, nir_fddx(&b->nb, src[0])),
|
||
nir_fabs(&b->nb, nir_fddy(&b->nb, src[0])));
|
||
break;
|
||
case SpvOpFwidthFine:
|
||
val->ssa->def = nir_fadd(&b->nb,
|
||
nir_fabs(&b->nb, nir_fddx_fine(&b->nb, src[0])),
|
||
nir_fabs(&b->nb, nir_fddy_fine(&b->nb, src[0])));
|
||
break;
|
||
case SpvOpFwidthCoarse:
|
||
val->ssa->def = nir_fadd(&b->nb,
|
||
nir_fabs(&b->nb, nir_fddx_coarse(&b->nb, src[0])),
|
||
nir_fabs(&b->nb, nir_fddy_coarse(&b->nb, src[0])));
|
||
break;
|
||
|
||
case SpvOpVectorTimesScalar:
|
||
/* The builder will take care of splatting for us. */
|
||
val->ssa->def = nir_fmul(&b->nb, src[0], src[1]);
|
||
break;
|
||
|
||
case SpvOpIsNan:
|
||
val->ssa->def = nir_fne(&b->nb, src[0], src[0]);
|
||
break;
|
||
|
||
case SpvOpIsInf: {
|
||
nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY, src[0]->bit_size);
|
||
val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]), inf);
|
||
break;
|
||
}
|
||
|
||
case SpvOpFUnordEqual:
|
||
case SpvOpFUnordNotEqual:
|
||
case SpvOpFUnordLessThan:
|
||
case SpvOpFUnordGreaterThan:
|
||
case SpvOpFUnordLessThanEqual:
|
||
case SpvOpFUnordGreaterThanEqual: {
|
||
bool swap;
|
||
unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
|
||
unsigned dst_bit_size = glsl_get_bit_size(type);
|
||
nir_op op = vtn_nir_alu_op_for_spirv_opcode(b, opcode, &swap,
|
||
src_bit_size, dst_bit_size);
|
||
|
||
if (swap) {
|
||
nir_ssa_def *tmp = src[0];
|
||
src[0] = src[1];
|
||
src[1] = tmp;
|
||
}
|
||
|
||
val->ssa->def =
|
||
nir_ior(&b->nb,
|
||
nir_build_alu(&b->nb, op, src[0], src[1], NULL, NULL),
|
||
nir_ior(&b->nb,
|
||
nir_fne(&b->nb, src[0], src[0]),
|
||
nir_fne(&b->nb, src[1], src[1])));
|
||
break;
|
||
}
|
||
|
||
case SpvOpFOrdEqual:
|
||
case SpvOpFOrdNotEqual:
|
||
case SpvOpFOrdLessThan:
|
||
case SpvOpFOrdGreaterThan:
|
||
case SpvOpFOrdLessThanEqual:
|
||
case SpvOpFOrdGreaterThanEqual: {
|
||
bool swap;
|
||
unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
|
||
unsigned dst_bit_size = glsl_get_bit_size(type);
|
||
nir_op op = vtn_nir_alu_op_for_spirv_opcode(b, opcode, &swap,
|
||
src_bit_size, dst_bit_size);
|
||
|
||
if (swap) {
|
||
nir_ssa_def *tmp = src[0];
|
||
src[0] = src[1];
|
||
src[1] = tmp;
|
||
}
|
||
|
||
val->ssa->def =
|
||
nir_iand(&b->nb,
|
||
nir_build_alu(&b->nb, op, src[0], src[1], NULL, NULL),
|
||
nir_iand(&b->nb,
|
||
nir_feq(&b->nb, src[0], src[0]),
|
||
nir_feq(&b->nb, src[1], src[1])));
|
||
break;
|
||
}
|
||
|
||
case SpvOpBitcast:
|
||
vtn_handle_bitcast(b, val->ssa, src[0]);
|
||
break;
|
||
|
||
case SpvOpFConvert: {
|
||
nir_alu_type src_alu_type = nir_get_nir_type_for_glsl_type(vtn_src[0]->type);
|
||
nir_alu_type dst_alu_type = nir_get_nir_type_for_glsl_type(type);
|
||
nir_rounding_mode rounding_mode = nir_rounding_mode_undef;
|
||
|
||
vtn_foreach_decoration(b, val, handle_rounding_mode, &rounding_mode);
|
||
nir_op op = nir_type_conversion_op(src_alu_type, dst_alu_type, rounding_mode);
|
||
|
||
val->ssa->def = nir_build_alu(&b->nb, op, src[0], src[1], NULL, NULL);
|
||
break;
|
||
}
|
||
|
||
default: {
|
||
bool swap;
|
||
unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
|
||
unsigned dst_bit_size = glsl_get_bit_size(type);
|
||
nir_op op = vtn_nir_alu_op_for_spirv_opcode(b, opcode, &swap,
|
||
src_bit_size, dst_bit_size);
|
||
|
||
if (swap) {
|
||
nir_ssa_def *tmp = src[0];
|
||
src[0] = src[1];
|
||
src[1] = tmp;
|
||
}
|
||
|
||
val->ssa->def = nir_build_alu(&b->nb, op, src[0], src[1], src[2], src[3]);
|
||
break;
|
||
} /* default */
|
||
}
|
||
|
||
b->nb.exact = false;
|
||
}
|