212 lines
7.1 KiB
C++
212 lines
7.1 KiB
C++
/*
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* Copyright © 2021 Google LLC
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <gtest/gtest.h>
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#include "ralloc.h"
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#include "register_allocate.h"
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#include "register_allocate_internal.h"
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class ra_test : public ::testing::Test {
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public:
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void *mem_ctx;
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protected:
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ra_test();
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~ra_test();
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};
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ra_test::ra_test()
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{
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mem_ctx = ralloc_context(NULL);
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}
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ra_test::~ra_test()
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{
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ralloc_free(mem_ctx);
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}
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void
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thumb_checks(struct ra_regs *regs, unsigned reg32_base, unsigned reg64_base)
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{
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struct ra_class *reg32low = ra_get_class_from_index(regs, 0);
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struct ra_class *reg64low = ra_get_class_from_index(regs, 1);
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struct ra_class *reg96 = ra_get_class_from_index(regs, 2);
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/* Table 4.1 */
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ASSERT_EQ(reg32low->p, 8);
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ASSERT_EQ(reg32low->q[reg32low->index], 1);
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ASSERT_EQ(reg32low->q[reg64low->index], 2);
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ASSERT_EQ(reg32low->q[reg96->index], 3);
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ASSERT_EQ(reg64low->p, 8);
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ASSERT_EQ(reg64low->q[reg32low->index], 2);
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ASSERT_EQ(reg64low->q[reg64low->index], 3);
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ASSERT_EQ(reg64low->q[reg96->index], 4);
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ASSERT_EQ(reg96->p, 2);
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ASSERT_EQ(reg96->q[reg96->index], 2);
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ASSERT_EQ(reg96->q[reg64low->index], 2);
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ASSERT_EQ(reg96->q[reg96->index], 2);
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/* These individual regs should conflict with themselves, but nothing else from their class */
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for (int i = 0; i < 7; i++) {
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ASSERT_FALSE(ra_class_allocations_conflict(reg32low, reg32_base + i, reg32low, reg32_base + i + 1));
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ASSERT_TRUE(ra_class_allocations_conflict(reg32low, reg32_base + i, reg32low, reg32_base + i));
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}
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/* Check that reg64low conflicts with the pairs of reg32low but not neighbors */
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ASSERT_TRUE(ra_class_allocations_conflict(reg64low, reg64_base + 0, reg32low, reg32_base + 0));
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ASSERT_TRUE(ra_class_allocations_conflict(reg64low, reg64_base + 0, reg32low, reg32_base + 1));
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ASSERT_FALSE(ra_class_allocations_conflict(reg64low, reg64_base + 0, reg32low, reg32_base + 2));
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ASSERT_FALSE(ra_class_allocations_conflict(reg64low, reg64_base + 1, reg32low, reg32_base + 0));
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ASSERT_TRUE(ra_class_allocations_conflict(reg64low, reg64_base + 1, reg32low, reg32_base + 1));
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ASSERT_TRUE(ra_class_allocations_conflict(reg64low, reg64_base + 1, reg32low, reg32_base + 2));
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ASSERT_FALSE(ra_class_allocations_conflict(reg64low, reg64_base + 1, reg32low, reg32_base + 3));
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}
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TEST_F(ra_test, thumb)
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{
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struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 100, true);
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/* r0..15 are the real HW registers. */
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int next_vreg = 16;
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/* reg32low is any of the low 8 registers. */
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unsigned int reg32_base = next_vreg;
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struct ra_class *reg32low = ra_alloc_reg_class(regs);
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for (int i = 0; i < 8; i++) {
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int vreg = next_vreg++;
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ra_class_add_reg(reg32low, vreg);
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ra_add_transitive_reg_conflict(regs, i, vreg);
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}
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/* reg64low is pairs of the low 8 registers (with wraparound!) */
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unsigned int reg64_base = next_vreg;
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struct ra_class *reg64low = ra_alloc_reg_class(regs);
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for (int i = 0; i < 8; i++) {
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int vreg = next_vreg++;
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ra_class_add_reg(reg64low, vreg);
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ra_add_transitive_reg_conflict(regs, i, vreg);
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ra_add_transitive_reg_conflict(regs, (i + 1) % 8, vreg);
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}
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/* reg96 is one of either r[0..2] or r[1..3] */
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struct ra_class *reg96 = ra_alloc_reg_class(regs);
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for (int i = 0; i < 2; i++) {
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int vreg = next_vreg++;
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ra_class_add_reg(reg96, vreg);
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for (int j = 0; j < 3; j++)
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ra_add_transitive_reg_conflict(regs, i + j, vreg);
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}
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ra_set_finalize(regs, NULL);
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thumb_checks(regs, reg32_base, reg64_base);
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}
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TEST_F(ra_test, thumb_contigregs)
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{
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struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true);
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/* reg32low is any of the low 8 registers. */
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struct ra_class *reg32low = ra_alloc_contig_reg_class(regs, 1);
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for (int i = 0; i < 8; i++)
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ra_class_add_reg(reg32low, i);
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/* reg64low is pairs of the low 8 registers (we're ignoring the wraparound thing here) */
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struct ra_class *reg64low = ra_alloc_contig_reg_class(regs, 2);
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for (int i = 0; i < 8; i++)
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ra_class_add_reg(reg64low, i);
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/* reg96 is one of either r[0..2] or r[1..3] */
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struct ra_class *reg96 = ra_alloc_contig_reg_class(regs, 3);
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for (int i = 0; i < 2; i++)
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ra_class_add_reg(reg96, i);
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ra_set_finalize(regs, NULL);
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thumb_checks(regs, 0, 0);
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}
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TEST_F(ra_test, nonintersect_contigregs)
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{
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struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true);
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struct ra_class *low = ra_alloc_contig_reg_class(regs, 1);
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for (int i = 0; i < 8; i++)
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ra_class_add_reg(low, i);
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struct ra_class *high = ra_alloc_contig_reg_class(regs, 1);
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for (int i = 8; i < 16; i++)
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ra_class_add_reg(high, i);
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ra_set_finalize(regs, NULL);
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ASSERT_EQ(low->q[low->index], 1);
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ASSERT_EQ(low->q[high->index], 0);
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ASSERT_EQ(high->q[low->index], 0);
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ASSERT_EQ(high->q[high->index], 1);
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}
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TEST_F(ra_test, aligned_contigregs)
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{
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int base_regs = 32;
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struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, base_regs, true);
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struct ra_class *c1 = ra_alloc_contig_reg_class(regs, 1);
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for (int i = 0; i < base_regs; i++)
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ra_class_add_reg(c1, i);
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struct ra_class *c2 = ra_alloc_contig_reg_class(regs, 2);
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for (int i = 8; i < base_regs; i += 2)
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ra_class_add_reg(c2, i);
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struct ra_class *c4 = ra_alloc_contig_reg_class(regs, 4);
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for (int i = 8; i < base_regs; i += 4)
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ra_class_add_reg(c4, i);
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ra_set_finalize(regs, NULL);
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ASSERT_EQ(c1->q[c1->index], 1);
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ASSERT_EQ(c1->q[c2->index], 2);
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ASSERT_EQ(c1->q[c4->index], 4);
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ASSERT_EQ(c2->q[c1->index], 1);
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ASSERT_EQ(c2->q[c2->index], 1);
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ASSERT_EQ(c2->q[c4->index], 2);
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ASSERT_EQ(c4->q[c1->index], 1);
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ASSERT_EQ(c4->q[c2->index], 1);
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ASSERT_EQ(c4->q[c4->index], 1);
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/* Check conflicts for a c4 allocation at i against other classes. */
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for (int i = 0; i < base_regs / 4; i += 4) {
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for (int j = 0; j < base_regs; j++) {
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ASSERT_EQ(ra_class_allocations_conflict(c4, i, c1, j),
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j >= i && j < i + 4);
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}
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for (int j = 0; j < base_regs; j += 2) {
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ASSERT_EQ(ra_class_allocations_conflict(c4, i, c2, j),
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j >= i && j < i + 4);
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}
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}
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}
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