861 lines
29 KiB
C
861 lines
29 KiB
C
/*
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* Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
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* Copyright 2010 Marek Olšák <maraeo@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#include "compiler/nir/nir.h"
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#include "util/format/u_format.h"
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#include "util/format/u_format_s3tc.h"
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#include "util/u_screen.h"
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#include "util/u_memory.h"
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#include "util/os_time.h"
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#include "vl/vl_decoder.h"
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#include "vl/vl_video_buffer.h"
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#include "r300_context.h"
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#include "r300_texture.h"
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#include "r300_screen_buffer.h"
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#include "r300_state_inlines.h"
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#include "r300_public.h"
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#include "draw/draw_context.h"
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/* Return the identifier behind whom the brave coders responsible for this
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* amalgamation of code, sweat, and duct tape, routinely obscure their names.
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*
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* ...I should have just put "Corbin Simpson", but I'm not that cool.
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*
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* (Or egotistical. Yet.) */
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static const char* r300_get_vendor(struct pipe_screen* pscreen)
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{
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return "X.Org R300 Project";
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}
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static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
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{
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return "ATI";
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}
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static const char* chip_families[] = {
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"unknown",
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"ATI R300",
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"ATI R350",
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"ATI RV350",
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"ATI RV370",
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"ATI RV380",
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"ATI RS400",
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"ATI RC410",
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"ATI RS480",
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"ATI R420",
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"ATI R423",
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"ATI R430",
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"ATI R480",
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"ATI R481",
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"ATI RV410",
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"ATI RS600",
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"ATI RS690",
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"ATI RS740",
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"ATI RV515",
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"ATI R520",
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"ATI RV530",
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"ATI R580",
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"ATI RV560",
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"ATI RV570"
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};
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static const char* r300_get_family_name(struct r300_screen* r300screen)
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{
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return chip_families[r300screen->caps.family];
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}
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static const char* r300_get_name(struct pipe_screen* pscreen)
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{
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struct r300_screen* r300screen = r300_screen(pscreen);
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return r300_get_family_name(r300screen);
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}
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static void r300_disk_cache_create(struct r300_screen* r300screen)
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{
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struct mesa_sha1 ctx;
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unsigned char sha1[20];
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char cache_id[20 * 2 + 1];
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_mesa_sha1_init(&ctx);
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if (!disk_cache_get_function_identifier(r300_disk_cache_create,
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&ctx))
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return;
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_mesa_sha1_final(&ctx, sha1);
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disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
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r300screen->disk_shader_cache =
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disk_cache_create(r300_get_family_name(r300screen),
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cache_id,
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r300screen->debug);
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}
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static struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)
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{
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struct r300_screen* r300screen = r300_screen(pscreen);
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return r300screen->disk_shader_cache;
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}
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static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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{
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struct r300_screen* r300screen = r300_screen(pscreen);
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boolean is_r500 = r300screen->caps.is_r500;
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switch (param) {
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/* Supported features (boolean caps). */
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case PIPE_CAP_NPOT_TEXTURES:
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case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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case PIPE_CAP_ANISOTROPIC_FILTER:
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case PIPE_CAP_POINT_SPRITE:
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case PIPE_CAP_OCCLUSION_QUERY:
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
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case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
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case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
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case PIPE_CAP_CONDITIONAL_RENDER:
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case PIPE_CAP_TEXTURE_BARRIER:
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case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
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case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
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case PIPE_CAP_LEGACY_MATH_RULES:
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return 1;
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case PIPE_CAP_TEXTURE_TRANSFER_MODES:
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return PIPE_TEXTURE_TRANSFER_BLIT;
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case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
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return R300_BUFFER_ALIGNMENT;
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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return 16;
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
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return 120;
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/* r300 cannot do swizzling of compressed textures. Supported otherwise. */
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case PIPE_CAP_TEXTURE_SWIZZLE:
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return r300screen->caps.dxtc_swizzle;
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/* We don't support color clamping on r500, so that we can use color
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* interpolators for generic varyings. */
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case PIPE_CAP_VERTEX_COLOR_CLAMPED:
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return !is_r500;
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/* Supported on r500 only. */
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case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
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case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
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case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
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case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
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return is_r500 ? 1 : 0;
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case PIPE_CAP_SHAREABLE_SHADERS:
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return 0;
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case PIPE_CAP_MAX_GS_INVOCATIONS:
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return 32;
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case PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT:
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return 1 << 27;
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/* SWTCL-only features. */
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case PIPE_CAP_PRIMITIVE_RESTART:
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case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
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case PIPE_CAP_USER_VERTEX_BUFFERS:
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case PIPE_CAP_VS_WINDOW_SPACE_POSITION:
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return !r300screen->caps.has_tcl;
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/* HWTCL-only features / limitations. */
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case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
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case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
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case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
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return r300screen->caps.has_tcl;
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/* Texturing. */
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case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
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return is_r500 ? 4096 : 2048;
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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/* 13 == 4096, 12 == 2048 */
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return is_r500 ? 13 : 12;
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/* Render targets. */
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return 4;
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case PIPE_CAP_ENDIANNESS:
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return PIPE_ENDIAN_LITTLE;
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case PIPE_CAP_MAX_VIEWPORTS:
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return 1;
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case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
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return 2048;
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case PIPE_CAP_MAX_VARYINGS:
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return 10;
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case PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF:
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return 0;
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case PIPE_CAP_VENDOR_ID:
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return 0x1002;
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case PIPE_CAP_DEVICE_ID:
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return r300screen->info.pci_id;
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case PIPE_CAP_ACCELERATED:
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return 1;
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case PIPE_CAP_VIDEO_MEMORY:
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return r300screen->info.vram_size_kb >> 10;
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case PIPE_CAP_UMA:
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return 0;
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case PIPE_CAP_PCI_GROUP:
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return r300screen->info.pci_domain;
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case PIPE_CAP_PCI_BUS:
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return r300screen->info.pci_bus;
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case PIPE_CAP_PCI_DEVICE:
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return r300screen->info.pci_dev;
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case PIPE_CAP_PCI_FUNCTION:
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return r300screen->info.pci_func;
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default:
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return u_pipe_screen_get_param_defaults(pscreen, param);
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}
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}
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static int r300_get_shader_param(struct pipe_screen *pscreen,
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enum pipe_shader_type shader,
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enum pipe_shader_cap param)
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{
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struct r300_screen* r300screen = r300_screen(pscreen);
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boolean is_r400 = r300screen->caps.is_r400;
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boolean is_r500 = r300screen->caps.is_r500;
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switch (param) {
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case PIPE_SHADER_CAP_PREFERRED_IR:
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return (r300screen->debug & DBG_USE_TGSI) ? PIPE_SHADER_IR_TGSI : PIPE_SHADER_IR_NIR;
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case PIPE_SHADER_CAP_SUPPORTED_IRS:
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return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
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default:
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break;
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}
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switch (shader) {
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case PIPE_SHADER_FRAGMENT:
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switch (param)
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{
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case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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return is_r500 || is_r400 ? 512 : 96;
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case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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return is_r500 || is_r400 ? 512 : 64;
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case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
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return is_r500 || is_r400 ? 512 : 32;
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case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
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return is_r500 ? 511 : 4;
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case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
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return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
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/* Fragment shader limits. */
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case PIPE_SHADER_CAP_MAX_INPUTS:
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/* 2 colors + 8 texcoords are always supported
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* (minus fog and wpos).
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*
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* R500 has the ability to turn 3rd and 4th color into
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* additional texcoords but there is no two-sided color
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* selection then. However the facing bit can be used instead. */
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return 10;
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case PIPE_SHADER_CAP_MAX_OUTPUTS:
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return 4;
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case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
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return (is_r500 ? 256 : 32) * sizeof(float[4]);
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case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
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case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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return 1;
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case PIPE_SHADER_CAP_MAX_TEMPS:
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return is_r500 ? 128 : is_r400 ? 64 : 32;
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case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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return r300screen->caps.num_tex_units;
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case PIPE_SHADER_CAP_CONT_SUPPORTED:
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case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
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case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
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case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
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case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
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case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
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case PIPE_SHADER_CAP_SUBROUTINES:
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case PIPE_SHADER_CAP_INTEGERS:
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case PIPE_SHADER_CAP_INT64_ATOMICS:
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case PIPE_SHADER_CAP_FP16:
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case PIPE_SHADER_CAP_FP16_DERIVATIVES:
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case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
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case PIPE_SHADER_CAP_INT16:
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case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
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case PIPE_SHADER_CAP_DROUND_SUPPORTED:
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case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED:
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case PIPE_SHADER_CAP_LDEXP_SUPPORTED:
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case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
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return 0;
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default:
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break;
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}
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break;
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case PIPE_SHADER_VERTEX:
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switch (param)
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{
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case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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case PIPE_SHADER_CAP_SUBROUTINES:
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return 0;
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default:;
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}
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if (!r300screen->caps.has_tcl) {
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switch (param) {
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case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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return 0;
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/* mesa/st requires that this cap is the same across stages, and the FS
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* can't do ints.
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*/
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case PIPE_SHADER_CAP_INTEGERS:
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return 0;
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/* Even if gallivm NIR can do this, we call nir_to_tgsi manually and
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* TGSI can't.
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*/
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case PIPE_SHADER_CAP_INT16:
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case PIPE_SHADER_CAP_FP16:
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case PIPE_SHADER_CAP_FP16_DERIVATIVES:
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case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
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return 0;
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/* While draw could normally handle this for the VS, the NIR lowering
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* to regs can't handle our non-native-integers, so we have to lower to
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* if ladders.
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*/
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case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
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return 0;
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default:
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return draw_get_shader_param(shader, param);
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}
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}
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switch (param)
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{
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case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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return is_r500 ? 1024 : 256;
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case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
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return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
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case PIPE_SHADER_CAP_MAX_INPUTS:
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return 16;
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case PIPE_SHADER_CAP_MAX_OUTPUTS:
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return 10;
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case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
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return 256 * sizeof(float[4]);
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case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
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return 1;
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case PIPE_SHADER_CAP_MAX_TEMPS:
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return 32;
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case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
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case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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return 1;
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case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
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case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
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case PIPE_SHADER_CAP_CONT_SUPPORTED:
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case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
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case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
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case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
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case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
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case PIPE_SHADER_CAP_SUBROUTINES:
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case PIPE_SHADER_CAP_INTEGERS:
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case PIPE_SHADER_CAP_FP16:
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case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
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case PIPE_SHADER_CAP_FP16_DERIVATIVES:
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case PIPE_SHADER_CAP_INT16:
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case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
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case PIPE_SHADER_CAP_INT64_ATOMICS:
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case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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case PIPE_SHADER_CAP_DROUND_SUPPORTED:
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case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED:
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case PIPE_SHADER_CAP_LDEXP_SUPPORTED:
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case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
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return 0;
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default:
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break;
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}
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break;
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default:
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; /* nothing */
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}
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return 0;
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}
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static float r300_get_paramf(struct pipe_screen* pscreen,
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enum pipe_capf param)
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{
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struct r300_screen* r300screen = r300_screen(pscreen);
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switch (param) {
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case PIPE_CAPF_MIN_LINE_WIDTH:
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case PIPE_CAPF_MIN_LINE_WIDTH_AA:
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case PIPE_CAPF_MIN_POINT_SIZE:
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case PIPE_CAPF_MIN_POINT_SIZE_AA:
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return 1;
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case PIPE_CAPF_POINT_SIZE_GRANULARITY:
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case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
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return 0.1;
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case PIPE_CAPF_MAX_LINE_WIDTH:
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case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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case PIPE_CAPF_MAX_POINT_SIZE:
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case PIPE_CAPF_MAX_POINT_SIZE_AA:
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/* The maximum dimensions of the colorbuffer are our practical
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* rendering limits. 2048 pixels should be enough for anybody. */
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if (r300screen->caps.is_r500) {
|
|
return 4096.0f;
|
|
} else if (r300screen->caps.is_r400) {
|
|
return 4021.0f;
|
|
} else {
|
|
return 2560.0f;
|
|
}
|
|
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
|
|
return 16.0f;
|
|
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
|
|
return 16.0f;
|
|
case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
|
|
case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
|
|
case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
|
|
return 0.0f;
|
|
default:
|
|
debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
|
|
param);
|
|
return 0.0f;
|
|
}
|
|
}
|
|
|
|
static int r300_get_video_param(struct pipe_screen *screen,
|
|
enum pipe_video_profile profile,
|
|
enum pipe_video_entrypoint entrypoint,
|
|
enum pipe_video_cap param)
|
|
{
|
|
switch (param) {
|
|
case PIPE_VIDEO_CAP_SUPPORTED:
|
|
return vl_profile_supported(screen, profile, entrypoint);
|
|
case PIPE_VIDEO_CAP_NPOT_TEXTURES:
|
|
return 0;
|
|
case PIPE_VIDEO_CAP_MAX_WIDTH:
|
|
case PIPE_VIDEO_CAP_MAX_HEIGHT:
|
|
return vl_video_buffer_max_size(screen);
|
|
case PIPE_VIDEO_CAP_PREFERED_FORMAT:
|
|
return PIPE_FORMAT_NV12;
|
|
case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
|
|
return false;
|
|
case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
|
|
return false;
|
|
case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
|
|
return true;
|
|
case PIPE_VIDEO_CAP_MAX_LEVEL:
|
|
return vl_level_supported(screen, profile);
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
#define COMMON_NIR_OPTIONS \
|
|
.fdot_replicates = true, \
|
|
.fuse_ffma32 = true, \
|
|
.fuse_ffma64 = true, \
|
|
.lower_bitops = true, \
|
|
.lower_extract_byte = true, \
|
|
.lower_extract_word = true, \
|
|
.lower_fdiv = true, \
|
|
.lower_fdph = true, \
|
|
.lower_flrp32 = true, \
|
|
.lower_flrp64 = true, \
|
|
.lower_fmod = true, \
|
|
.lower_fround_even = true, \
|
|
.lower_insert_byte = true, \
|
|
.lower_insert_word = true, \
|
|
.lower_rotate = true, \
|
|
.lower_uniforms_to_ubo = true, \
|
|
.lower_vector_cmp = true, \
|
|
.no_integers = true, \
|
|
.use_interpolated_input_intrinsics = true
|
|
|
|
static const nir_shader_compiler_options r500_vs_compiler_options = {
|
|
COMMON_NIR_OPTIONS,
|
|
|
|
/* Have HW loops support and 1024 max instr count, but don't unroll *too*
|
|
* hard.
|
|
*/
|
|
.max_unroll_iterations = 32,
|
|
};
|
|
|
|
static const nir_shader_compiler_options r500_fs_compiler_options = {
|
|
COMMON_NIR_OPTIONS,
|
|
.lower_fpow = true, /* POW is only in the VS */
|
|
|
|
/* Have HW loops support and 512 max instr count, but don't unroll *too*
|
|
* hard.
|
|
*/
|
|
.max_unroll_iterations = 32,
|
|
};
|
|
|
|
static const nir_shader_compiler_options r300_vs_compiler_options = {
|
|
COMMON_NIR_OPTIONS,
|
|
.lower_fsat = true, /* No fsat in pre-r500 VS */
|
|
.lower_sincos = true,
|
|
|
|
/* Note: has HW loops support, but only 256 ALU instructions. */
|
|
.max_unroll_iterations = 32,
|
|
};
|
|
|
|
static const nir_shader_compiler_options r300_fs_compiler_options = {
|
|
COMMON_NIR_OPTIONS,
|
|
.lower_fpow = true, /* POW is only in the VS */
|
|
.lower_sincos = true,
|
|
|
|
/* No HW loops support, so set it equal to ALU instr max */
|
|
.max_unroll_iterations = 64,
|
|
};
|
|
|
|
static const void *
|
|
r300_get_compiler_options(struct pipe_screen *pscreen,
|
|
enum pipe_shader_ir ir,
|
|
enum pipe_shader_type shader)
|
|
{
|
|
struct r300_screen* r300screen = r300_screen(pscreen);
|
|
|
|
assert(ir == PIPE_SHADER_IR_NIR);
|
|
|
|
if (r300screen->caps.is_r500) {
|
|
if (shader == PIPE_SHADER_VERTEX)
|
|
return &r500_vs_compiler_options;
|
|
else
|
|
return &r500_fs_compiler_options;
|
|
} else {
|
|
if (shader == PIPE_SHADER_VERTEX)
|
|
return &r300_vs_compiler_options;
|
|
else
|
|
return &r300_fs_compiler_options;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Whether the format matches:
|
|
* PIPE_FORMAT_?10?10?10?2_UNORM
|
|
*/
|
|
static inline boolean
|
|
util_format_is_rgba1010102_variant(const struct util_format_description *desc)
|
|
{
|
|
static const unsigned size[4] = {10, 10, 10, 2};
|
|
unsigned chan;
|
|
|
|
if (desc->block.width != 1 ||
|
|
desc->block.height != 1 ||
|
|
desc->block.bits != 32)
|
|
return FALSE;
|
|
|
|
for (chan = 0; chan < 4; ++chan) {
|
|
if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
|
|
desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
|
|
return FALSE;
|
|
if (desc->channel[chan].size != size[chan])
|
|
return FALSE;
|
|
}
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
static bool r300_is_blending_supported(struct r300_screen *rscreen,
|
|
enum pipe_format format)
|
|
{
|
|
int c;
|
|
const struct util_format_description *desc =
|
|
util_format_description(format);
|
|
|
|
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
|
|
return false;
|
|
|
|
c = util_format_get_first_non_void_channel(format);
|
|
|
|
/* RGBA16F */
|
|
if (rscreen->caps.is_r500 &&
|
|
desc->nr_channels == 4 &&
|
|
desc->channel[c].size == 16 &&
|
|
desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
|
|
return true;
|
|
|
|
if (desc->channel[c].normalized &&
|
|
desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
|
|
desc->channel[c].size >= 4 &&
|
|
desc->channel[c].size <= 10) {
|
|
/* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
|
|
if (desc->nr_channels >= 3)
|
|
return true;
|
|
|
|
if (format == PIPE_FORMAT_R8G8_UNORM)
|
|
return true;
|
|
|
|
/* R8, I8, L8, A8 */
|
|
if (desc->nr_channels == 1)
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static bool r300_is_format_supported(struct pipe_screen* screen,
|
|
enum pipe_format format,
|
|
enum pipe_texture_target target,
|
|
unsigned sample_count,
|
|
unsigned storage_sample_count,
|
|
unsigned usage)
|
|
{
|
|
uint32_t retval = 0;
|
|
boolean is_r500 = r300_screen(screen)->caps.is_r500;
|
|
boolean is_r400 = r300_screen(screen)->caps.is_r400;
|
|
boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
|
|
format == PIPE_FORMAT_R10G10B10X2_SNORM ||
|
|
format == PIPE_FORMAT_B10G10R10A2_UNORM ||
|
|
format == PIPE_FORMAT_B10G10R10X2_UNORM ||
|
|
format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
|
|
boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
|
|
format == PIPE_FORMAT_RGTC1_SNORM ||
|
|
format == PIPE_FORMAT_LATC1_UNORM ||
|
|
format == PIPE_FORMAT_LATC1_SNORM;
|
|
boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
|
|
format == PIPE_FORMAT_RGTC2_SNORM ||
|
|
format == PIPE_FORMAT_LATC2_UNORM ||
|
|
format == PIPE_FORMAT_LATC2_SNORM;
|
|
boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
|
|
format == PIPE_FORMAT_R16G16_FLOAT ||
|
|
format == PIPE_FORMAT_R16G16B16_FLOAT ||
|
|
format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
|
|
format == PIPE_FORMAT_R16G16B16X16_FLOAT;
|
|
const struct util_format_description *desc;
|
|
|
|
if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
|
|
return false;
|
|
|
|
/* Check multisampling support. */
|
|
switch (sample_count) {
|
|
case 0:
|
|
case 1:
|
|
break;
|
|
case 2:
|
|
case 4:
|
|
case 6:
|
|
/* No texturing and scanout. */
|
|
if (usage & (PIPE_BIND_SAMPLER_VIEW |
|
|
PIPE_BIND_DISPLAY_TARGET |
|
|
PIPE_BIND_SCANOUT)) {
|
|
return false;
|
|
}
|
|
|
|
desc = util_format_description(format);
|
|
|
|
if (is_r500) {
|
|
/* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
|
|
if (!util_format_is_depth_or_stencil(format) &&
|
|
!util_format_is_rgba8_variant(desc) &&
|
|
!util_format_is_rgba1010102_variant(desc) &&
|
|
format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
|
|
format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
|
|
return false;
|
|
}
|
|
} else {
|
|
/* Only allow depth/stencil, RGBA8. */
|
|
if (!util_format_is_depth_or_stencil(format) &&
|
|
!util_format_is_rgba8_variant(desc)) {
|
|
return false;
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
return false;
|
|
}
|
|
|
|
/* Check sampler format support. */
|
|
if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
|
|
/* these two are broken for an unknown reason */
|
|
format != PIPE_FORMAT_R8G8B8X8_SNORM &&
|
|
format != PIPE_FORMAT_R16G16B16X16_SNORM &&
|
|
/* ATI1N is r5xx-only. */
|
|
(is_r500 || !is_ati1n) &&
|
|
/* ATI2N is supported on r4xx-r5xx. */
|
|
(is_r400 || is_r500 || !is_ati2n) &&
|
|
r300_is_sampler_format_supported(format)) {
|
|
retval |= PIPE_BIND_SAMPLER_VIEW;
|
|
}
|
|
|
|
/* Check colorbuffer format support. */
|
|
if ((usage & (PIPE_BIND_RENDER_TARGET |
|
|
PIPE_BIND_DISPLAY_TARGET |
|
|
PIPE_BIND_SCANOUT |
|
|
PIPE_BIND_SHARED |
|
|
PIPE_BIND_BLENDABLE)) &&
|
|
/* 2101010 cannot be rendered to on non-r5xx. */
|
|
(!is_color2101010 || is_r500) &&
|
|
r300_is_colorbuffer_format_supported(format)) {
|
|
retval |= usage &
|
|
(PIPE_BIND_RENDER_TARGET |
|
|
PIPE_BIND_DISPLAY_TARGET |
|
|
PIPE_BIND_SCANOUT |
|
|
PIPE_BIND_SHARED);
|
|
|
|
if (r300_is_blending_supported(r300_screen(screen), format)) {
|
|
retval |= usage & PIPE_BIND_BLENDABLE;
|
|
}
|
|
}
|
|
|
|
/* Check depth-stencil format support. */
|
|
if (usage & PIPE_BIND_DEPTH_STENCIL &&
|
|
r300_is_zs_format_supported(format)) {
|
|
retval |= PIPE_BIND_DEPTH_STENCIL;
|
|
}
|
|
|
|
/* Check vertex buffer format support. */
|
|
if (usage & PIPE_BIND_VERTEX_BUFFER) {
|
|
if (r300_screen(screen)->caps.has_tcl) {
|
|
/* Half float is supported on >= R400. */
|
|
if ((is_r400 || is_r500 || !is_half_float) &&
|
|
r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
|
|
retval |= PIPE_BIND_VERTEX_BUFFER;
|
|
}
|
|
} else {
|
|
/* SW TCL */
|
|
if (!util_format_is_pure_integer(format)) {
|
|
retval |= PIPE_BIND_VERTEX_BUFFER;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (usage & PIPE_BIND_INDEX_BUFFER) {
|
|
if (format == PIPE_FORMAT_R8_UINT ||
|
|
format == PIPE_FORMAT_R16_UINT ||
|
|
format == PIPE_FORMAT_R32_UINT)
|
|
retval |= PIPE_BIND_INDEX_BUFFER;
|
|
}
|
|
|
|
return retval == usage;
|
|
}
|
|
|
|
static void r300_destroy_screen(struct pipe_screen* pscreen)
|
|
{
|
|
struct r300_screen* r300screen = r300_screen(pscreen);
|
|
struct radeon_winsys *rws = radeon_winsys(pscreen);
|
|
|
|
if (rws && !rws->unref(rws))
|
|
return;
|
|
|
|
mtx_destroy(&r300screen->cmask_mutex);
|
|
slab_destroy_parent(&r300screen->pool_transfers);
|
|
|
|
disk_cache_destroy(r300screen->disk_shader_cache);
|
|
|
|
if (rws)
|
|
rws->destroy(rws);
|
|
|
|
FREE(r300screen);
|
|
}
|
|
|
|
static void r300_fence_reference(struct pipe_screen *screen,
|
|
struct pipe_fence_handle **ptr,
|
|
struct pipe_fence_handle *fence)
|
|
{
|
|
struct radeon_winsys *rws = r300_screen(screen)->rws;
|
|
|
|
rws->fence_reference(ptr, fence);
|
|
}
|
|
|
|
static bool r300_fence_finish(struct pipe_screen *screen,
|
|
struct pipe_context *ctx,
|
|
struct pipe_fence_handle *fence,
|
|
uint64_t timeout)
|
|
{
|
|
struct radeon_winsys *rws = r300_screen(screen)->rws;
|
|
|
|
return rws->fence_wait(rws, fence, timeout);
|
|
}
|
|
|
|
struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
|
|
const struct pipe_screen_config *config)
|
|
{
|
|
struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
|
|
|
|
if (!r300screen) {
|
|
FREE(r300screen);
|
|
return NULL;
|
|
}
|
|
|
|
rws->query_info(rws, &r300screen->info, false, false);
|
|
|
|
r300_init_debug(r300screen);
|
|
r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
|
|
|
|
if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
|
|
r300screen->caps.zmask_ram = 0;
|
|
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
|
|
r300screen->caps.hiz_ram = 0;
|
|
if (SCREEN_DBG_ON(r300screen, DBG_NO_TCL))
|
|
r300screen->caps.has_tcl = FALSE;
|
|
|
|
r300screen->rws = rws;
|
|
r300screen->screen.destroy = r300_destroy_screen;
|
|
r300screen->screen.get_name = r300_get_name;
|
|
r300screen->screen.get_vendor = r300_get_vendor;
|
|
r300screen->screen.get_compiler_options = r300_get_compiler_options;
|
|
r300screen->screen.get_device_vendor = r300_get_device_vendor;
|
|
r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
|
|
r300screen->screen.get_param = r300_get_param;
|
|
r300screen->screen.get_shader_param = r300_get_shader_param;
|
|
r300screen->screen.get_paramf = r300_get_paramf;
|
|
r300screen->screen.get_video_param = r300_get_video_param;
|
|
r300screen->screen.is_format_supported = r300_is_format_supported;
|
|
r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
|
|
r300screen->screen.context_create = r300_create_context;
|
|
r300screen->screen.fence_reference = r300_fence_reference;
|
|
r300screen->screen.fence_finish = r300_fence_finish;
|
|
|
|
r300_init_screen_resource_functions(r300screen);
|
|
|
|
r300_disk_cache_create(r300screen);
|
|
|
|
slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
|
|
|
|
(void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
|
|
|
|
return &r300screen->screen;
|
|
}
|