mesa/src/intel
Lionel Landwerlin 0be9cac742 anv: limit clflush usage
Discrete platforms don't have LLC, but on those, we mmap our buffers
with WC. So we shouldn't need to clflush there.

Anv already had a boolean field on the physical device to know whether
we need to use clflush(), based off the memory heaps available. So use
that instead.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15780>
2022-05-02 12:07:01 +00:00
..
blorp blorp: disable depth bounds 2022-04-06 19:00:50 +00:00
ci ci/iris: Enable SKQP on Tiger Lake boards 2022-04-27 12:35:13 +00:00
common intel: fix URB programming for GT1s 2022-04-17 21:24:17 +00:00
compiler nir/lower_tex: Make the adding a 0 LOD to nir_op_tex in the VS optional. 2022-04-28 21:26:08 +00:00
dev intel/dev: Compute pixel pipe information based on geometry topology DRM query. 2022-04-30 00:00:58 +00:00
ds intel/ds: fix compilation with perfetto 2022-02-08 12:29:21 +00:00
genxml intel/genxml: Add SAMPLER_MODE bits for enabling Small PL on Icelake 2022-04-11 19:17:07 +00:00
isl isl,iris: Add DG2 CCS modifier support for XeHP 2022-04-28 20:02:14 +00:00
nullhw-layer vulkan: drop empty vulkan_wsi_args 2022-04-27 11:51:26 +00:00
perf intel/perf: Fix OA report accumulation on Gfx12+. 2022-04-12 00:11:47 +00:00
tools Use proper types for meson objects 2022-04-18 13:03:08 +03:00
vulkan anv: limit clflush usage 2022-05-02 12:07:01 +00:00
Makefile.perf.am intel: Rename GEN_PERF prefix to INTEL_PERF in build files 2021-04-20 20:06:34 +00:00
meson.build anv: add perfetto source 2022-01-14 20:17:44 +00:00