76 lines
3.1 KiB
C
76 lines
3.1 KiB
C
/*
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* Copyright (C) 2021 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "pan_ir.h"
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#include "compiler/nir/nir_builder.h"
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/* Sample positions are supplied in a packed 8:8 fixed-point vec2 format in GPU
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* memory indexed by the sample. We lower in NIR to take advantage of possible
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* ALU optimizations at the end. This is convenient for Bifrost, since the
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* sample positions are passed in this format and it saves the driver from any
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* system value handling. For Midgard, it's a bit suboptimal (fp16 positions
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* could be supplied directly), but this lets us unify the implementation, and
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* it's a pretty trivial difference */
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static bool
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pan_lower_sample_pos_impl(struct nir_builder *b,
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nir_instr *instr, UNUSED void *data)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return false;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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if (intr->intrinsic != nir_intrinsic_load_sample_pos)
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return false;
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b->cursor = nir_before_instr(instr);
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/* Elements are 4 bytes */
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nir_ssa_def *addr = nir_iadd(b,
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nir_load_sample_positions_pan(b),
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nir_u2u64(b, nir_imul_imm(b, nir_load_sample_id(b), 4)));
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/* Decode 8:8 fixed-point */
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nir_ssa_def *raw = nir_load_global(b, addr, 2, 2, 16);
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nir_ssa_def *decoded = nir_fmul_imm(b, nir_i2f16(b, raw), 1.0 / 256.0);
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/* Make NIR validator happy */
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if (decoded->bit_size != nir_dest_bit_size(intr->dest))
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decoded = nir_f2fN(b, decoded, nir_dest_bit_size(intr->dest));
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, decoded);
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return true;
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}
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bool
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pan_lower_sample_pos(nir_shader *shader)
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{
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if (shader->info.stage != MESA_SHADER_FRAGMENT)
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return false;
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return nir_shader_instructions_pass(shader,
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pan_lower_sample_pos_impl,
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nir_metadata_block_index | nir_metadata_dominance,
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NULL);
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}
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