182 lines
6.8 KiB
C
182 lines
6.8 KiB
C
/*
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* Copyright © 2020 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <string.h>
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#include <inttypes.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <xf86drm.h>
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#include "intel_device_info.h"
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#include "intel_hwconfig.h"
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static int
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error(char *fmt, ...)
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{
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va_list ap;
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va_start(ap, fmt);
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vfprintf(stderr, fmt, ap);
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va_end(ap);
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return EXIT_FAILURE;
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}
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static void
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print_regions_info(const struct intel_device_info *devinfo)
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{
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if (devinfo->mem.sram.mappable.size > 0 ||
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devinfo->mem.sram.unmappable.size > 0) {
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fprintf(stdout, " sram:\n");
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if (devinfo->mem.use_class_instance) {
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fprintf(stdout, " class: %d; instance: %d\n",
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devinfo->mem.sram.mem_class, devinfo->mem.sram.mem_instance);
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}
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fprintf(stdout, " mappable: %" PRId64 "; ",
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devinfo->mem.sram.mappable.size);
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fprintf(stdout, "free: %" PRId64 "\n",
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devinfo->mem.sram.mappable.free);
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if (devinfo->mem.sram.unmappable.size > 0) {
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fprintf(stdout, " unmappable: %" PRId64 "; ",
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devinfo->mem.sram.unmappable.size);
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fprintf(stdout, "free: %" PRId64 "\n",
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devinfo->mem.sram.unmappable.free);
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}
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}
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if (devinfo->mem.vram.mappable.size > 0 ||
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devinfo->mem.vram.unmappable.size > 0) {
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fprintf(stdout, " vram:\n");
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if (devinfo->mem.use_class_instance) {
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fprintf(stdout, " class: %d; instance: %d\n",
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devinfo->mem.vram.mem_class, devinfo->mem.vram.mem_instance);
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}
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fprintf(stdout, " mappable: %" PRId64 "; ",
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devinfo->mem.vram.mappable.size);
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fprintf(stdout, "free: %" PRId64 "\n",
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devinfo->mem.vram.mappable.free);
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if (devinfo->mem.vram.unmappable.size > 0) {
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fprintf(stdout, " unmappable: %" PRId64 "; ",
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devinfo->mem.vram.unmappable.size);
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fprintf(stdout, "free: %" PRId64 "\n",
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devinfo->mem.vram.unmappable.free);
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}
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}
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}
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int
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main(int argc, char *argv[])
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{
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drmDevicePtr devices[8];
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int max_devices;
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bool print_hwconfig = argc > 1 && strcmp(argv[1], "--hwconfig") == 0;
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max_devices = drmGetDevices2(0, devices, ARRAY_SIZE(devices));
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if (max_devices < 1)
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return error("Not device found");
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for (int i = 0; i < max_devices; i++) {
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struct intel_device_info devinfo;
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const char *path = devices[i]->nodes[DRM_NODE_RENDER];
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int fd = open(path, O_RDWR | O_CLOEXEC);
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if (fd < 0)
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continue;
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if (print_hwconfig) {
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intel_get_and_print_hwconfig_table(fd);
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}
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bool success = intel_get_device_info_from_fd(fd, &devinfo);
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close(fd);
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if (!success)
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continue;
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fprintf(stdout, "devinfo struct size = %zu\n", sizeof(devinfo));
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fprintf(stdout, "%s:\n", path);
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fprintf(stdout, " name: %s\n", devinfo.name);
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fprintf(stdout, " gen: %u\n", devinfo.ver);
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fprintf(stdout, " PCI device id: 0x%x\n", devinfo.pci_device_id);
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fprintf(stdout, " PCI domain: 0x%x\n", devinfo.pci_domain);
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fprintf(stdout, " PCI bus: 0x%x\n", devinfo.pci_bus);
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fprintf(stdout, " PCI dev: 0x%x\n", devinfo.pci_dev);
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fprintf(stdout, " PCI function: 0x%x\n", devinfo.pci_func);
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fprintf(stdout, " PCI revision id: 0x%x\n", devinfo.pci_revision_id);
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fprintf(stdout, " revision: %u\n", devinfo.revision);
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const char *subslice_name = devinfo.ver >= 12 ? "dualsubslice" : "subslice";
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uint32_t n_s = 0, n_ss = 0, n_eus = 0;
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for (unsigned s = 0; s < devinfo.max_slices; s++) {
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n_s += (devinfo.slice_masks & (1u << s)) ? 1 : 0;
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for (unsigned ss = 0; ss < devinfo.max_subslices_per_slice; ss++) {
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fprintf(stdout, " slice%u.%s%u: ", s, subslice_name, ss);
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if (intel_device_info_subslice_available(&devinfo, s, ss)) {
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n_ss++;
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for (unsigned eu = 0; eu < devinfo.max_eus_per_subslice; eu++) {
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n_eus += intel_device_info_eu_available(&devinfo, s, ss, eu) ? 1 : 0;
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fprintf(stdout, "%s", intel_device_info_eu_available(&devinfo, s, ss, eu) ? "1" : "0");
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}
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} else {
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fprintf(stdout, "fused");
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}
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fprintf(stdout, "\n");
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}
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}
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for (uint32_t pp = 0; pp < ARRAY_SIZE(devinfo.ppipe_subslices); pp++) {
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fprintf(stdout, " pixel pipe %02u: %u\n",
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pp, devinfo.ppipe_subslices[pp]);
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}
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fprintf(stdout, " slices: %u\n", n_s);
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fprintf(stdout, " %s: %u\n", subslice_name, n_ss);
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fprintf(stdout, " EUs: %u\n", n_eus);
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fprintf(stdout, " EU threads: %u\n", n_eus * devinfo.num_thread_per_eu);
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fprintf(stdout, " LLC: %u\n", devinfo.has_llc);
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fprintf(stdout, " threads per EU: %u\n", devinfo.num_thread_per_eu);
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fprintf(stdout, " URB size: %u\n", devinfo.urb.size);
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fprintf(stdout, " L3 banks: %u\n", devinfo.l3_banks);
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fprintf(stdout, " max VS threads: %u\n", devinfo.max_vs_threads);
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fprintf(stdout, " max TCS threads: %u\n", devinfo.max_tcs_threads);
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fprintf(stdout, " max TES threads: %u\n", devinfo.max_tes_threads);
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fprintf(stdout, " max GS threads: %u\n", devinfo.max_gs_threads);
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fprintf(stdout, " max WM threads: %u\n", devinfo.max_wm_threads);
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fprintf(stdout, " max CS threads: %u\n", devinfo.max_cs_threads);
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fprintf(stdout, " timestamp frequency: %" PRIu64 " / %.4f ns\n",
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devinfo.timestamp_frequency, 1000000000.0 / devinfo.timestamp_frequency);
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print_regions_info(&devinfo);
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}
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return EXIT_SUCCESS;
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}
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