254 lines
6.8 KiB
C++
254 lines
6.8 KiB
C++
/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <gtest/gtest.h>
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#include "brw_vec4.h"
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#include "program/program.h"
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using namespace brw;
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#define register_coalesce(v) _register_coalesce(v, __func__)
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class register_coalesce_vec4_test : public ::testing::Test {
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virtual void SetUp();
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virtual void TearDown();
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public:
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struct brw_compiler *compiler;
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struct intel_device_info *devinfo;
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void *ctx;
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struct gl_shader_program *shader_prog;
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struct brw_vue_prog_data *prog_data;
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vec4_visitor *v;
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};
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class register_coalesce_vec4_visitor : public vec4_visitor
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{
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public:
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register_coalesce_vec4_visitor(struct brw_compiler *compiler,
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void *mem_ctx,
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nir_shader *shader,
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struct brw_vue_prog_data *prog_data)
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: vec4_visitor(compiler, NULL, NULL, prog_data, shader, mem_ctx,
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false /* no_spills */, false)
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{
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prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
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}
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protected:
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virtual dst_reg *make_reg_for_system_value(int /* location */)
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{
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unreachable("Not reached");
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}
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virtual void setup_payload()
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{
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unreachable("Not reached");
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}
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virtual void emit_prolog()
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{
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unreachable("Not reached");
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}
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virtual void emit_thread_end()
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{
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unreachable("Not reached");
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}
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virtual void emit_urb_write_header(int /* mrf */)
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{
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unreachable("Not reached");
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}
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virtual vec4_instruction *emit_urb_write_opcode(bool /* complete */)
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{
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unreachable("Not reached");
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}
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};
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void register_coalesce_vec4_test::SetUp()
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{
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ctx = ralloc_context(NULL);
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compiler = rzalloc(ctx, struct brw_compiler);
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devinfo = rzalloc(ctx, struct intel_device_info);
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compiler->devinfo = devinfo;
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prog_data = ralloc(ctx, struct brw_vue_prog_data);
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nir_shader *shader =
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nir_shader_create(ctx, MESA_SHADER_VERTEX, NULL, NULL);
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v = new register_coalesce_vec4_visitor(compiler, ctx, shader, prog_data);
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devinfo->ver = 4;
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devinfo->verx10 = devinfo->ver * 10;
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}
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void register_coalesce_vec4_test::TearDown()
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{
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delete v;
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v = NULL;
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ralloc_free(ctx);
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ctx = NULL;
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}
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static void
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_register_coalesce(vec4_visitor *v, const char *func)
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{
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const bool print = getenv("TEST_DEBUG");
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if (print) {
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printf("%s: instructions before:\n", func);
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v->dump_instructions();
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}
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v->calculate_cfg();
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v->opt_register_coalesce();
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if (print) {
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printf("%s: instructions after:\n", func);
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v->dump_instructions();
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}
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}
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TEST_F(register_coalesce_vec4_test, test_compute_to_mrf)
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{
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src_reg something = src_reg(v, glsl_type::float_type);
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dst_reg temp = dst_reg(v, glsl_type::float_type);
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dst_reg init;
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dst_reg m0 = dst_reg(MRF, 0);
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m0.writemask = WRITEMASK_X;
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m0.type = BRW_REGISTER_TYPE_F;
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vec4_instruction *mul = v->emit(v->MUL(temp, something, brw_imm_f(1.0f)));
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v->emit(v->MOV(m0, src_reg(temp)));
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register_coalesce(v);
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EXPECT_EQ(mul->dst.file, MRF);
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}
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TEST_F(register_coalesce_vec4_test, test_multiple_use)
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{
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src_reg something = src_reg(v, glsl_type::float_type);
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dst_reg temp = dst_reg(v, glsl_type::vec4_type);
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dst_reg init;
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dst_reg m0 = dst_reg(MRF, 0);
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m0.writemask = WRITEMASK_X;
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m0.type = BRW_REGISTER_TYPE_F;
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dst_reg m1 = dst_reg(MRF, 1);
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m1.writemask = WRITEMASK_XYZW;
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m1.type = BRW_REGISTER_TYPE_F;
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src_reg src = src_reg(temp);
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vec4_instruction *mul = v->emit(v->MUL(temp, something, brw_imm_f(1.0f)));
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src.swizzle = BRW_SWIZZLE_XXXX;
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v->emit(v->MOV(m0, src));
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src.swizzle = BRW_SWIZZLE_XYZW;
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v->emit(v->MOV(m1, src));
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register_coalesce(v);
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EXPECT_NE(mul->dst.file, MRF);
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}
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TEST_F(register_coalesce_vec4_test, test_dp4_mrf)
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{
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src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
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src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
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dst_reg init;
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dst_reg m0 = dst_reg(MRF, 0);
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m0.writemask = WRITEMASK_Y;
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m0.type = BRW_REGISTER_TYPE_F;
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dst_reg temp = dst_reg(v, glsl_type::float_type);
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vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
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v->emit(v->MOV(m0, src_reg(temp)));
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register_coalesce(v);
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EXPECT_EQ(dp4->dst.file, MRF);
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EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
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}
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TEST_F(register_coalesce_vec4_test, test_dp4_grf)
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{
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src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
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src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
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dst_reg init;
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dst_reg to = dst_reg(v, glsl_type::vec4_type);
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dst_reg temp = dst_reg(v, glsl_type::float_type);
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vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
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to.writemask = WRITEMASK_Y;
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v->emit(v->MOV(to, src_reg(temp)));
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/* if we don't do something with the result, the automatic dead code
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* elimination will remove all our instructions.
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*/
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src_reg src = src_reg(to);
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src.negate = true;
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v->emit(v->MOV(dst_reg(MRF, 0), src));
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register_coalesce(v);
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EXPECT_EQ(dp4->dst.nr, to.nr);
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EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
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}
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TEST_F(register_coalesce_vec4_test, test_channel_mul_grf)
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{
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src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
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src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
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dst_reg init;
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dst_reg to = dst_reg(v, glsl_type::vec4_type);
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dst_reg temp = dst_reg(v, glsl_type::float_type);
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vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
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to.writemask = WRITEMASK_Y;
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v->emit(v->MOV(to, src_reg(temp)));
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/* if we don't do something with the result, the automatic dead code
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* elimination will remove all our instructions.
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*/
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src_reg src = src_reg(to);
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src.negate = true;
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v->emit(v->MOV(dst_reg(MRF, 0), src));
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register_coalesce(v);
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EXPECT_EQ(mul->dst.nr, to.nr);
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}
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