144 lines
4.2 KiB
C++
144 lines
4.2 KiB
C++
/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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#ifndef BRW_VEC4_LIVE_VARIABLES_H
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#define BRW_VEC4_LIVE_VARIABLES_H
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#include "brw_ir_vec4.h"
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#include "brw_ir_analysis.h"
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#include "util/bitset.h"
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struct backend_shader;
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namespace brw {
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class vec4_live_variables {
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public:
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struct block_data {
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/**
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* Which variables are defined before being used in the block.
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*
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* Note that for our purposes, "defined" means unconditionally, completely
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* defined.
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*/
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BITSET_WORD *def;
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/**
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* Which variables are used before being defined in the block.
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*/
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BITSET_WORD *use;
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/** Which defs reach the entry point of the block. */
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BITSET_WORD *livein;
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/** Which defs reach the exit point of the block. */
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BITSET_WORD *liveout;
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BITSET_WORD flag_def[1];
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BITSET_WORD flag_use[1];
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BITSET_WORD flag_livein[1];
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BITSET_WORD flag_liveout[1];
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};
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vec4_live_variables(const backend_shader *s);
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~vec4_live_variables();
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bool
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validate(const backend_shader *s) const;
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analysis_dependency_class
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dependency_class() const
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{
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return (DEPENDENCY_INSTRUCTION_IDENTITY |
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DEPENDENCY_INSTRUCTION_DATA_FLOW |
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DEPENDENCY_VARIABLES);
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}
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int num_vars;
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int bitset_words;
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const struct intel_device_info *devinfo;
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/** Per-basic-block information on live variables */
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struct block_data *block_data;
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/** @{
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* Final computed live ranges for each variable.
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*/
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int *start;
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int *end;
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/** @} */
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int var_range_start(unsigned v, unsigned n) const;
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int var_range_end(unsigned v, unsigned n) const;
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bool vgrfs_interfere(int a, int b) const;
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protected:
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void setup_def_use();
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void compute_live_variables();
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void compute_start_end();
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const simple_allocator &alloc;
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cfg_t *cfg;
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void *mem_ctx;
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};
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/* Returns the variable index for the k-th dword of the c-th component of
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* register reg.
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*/
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inline unsigned
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var_from_reg(const simple_allocator &alloc, const src_reg ®,
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unsigned c = 0, unsigned k = 0)
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{
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assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
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const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
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unsigned result =
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8 * alloc.offsets[reg.nr] + reg.offset / 4 +
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(BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize;
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/* Do not exceed the limit for this register */
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assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
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return result;
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}
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inline unsigned
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var_from_reg(const simple_allocator &alloc, const dst_reg ®,
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unsigned c = 0, unsigned k = 0)
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{
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assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
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const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
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unsigned result =
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8 * alloc.offsets[reg.nr] + reg.offset / 4 +
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(c + k / csize * 4) * csize + k % csize;
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/* Do not exceed the limit for this register */
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assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
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return result;
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}
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} /* namespace brw */
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#endif /* BRW_VEC4_LIVE_VARIABLES_H */
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