165 lines
5.4 KiB
C
165 lines
5.4 KiB
C
/*
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* Copyright © 2020 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "intel_gem.h"
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#include "drm-uapi/i915_drm.h"
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bool
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intel_gem_supports_syncobj_wait(int fd)
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{
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int ret;
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struct drm_syncobj_create create = {
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.flags = 0,
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};
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ret = intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_CREATE, &create);
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if (ret)
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return false;
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uint32_t syncobj = create.handle;
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struct drm_syncobj_wait wait = {
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.handles = (uint64_t)(uintptr_t)&create,
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.count_handles = 1,
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.timeout_nsec = 0,
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.flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT,
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};
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ret = intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_WAIT, &wait);
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struct drm_syncobj_destroy destroy = {
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.handle = syncobj,
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};
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intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_DESTROY, &destroy);
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/* If it timed out, then we have the ioctl and it supports the
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* DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT flag.
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*/
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return ret == -1 && errno == ETIME;
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}
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int
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intel_gem_count_engines(const struct drm_i915_query_engine_info *info,
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enum drm_i915_gem_engine_class engine_class)
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{
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assert(info != NULL);
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int count = 0;
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for (int i = 0; i < info->num_engines; i++) {
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if (info->engines[i].engine.engine_class == engine_class)
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count++;
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}
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return count;
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}
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int
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intel_gem_create_context_engines(int fd,
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const struct drm_i915_query_engine_info *info,
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int num_engines, uint16_t *engine_classes)
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{
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assert(info != NULL);
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const size_t engine_inst_sz = 2 * sizeof(__u16); /* 1 class, 1 instance */
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const size_t engines_param_size =
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sizeof(__u64) /* extensions */ + num_engines * engine_inst_sz;
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void *engines_param = malloc(engines_param_size);
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assert(engines_param);
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*(__u64*)engines_param = 0;
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__u16 *class_inst_ptr = (__u16*)(((__u64*)engines_param) + 1);
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/* For each type of drm_i915_gem_engine_class of interest, we keep track of
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* the previous engine instance used.
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*/
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int last_engine_idx[] = {
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[I915_ENGINE_CLASS_RENDER] = -1,
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[I915_ENGINE_CLASS_COPY] = -1,
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[I915_ENGINE_CLASS_COMPUTE] = -1,
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};
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int i915_engine_counts[] = {
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[I915_ENGINE_CLASS_RENDER] =
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intel_gem_count_engines(info, I915_ENGINE_CLASS_RENDER),
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[I915_ENGINE_CLASS_COPY] =
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intel_gem_count_engines(info, I915_ENGINE_CLASS_COPY),
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[I915_ENGINE_CLASS_COMPUTE] =
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intel_gem_count_engines(info, I915_ENGINE_CLASS_COMPUTE),
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};
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/* For each queue, we look for the next instance that matches the class we
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* need.
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*/
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for (int i = 0; i < num_engines; i++) {
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uint16_t engine_class = engine_classes[i];
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assert(engine_class == I915_ENGINE_CLASS_RENDER ||
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engine_class == I915_ENGINE_CLASS_COPY ||
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engine_class == I915_ENGINE_CLASS_COMPUTE);
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if (i915_engine_counts[engine_class] <= 0) {
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free(engines_param);
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return -1;
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}
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/* Run through the engines reported by the kernel looking for the next
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* matching instance. We loop in case we want to create multiple
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* contexts on an engine instance.
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*/
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int engine_instance = -1;
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for (int i = 0; i < info->num_engines; i++) {
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int *idx = &last_engine_idx[engine_class];
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if (++(*idx) >= info->num_engines)
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*idx = 0;
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if (info->engines[*idx].engine.engine_class == engine_class) {
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engine_instance = info->engines[*idx].engine.engine_instance;
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break;
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}
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}
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if (engine_instance < 0) {
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free(engines_param);
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return -1;
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}
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*class_inst_ptr++ = engine_class;
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*class_inst_ptr++ = engine_instance;
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}
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assert((uintptr_t)engines_param + engines_param_size ==
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(uintptr_t)class_inst_ptr);
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struct drm_i915_gem_context_create_ext_setparam set_engines = {
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.base = {
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.name = I915_CONTEXT_CREATE_EXT_SETPARAM,
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},
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.param = {
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.param = I915_CONTEXT_PARAM_ENGINES,
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.value = (uintptr_t)engines_param,
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.size = engines_param_size,
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}
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};
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struct drm_i915_gem_context_create_ext create = {
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.flags = I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS,
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.extensions = (uintptr_t)&set_engines,
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};
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int ret = intel_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE_EXT, &create);
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free(engines_param);
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if (ret == -1)
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return -1;
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return create.ctx_id;
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}
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