468 lines
13 KiB
C
468 lines
13 KiB
C
/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef BLORP_PRIV_H
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#define BLORP_PRIV_H
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#include <stdint.h>
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#include "common/intel_measure.h"
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#include "compiler/nir/nir.h"
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#include "compiler/brw_compiler.h"
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#include "blorp.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Binding table indices used by BLORP.
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*/
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enum {
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BLORP_RENDERBUFFER_BT_INDEX,
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BLORP_TEXTURE_BT_INDEX,
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BLORP_NUM_BT_ENTRIES
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};
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#define BLORP_SAMPLER_INDEX 0
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struct brw_blorp_surface_info
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{
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bool enabled;
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struct isl_surf surf;
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struct blorp_address addr;
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struct isl_surf aux_surf;
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struct blorp_address aux_addr;
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enum isl_aux_usage aux_usage;
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union isl_color_value clear_color;
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struct blorp_address clear_color_addr;
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struct isl_view view;
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/* Z offset into a 3-D texture or slice of a 2-D array texture. */
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float z_offset;
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uint32_t tile_x_sa, tile_y_sa;
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};
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void
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brw_blorp_surface_info_init(struct blorp_batch *batch,
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struct brw_blorp_surface_info *info,
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const struct blorp_surf *surf,
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unsigned int level, float layer,
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enum isl_format format, bool is_dest);
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void
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blorp_surf_convert_to_single_slice(const struct isl_device *isl_dev,
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struct brw_blorp_surface_info *info);
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void
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surf_fake_rgb_with_red(const struct isl_device *isl_dev,
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struct brw_blorp_surface_info *info);
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void
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blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
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struct brw_blorp_surface_info *info,
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uint32_t *x, uint32_t *y,
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uint32_t *width, uint32_t *height);
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void
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blorp_surf_fake_interleaved_msaa(const struct isl_device *isl_dev,
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struct brw_blorp_surface_info *info);
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void
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blorp_surf_retile_w_to_y(const struct isl_device *isl_dev,
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struct brw_blorp_surface_info *info);
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struct brw_blorp_coord_transform
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{
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float multiplier;
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float offset;
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};
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/**
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* Bounding rectangle telling pixel discard which pixels are to be touched.
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* This is needed in when surfaces are configured as something else what they
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* really are:
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*
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* - writing W-tiled stencil as Y-tiled
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* - writing interleaved multisampled as single sampled.
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*
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* See blorp_check_in_bounds().
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*/
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struct brw_blorp_bounds_rect
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{
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uint32_t x0;
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uint32_t x1;
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uint32_t y0;
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uint32_t y1;
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};
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/**
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* Grid needed for blended and scaled blits of integer formats, see
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* blorp_nir_manual_blend_bilinear().
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*/
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struct brw_blorp_rect_grid
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{
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float x1;
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float y1;
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float pad[2];
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};
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struct blorp_surf_offset {
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uint32_t x;
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uint32_t y;
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};
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struct brw_blorp_wm_inputs
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{
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uint32_t clear_color[4];
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struct brw_blorp_bounds_rect bounds_rect;
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struct brw_blorp_rect_grid rect_grid;
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struct brw_blorp_coord_transform coord_transform[2];
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struct blorp_surf_offset src_offset;
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struct blorp_surf_offset dst_offset;
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/* (1/width, 1/height) for the source surface */
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float src_inv_size[2];
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/* Minimum layer setting works for all the textures types but texture_3d
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* for which the setting has no effect. Use the z-coordinate instead.
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*/
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float src_z;
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/* Note: Pad out to an integral number of registers when extending, but
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* make sure subgroup_id is the last 32-bit item.
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*/
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/* uint32_t pad[?]; */
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uint32_t subgroup_id;
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};
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static inline nir_variable *
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blorp_create_nir_input(struct nir_shader *nir,
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const char *name,
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const struct glsl_type *type,
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unsigned int offset)
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{
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nir_variable *input;
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if (nir->info.stage == MESA_SHADER_COMPUTE) {
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input = nir_variable_create(nir, nir_var_uniform, type, name);
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input->data.driver_location = offset;
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input->data.location = offset;
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} else {
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input = nir_variable_create(nir, nir_var_shader_in, type, name);
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input->data.location = VARYING_SLOT_VAR0 + offset / (4 * sizeof(float));
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input->data.location_frac = (offset / sizeof(float)) % 4;
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}
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if (nir->info.stage == MESA_SHADER_FRAGMENT)
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input->data.interpolation = INTERP_MODE_FLAT;
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return input;
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}
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#define BLORP_CREATE_NIR_INPUT(shader, name, type) \
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blorp_create_nir_input((shader), #name, (type), \
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offsetof(struct brw_blorp_wm_inputs, name))
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struct blorp_vs_inputs {
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uint32_t base_layer;
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uint32_t _instance_id; /* Set in hardware by SGVS */
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uint32_t pad[2];
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};
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static inline unsigned
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brw_blorp_get_urb_length(const struct brw_wm_prog_data *prog_data)
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{
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if (prog_data == NULL)
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return 1;
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/* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
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*
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* read_length = ceiling((max_source_attr+1)/2)
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*/
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return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
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}
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enum blorp_shader_type {
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BLORP_SHADER_TYPE_COPY,
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BLORP_SHADER_TYPE_BLIT,
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BLORP_SHADER_TYPE_CLEAR,
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BLORP_SHADER_TYPE_MCS_PARTIAL_RESOLVE,
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BLORP_SHADER_TYPE_LAYER_OFFSET_VS,
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BLORP_SHADER_TYPE_GFX4_SF,
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};
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enum blorp_shader_pipeline {
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BLORP_SHADER_PIPELINE_RENDER,
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BLORP_SHADER_PIPELINE_COMPUTE,
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};
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struct blorp_params
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{
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uint32_t x0;
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uint32_t y0;
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uint32_t x1;
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uint32_t y1;
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float z;
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uint8_t stencil_mask;
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uint8_t stencil_ref;
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struct brw_blorp_surface_info depth;
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struct brw_blorp_surface_info stencil;
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uint32_t depth_format;
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struct brw_blorp_surface_info src;
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struct brw_blorp_surface_info dst;
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enum isl_aux_op hiz_op;
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bool full_surface_hiz_op;
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enum isl_aux_op fast_clear_op;
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uint8_t color_write_disable;
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struct brw_blorp_wm_inputs wm_inputs;
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struct blorp_vs_inputs vs_inputs;
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bool dst_clear_color_as_input;
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unsigned num_samples;
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unsigned num_draw_buffers;
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unsigned num_layers;
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uint32_t vs_prog_kernel;
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struct brw_vs_prog_data *vs_prog_data;
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uint32_t sf_prog_kernel;
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struct brw_sf_prog_data *sf_prog_data;
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uint32_t wm_prog_kernel;
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struct brw_wm_prog_data *wm_prog_data;
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uint32_t cs_prog_kernel;
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struct brw_cs_prog_data *cs_prog_data;
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bool use_pre_baked_binding_table;
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uint32_t pre_baked_binding_table_offset;
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enum blorp_shader_type shader_type;
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enum blorp_shader_pipeline shader_pipeline;
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enum intel_measure_snapshot_type snapshot_type;
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};
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void blorp_params_init(struct blorp_params *params);
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struct brw_blorp_base_key
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{
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char name[8];
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enum blorp_shader_type shader_type;
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enum blorp_shader_pipeline shader_pipeline;
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};
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#define BRW_BLORP_BASE_KEY_INIT(_type) \
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(struct brw_blorp_base_key) { \
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.name = "blorp", \
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.shader_type = _type, \
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.shader_pipeline = BLORP_SHADER_PIPELINE_RENDER, \
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}
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struct brw_blorp_blit_prog_key
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{
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struct brw_blorp_base_key base;
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/* Number of samples per pixel that have been configured in the surface
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* state for texturing from.
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*/
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unsigned tex_samples;
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/* MSAA layout that has been configured in the surface state for texturing
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* from.
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*/
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enum isl_msaa_layout tex_layout;
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enum isl_aux_usage tex_aux_usage;
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/* Actual number of samples per pixel in the source image. */
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unsigned src_samples;
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/* Actual MSAA layout used by the source image. */
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enum isl_msaa_layout src_layout;
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/* The swizzle to apply to the source in the shader */
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struct isl_swizzle src_swizzle;
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/* The format of the source if format-specific workarounds are needed
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* and 0 (ISL_FORMAT_R32G32B32A32_FLOAT) if the destination is natively
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* renderable.
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*/
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enum isl_format src_format;
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/* True if the source requires normalized coordinates */
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bool src_coords_normalized;
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/* Number of samples per pixel that have been configured in the render
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* target.
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*/
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unsigned rt_samples;
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/* MSAA layout that has been configured in the render target. */
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enum isl_msaa_layout rt_layout;
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/* Actual number of samples per pixel in the destination image. */
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unsigned dst_samples;
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/* Actual MSAA layout used by the destination image. */
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enum isl_msaa_layout dst_layout;
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/* The swizzle to apply to the destination in the shader */
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struct isl_swizzle dst_swizzle;
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/* The format of the destination if format-specific workarounds are needed
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* and 0 (ISL_FORMAT_R32G32B32A32_FLOAT) if the destination is natively
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* renderable.
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*/
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enum isl_format dst_format;
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/* Whether or not the format workarounds are a bitcast operation */
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bool format_bit_cast;
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/** True if we need to perform SINT -> UINT clamping. */
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bool sint32_to_uint;
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/** True if we need to perform UINT -> SINT clamping. */
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bool uint32_to_sint;
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/* Type of the data to be read from the texture (one of
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* nir_type_(int|uint|float)).
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*/
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nir_alu_type texture_data_type;
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/* True if the source image is W tiled. If true, the surface state for the
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* source image must be configured as Y tiled, and tex_samples must be 0.
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*/
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bool src_tiled_w;
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/* True if the destination image is W tiled. If true, the surface state
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* for the render target must be configured as Y tiled, and rt_samples must
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* be 0.
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*/
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bool dst_tiled_w;
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/* True if the destination is an RGB format. If true, the surface state
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* for the render target must be configured as red with three times the
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* normal width. We need to do this because you cannot render to
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* non-power-of-two formats.
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*/
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bool dst_rgb;
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isl_surf_usage_flags_t dst_usage;
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enum blorp_filter filter;
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/* True if the rectangle being sent through the rendering pipeline might be
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* larger than the destination rectangle, so the WM program should kill any
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* pixels that are outside the destination rectangle.
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*/
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bool use_kill;
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/**
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* True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
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* than one sample per pixel.
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*/
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bool persample_msaa_dispatch;
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/* True if this blit operation may involve intratile offsets on the source.
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* In this case, we need to add the offset before texturing.
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*/
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bool need_src_offset;
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/* True if this blit operation may involve intratile offsets on the
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* destination. In this case, we need to add the offset to gl_FragCoord.
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*/
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bool need_dst_offset;
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/* Scale factors between the pixel grid and the grid of samples. We're
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* using grid of samples for bilinear filetring in multisample scaled blits.
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*/
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float x_scale;
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float y_scale;
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/* If a compute shader is used, this is the local size y dimension.
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*/
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uint8_t local_y;
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};
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/**
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* \name BLORP internals
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* \{
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*
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* Used internally by gfx6_blorp_exec() and gfx7_blorp_exec().
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*/
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void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
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void brw_blorp_init_cs_prog_key(struct brw_cs_prog_key *cs_key);
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const char *blorp_shader_type_to_name(enum blorp_shader_type type);
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const char *blorp_shader_pipeline_to_name(enum blorp_shader_pipeline pipe);
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const unsigned *
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blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
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struct nir_shader *nir,
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struct brw_wm_prog_key *wm_key,
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bool use_repclear,
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struct brw_wm_prog_data *wm_prog_data);
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const unsigned *
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blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
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struct nir_shader *nir,
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struct brw_vs_prog_data *vs_prog_data);
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bool
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blorp_ensure_sf_program(struct blorp_batch *batch,
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struct blorp_params *params);
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static inline uint8_t
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blorp_get_cs_local_y(struct blorp_params *params)
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{
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uint32_t height = params->y1 - params->y0;
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uint32_t or_ys = params->y0 | params->y1;
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if (height > 32 || (or_ys & 3) == 0) {
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return 4;
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} else if ((or_ys & 1) == 0) {
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return 2;
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} else {
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return 1;
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}
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}
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static inline void
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blorp_set_cs_dims(struct nir_shader *nir, uint8_t local_y)
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{
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assert(local_y != 0 && (16 % local_y == 0));
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nir->info.workgroup_size[0] = 16 / local_y;
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nir->info.workgroup_size[1] = local_y;
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nir->info.workgroup_size[2] = 1;
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}
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const unsigned *
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blorp_compile_cs(struct blorp_context *blorp, void *mem_ctx,
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struct nir_shader *nir,
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struct brw_cs_prog_key *cs_key,
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struct brw_cs_prog_data *cs_prog_data);
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/** \} */
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif /* __cplusplus */
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#endif /* BLORP_PRIV_H */
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