121 lines
4.1 KiB
C
121 lines
4.1 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "compiler/nir/nir_builder.h"
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static inline void
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blorp_nir_init_shader(nir_builder *b,
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void *mem_ctx,
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gl_shader_stage stage,
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const char *name)
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{
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*b = nir_builder_init_simple_shader(stage, NULL, "%s", name ? name : "");
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ralloc_steal(mem_ctx, b->shader);
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if (stage == MESA_SHADER_FRAGMENT)
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b->shader->info.fs.origin_upper_left = true;
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}
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static inline nir_ssa_def *
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blorp_nir_txf_ms_mcs(nir_builder *b, nir_ssa_def *xy_pos, nir_ssa_def *layer)
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{
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nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1);
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tex->op = nir_texop_txf_ms_mcs_intel;
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tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
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tex->dest_type = nir_type_int32;
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nir_ssa_def *coord;
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if (layer) {
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tex->is_array = true;
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tex->coord_components = 3;
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coord = nir_vec3(b, nir_channel(b, xy_pos, 0),
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nir_channel(b, xy_pos, 1),
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layer);
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} else {
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tex->is_array = false;
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tex->coord_components = 2;
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coord = nir_channels(b, xy_pos, 0x3);
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}
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tex->src[0].src_type = nir_tex_src_coord;
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tex->src[0].src = nir_src_for_ssa(coord);
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/* Blorp only has one texture and it's bound at unit 0 */
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tex->texture_index = 0;
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tex->sampler_index = 0;
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nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
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nir_builder_instr_insert(b, &tex->instr);
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return &tex->dest.ssa;
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}
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static inline nir_ssa_def *
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blorp_nir_mcs_is_clear_color(nir_builder *b,
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nir_ssa_def *mcs,
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uint32_t samples)
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{
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switch (samples) {
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case 2:
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/* Empirical evidence suggests that the value returned from the
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* sampler is not always 0x3 for clear color so we need to mask it.
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*/
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return nir_ieq_imm(b, nir_iand(b, nir_channel(b, mcs, 0),
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nir_imm_int(b, 0x3)),
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0x3);
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case 4:
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return nir_ieq_imm(b, nir_channel(b, mcs, 0), 0xff);
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case 8:
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return nir_ieq_imm(b, nir_channel(b, mcs, 0), ~0);
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case 16:
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/* For 16x MSAA, the MCS is actually an ivec2 */
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return nir_iand(b, nir_ieq_imm(b, nir_channel(b, mcs, 0), ~0),
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nir_ieq_imm(b, nir_channel(b, mcs, 1), ~0));
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default:
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unreachable("Invalid sample count");
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}
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}
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static inline nir_ssa_def *
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blorp_check_in_bounds(nir_builder *b,
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nir_ssa_def *bounds_rect,
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nir_ssa_def *pos)
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{
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nir_ssa_def *x0 = nir_channel(b, bounds_rect, 0);
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nir_ssa_def *x1 = nir_channel(b, bounds_rect, 1);
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nir_ssa_def *y0 = nir_channel(b, bounds_rect, 2);
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nir_ssa_def *y1 = nir_channel(b, bounds_rect, 3);
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nir_ssa_def *c0 = nir_uge(b, nir_channel(b, pos, 0), x0);
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nir_ssa_def *c1 = nir_ult(b, nir_channel(b, pos, 0), x1);
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nir_ssa_def *c2 = nir_uge(b, nir_channel(b, pos, 1), y0);
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nir_ssa_def *c3 = nir_ult(b, nir_channel(b, pos, 1), y1);
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nir_ssa_def *in_bounds =
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nir_iand(b, nir_iand(b, c0, c1), nir_iand(b, c2, c3));
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return in_bounds;
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}
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