593 lines
20 KiB
C
593 lines
20 KiB
C
/*
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* Copyright © 2022 Imagination Technologies Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "hwdef/rogue_hw_utils.h"
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#include "pvr_bo.h"
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#include "pvr_device_info.h"
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#include "pvr_formats.h"
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#include "pvr_hw_pass.h"
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#include "pvr_pds.h"
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#include "pvr_private.h"
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#include "pvr_usc_fragment_shader.h"
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#include "rogue/rogue.h"
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#include "vk_alloc.h"
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#include "vk_format.h"
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#include "vk_log.h"
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/*****************************************************************************
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PDS pre-baked program generation parameters and variables.
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*****************************************************************************/
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/* These would normally be produced by the compiler or other code. We're using
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* them for now just to speed up things. All of these should eventually be
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* removed.
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*/
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static const struct {
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/* Indicates the amount of temporaries for the shader. */
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uint32_t temp_count;
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enum rogue_msaa_mode msaa_mode;
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/* Indicates the presence of PHAS instruction. */
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bool has_phase_rate_change;
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} pvr_pds_fragment_program_params = {
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.temp_count = 0,
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.msaa_mode = ROGUE_MSAA_MODE_PIXEL,
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.has_phase_rate_change = false,
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};
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static inline bool pvr_subpass_has_msaa_input_attachment(
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struct pvr_render_subpass *subpass,
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const VkRenderPassCreateInfo2 *pCreateInfo)
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{
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for (uint32_t i = 0; i < subpass->input_count; i++) {
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const uint32_t attachment = subpass->input_attachments[i];
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if (pCreateInfo->pAttachments[attachment].samples > 1)
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return true;
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}
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return false;
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}
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static inline size_t
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pvr_num_subpass_attachments(const VkSubpassDescription2 *desc)
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{
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return desc->inputAttachmentCount + desc->colorAttachmentCount +
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(desc->pResolveAttachments ? desc->colorAttachmentCount : 0) +
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(desc->pDepthStencilAttachment != NULL);
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}
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static bool pvr_is_subpass_initops_flush_needed(
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const struct pvr_render_pass *pass,
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const struct pvr_renderpass_hwsetup_render *hw_render)
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{
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struct pvr_render_subpass *subpass = &pass->subpasses[0];
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uint32_t render_loadop_mask = 0;
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uint32_t color_attachment_mask;
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for (uint32_t i = 0; i < hw_render->color_init_count; i++) {
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if (hw_render->color_init[i].op != RENDERPASS_SURFACE_INITOP_NOP)
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render_loadop_mask |= (1 << hw_render->color_init[i].driver_id);
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}
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/* If there are no load ops then there's nothing to flush. */
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if (render_loadop_mask == 0)
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return false;
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/* If the first subpass has any input attachments, they need to be
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* initialized with the result of the load op. Since the input attachment
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* may be read from fragments with an opaque pass type, the load ops must be
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* flushed or else they would be obscured and eliminated by HSR.
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*/
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if (subpass->input_count != 0)
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return true;
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color_attachment_mask = 0;
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for (uint32_t i = 0; i < subpass->color_count; i++) {
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const int32_t color_idx = subpass->color_attachments[i];
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if (color_idx != -1)
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color_attachment_mask |= (1 << pass->attachments[color_idx].index);
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}
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/* If the first subpass does not write to all attachments which have a load
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* op then the load ops need to be flushed to ensure they don't get obscured
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* and removed by HSR.
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*/
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return (render_loadop_mask & color_attachment_mask) != render_loadop_mask;
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}
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static void
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pvr_init_subpass_userpass_spawn(struct pvr_renderpass_hwsetup *hw_setup,
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struct pvr_render_pass *pass,
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struct pvr_render_subpass *subpasses)
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{
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uint32_t subpass_idx = 0;
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for (uint32_t i = 0; i < hw_setup->render_count; i++) {
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struct pvr_renderpass_hwsetup_render *hw_render = &hw_setup->renders[i];
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uint32_t initial_userpass_spawn =
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(uint32_t)pvr_is_subpass_initops_flush_needed(pass, hw_render);
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for (uint32_t j = 0; j < hw_render->subpass_count; j++) {
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subpasses[subpass_idx].userpass_spawn = (j + initial_userpass_spawn);
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subpass_idx++;
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}
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}
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assert(subpass_idx == pass->subpass_count);
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}
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static inline bool pvr_has_output_register_writes(
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const struct pvr_renderpass_hwsetup_render *hw_render)
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{
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for (uint32_t i = 0; i < hw_render->init_setup.render_targets_count; i++) {
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struct usc_mrt_resource *mrt_resource =
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&hw_render->init_setup.mrt_resources[i];
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if (mrt_resource->type == USC_MRT_RESOURCE_TYPE_OUTPUT_REGISTER)
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return true;
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}
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return false;
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}
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VkResult pvr_pds_unitex_state_program_create_and_upload(
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struct pvr_device *device,
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const VkAllocationCallbacks *allocator,
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uint32_t texture_kicks,
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uint32_t uniform_kicks,
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struct pvr_pds_upload *const pds_upload_out)
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{
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struct pvr_pds_pixel_shader_sa_program program = {
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.num_texture_dma_kicks = texture_kicks,
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.num_uniform_dma_kicks = uniform_kicks,
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};
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uint32_t staging_buffer_size;
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uint32_t *staging_buffer;
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VkResult result;
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pvr_pds_set_sizes_pixel_shader_uniform_texture_code(&program);
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staging_buffer_size = program.code_size * sizeof(*staging_buffer);
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staging_buffer = vk_alloc2(&device->vk.alloc,
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allocator,
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staging_buffer_size,
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8U,
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VK_SYSTEM_ALLOCATION_SCOPE_COMMAND);
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if (!staging_buffer)
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return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
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pvr_pds_generate_pixel_shader_sa_code_segment(&program, staging_buffer);
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/* FIXME: Figure out the define for alignment of 16. */
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result = pvr_gpu_upload_pds(device,
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NULL,
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0U,
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0U,
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staging_buffer,
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program.code_size,
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16U,
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16U,
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pds_upload_out);
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if (result != VK_SUCCESS) {
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vk_free2(&device->vk.alloc, allocator, staging_buffer);
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return result;
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}
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vk_free2(&device->vk.alloc, allocator, staging_buffer);
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return VK_SUCCESS;
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}
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static VkResult
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pvr_load_op_create(struct pvr_device *device,
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const VkAllocationCallbacks *allocator,
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struct pvr_renderpass_hwsetup_render *hw_render,
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struct pvr_load_op **const load_op_out)
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{
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const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
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const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
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struct pvr_load_op *load_op;
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VkResult result;
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load_op = vk_zalloc2(&device->vk.alloc,
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allocator,
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sizeof(*load_op),
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8,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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if (!load_op)
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return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
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for (uint32_t i = 0; i < hw_render->color_init_count; i++) {
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struct pvr_renderpass_colorinit *color_init = &hw_render->color_init[i];
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if (color_init->op == RENDERPASS_SURFACE_INITOP_CLEAR)
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load_op->clear_mask |= 1U << i;
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else if (color_init->op == RENDERPASS_SURFACE_INITOP_LOAD)
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pvr_finishme("Missing 'load' load op");
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}
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result = pvr_gpu_upload_usc(device,
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pvr_usc_fragment_shader,
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sizeof(pvr_usc_fragment_shader),
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cache_line_size,
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&load_op->usc_frag_prog_bo);
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if (result != VK_SUCCESS)
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goto err_free_load_op;
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result = pvr_pds_fragment_program_create_and_upload(
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device,
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allocator,
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load_op->usc_frag_prog_bo,
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pvr_pds_fragment_program_params.temp_count,
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pvr_pds_fragment_program_params.msaa_mode,
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pvr_pds_fragment_program_params.has_phase_rate_change,
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&load_op->pds_frag_prog);
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if (result != VK_SUCCESS)
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goto err_free_usc_frag_prog_bo;
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result = pvr_pds_unitex_state_program_create_and_upload(
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device,
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allocator,
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1U,
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0U,
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&load_op->pds_tex_state_prog);
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if (result != VK_SUCCESS)
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goto err_free_pds_frag_prog;
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load_op->is_hw_object = true;
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/* FIXME: These should be based on the USC and PDS programs, but are hard
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* coded for now.
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*/
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load_op->const_shareds_count = 1;
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load_op->shareds_dest_offset = 0;
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load_op->shareds_count = 1;
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load_op->temps_count = 1;
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*load_op_out = load_op;
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return VK_SUCCESS;
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err_free_pds_frag_prog:
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pvr_bo_free(device, load_op->pds_frag_prog.pvr_bo);
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err_free_usc_frag_prog_bo:
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pvr_bo_free(device, load_op->usc_frag_prog_bo);
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err_free_load_op:
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vk_free2(&device->vk.alloc, allocator, load_op);
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return result;
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}
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static void pvr_load_op_destroy(struct pvr_device *device,
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const VkAllocationCallbacks *allocator,
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struct pvr_load_op *load_op)
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{
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pvr_bo_free(device, load_op->pds_tex_state_prog.pvr_bo);
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pvr_bo_free(device, load_op->pds_frag_prog.pvr_bo);
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pvr_bo_free(device, load_op->usc_frag_prog_bo);
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vk_free2(&device->vk.alloc, allocator, load_op);
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}
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#define PVR_SPM_LOAD_IN_BUFFERS_COUNT(dev_info) \
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({ \
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int __ret = 7U; \
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if (PVR_HAS_FEATURE(dev_info, eight_output_registers)) \
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__ret = 3U; \
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__ret; \
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})
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VkResult pvr_CreateRenderPass2(VkDevice _device,
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const VkRenderPassCreateInfo2 *pCreateInfo,
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const VkAllocationCallbacks *pAllocator,
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VkRenderPass *pRenderPass)
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{
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struct pvr_render_pass_attachment *attachments;
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PVR_FROM_HANDLE(pvr_device, device, _device);
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struct pvr_render_subpass *subpasses;
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size_t subpass_attachment_count;
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uint32_t *subpass_attachments;
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struct pvr_render_pass *pass;
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uint32_t *dep_list;
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bool *flush_on_dep;
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VkResult result;
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VK_MULTIALLOC(ma);
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vk_multialloc_add(&ma, &pass, __typeof__(*pass), 1);
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vk_multialloc_add(&ma,
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&attachments,
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__typeof__(*attachments),
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pCreateInfo->attachmentCount);
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vk_multialloc_add(&ma,
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&subpasses,
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__typeof__(*subpasses),
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pCreateInfo->subpassCount);
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subpass_attachment_count = 0;
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for (uint32_t i = 0; i < pCreateInfo->subpassCount; i++) {
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subpass_attachment_count +=
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pvr_num_subpass_attachments(&pCreateInfo->pSubpasses[i]);
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}
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vk_multialloc_add(&ma,
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&subpass_attachments,
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__typeof__(*subpass_attachments),
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subpass_attachment_count);
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vk_multialloc_add(&ma,
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&dep_list,
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__typeof__(*dep_list),
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pCreateInfo->dependencyCount);
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vk_multialloc_add(&ma,
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&flush_on_dep,
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__typeof__(*flush_on_dep),
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pCreateInfo->dependencyCount);
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if (!vk_multialloc_zalloc2(&ma,
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&device->vk.alloc,
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pAllocator,
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VK_SYSTEM_ALLOCATION_SCOPE_OBJECT)) {
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return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
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}
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vk_object_base_init(&device->vk, &pass->base, VK_OBJECT_TYPE_RENDER_PASS);
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pass->attachment_count = pCreateInfo->attachmentCount;
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pass->attachments = attachments;
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pass->subpass_count = pCreateInfo->subpassCount;
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pass->subpasses = subpasses;
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pass->max_sample_count = 1;
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/* Copy attachment descriptions. */
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for (uint32_t i = 0; i < pass->attachment_count; i++) {
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const VkAttachmentDescription2 *desc = &pCreateInfo->pAttachments[i];
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struct pvr_render_pass_attachment *attachment = &pass->attachments[i];
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pvr_assert(!(desc->flags & ~VK_ATTACHMENT_DESCRIPTION_MAY_ALIAS_BIT));
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attachment->load_op = desc->loadOp;
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attachment->store_op = desc->storeOp;
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attachment->has_stencil = vk_format_has_stencil(attachment->vk_format);
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if (attachment->has_stencil) {
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attachment->stencil_load_op = desc->stencilLoadOp;
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attachment->stencil_store_op = desc->stencilStoreOp;
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}
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attachment->vk_format = desc->format;
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attachment->sample_count = desc->samples;
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attachment->initial_layout = desc->initialLayout;
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attachment->is_pbe_downscalable =
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pvr_format_is_pbe_downscalable(attachment->vk_format);
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attachment->index = i;
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if (attachment->sample_count > pass->max_sample_count)
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pass->max_sample_count = attachment->sample_count;
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}
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/* Count how many dependencies each subpass has. */
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for (uint32_t i = 0; i < pCreateInfo->dependencyCount; i++) {
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const VkSubpassDependency2 *dep = &pCreateInfo->pDependencies[i];
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if (dep->srcSubpass != VK_SUBPASS_EXTERNAL &&
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dep->dstSubpass != VK_SUBPASS_EXTERNAL &&
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dep->srcSubpass != dep->dstSubpass) {
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pass->subpasses[dep->dstSubpass].dep_count++;
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}
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}
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/* Assign reference pointers to lists, and fill in the attachments list, we
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* need to re-walk the dependencies array later to fill the per-subpass
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* dependencies lists in.
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*/
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for (uint32_t i = 0; i < pass->subpass_count; i++) {
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const VkSubpassDescription2 *desc = &pCreateInfo->pSubpasses[i];
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struct pvr_render_subpass *subpass = &pass->subpasses[i];
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subpass->pipeline_bind_point = desc->pipelineBindPoint;
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subpass->sample_count = 1;
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subpass->color_count = desc->colorAttachmentCount;
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if (subpass->color_count > 0) {
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bool has_used_color_attachment = false;
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uint32_t index;
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subpass->color_attachments = subpass_attachments;
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subpass_attachments += subpass->color_count;
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for (uint32_t j = 0; j < subpass->color_count; j++) {
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subpass->color_attachments[j] =
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desc->pColorAttachments[j].attachment;
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if (subpass->color_attachments[j] == VK_ATTACHMENT_UNUSED)
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continue;
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index = subpass->color_attachments[j];
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subpass->sample_count = pass->attachments[index].sample_count;
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has_used_color_attachment = true;
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}
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if (!has_used_color_attachment && desc->pDepthStencilAttachment &&
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desc->pDepthStencilAttachment->attachment !=
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VK_ATTACHMENT_UNUSED) {
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index = desc->pDepthStencilAttachment->attachment;
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subpass->sample_count = pass->attachments[index].sample_count;
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}
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}
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if (desc->pResolveAttachments) {
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subpass->resolve_attachments = subpass_attachments;
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subpass_attachments += subpass->color_count;
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for (uint32_t j = 0; j < subpass->color_count; j++) {
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subpass->resolve_attachments[j] =
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desc->pResolveAttachments[j].attachment;
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}
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}
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subpass->input_count = desc->inputAttachmentCount;
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if (subpass->input_count > 0) {
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subpass->input_attachments = subpass_attachments;
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subpass_attachments += subpass->input_count;
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for (uint32_t j = 0; j < subpass->input_count; j++) {
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subpass->input_attachments[j] =
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desc->pInputAttachments[j].attachment;
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}
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}
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if (desc->pDepthStencilAttachment) {
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subpass->depth_stencil_attachment = subpass_attachments++;
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*subpass->depth_stencil_attachment =
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desc->pDepthStencilAttachment->attachment;
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}
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/* Give the dependencies a slice of the subpass_attachments array. */
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subpass->dep_list = dep_list;
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dep_list += subpass->dep_count;
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subpass->flush_on_dep = flush_on_dep;
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flush_on_dep += subpass->dep_count;
|
|
|
|
/* Reset the dependencies count so we can start from 0 and index into
|
|
* the dependencies array.
|
|
*/
|
|
subpass->dep_count = 0;
|
|
subpass->index = i;
|
|
}
|
|
|
|
/* Compute dependencies and populate dep_list and flush_on_dep. */
|
|
for (uint32_t i = 0; i < pCreateInfo->dependencyCount; i++) {
|
|
const VkSubpassDependency2 *dep = &pCreateInfo->pDependencies[i];
|
|
|
|
if (dep->srcSubpass != VK_SUBPASS_EXTERNAL &&
|
|
dep->dstSubpass != VK_SUBPASS_EXTERNAL &&
|
|
dep->srcSubpass != dep->dstSubpass) {
|
|
struct pvr_render_subpass *subpass = &pass->subpasses[dep->dstSubpass];
|
|
|
|
subpass->dep_list[subpass->dep_count] = dep->srcSubpass;
|
|
if (pvr_subpass_has_msaa_input_attachment(subpass, pCreateInfo))
|
|
subpass->flush_on_dep[subpass->dep_count] = true;
|
|
|
|
subpass->dep_count++;
|
|
}
|
|
}
|
|
|
|
pass->max_tilebuffer_count =
|
|
PVR_SPM_LOAD_IN_BUFFERS_COUNT(&device->pdevice->dev_info);
|
|
|
|
pass->hw_setup = pvr_create_renderpass_hwsetup(device, pass, false);
|
|
if (!pass->hw_setup) {
|
|
result = vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
|
|
goto err_free_pass;
|
|
}
|
|
|
|
pvr_init_subpass_userpass_spawn(pass->hw_setup, pass, pass->subpasses);
|
|
|
|
for (uint32_t i = 0; i < pass->hw_setup->render_count; i++) {
|
|
struct pvr_renderpass_hwsetup_render *hw_render =
|
|
&pass->hw_setup->renders[i];
|
|
struct pvr_load_op *load_op = NULL;
|
|
|
|
if (hw_render->tile_buffers_count)
|
|
pvr_finishme("Set up tile buffer table");
|
|
|
|
if (!hw_render->color_init_count) {
|
|
assert(!hw_render->client_data);
|
|
continue;
|
|
}
|
|
|
|
if (!pvr_has_output_register_writes(hw_render))
|
|
pvr_finishme("Add output register write");
|
|
|
|
result = pvr_load_op_create(device, pAllocator, hw_render, &load_op);
|
|
if (result != VK_SUCCESS)
|
|
goto err_load_op_destroy;
|
|
|
|
hw_render->client_data = load_op;
|
|
}
|
|
|
|
*pRenderPass = pvr_render_pass_to_handle(pass);
|
|
|
|
return VK_SUCCESS;
|
|
|
|
err_load_op_destroy:
|
|
for (uint32_t i = 0; i < pass->hw_setup->render_count; i++) {
|
|
struct pvr_renderpass_hwsetup_render *hw_render =
|
|
&pass->hw_setup->renders[i];
|
|
|
|
if (hw_render->client_data)
|
|
pvr_load_op_destroy(device, pAllocator, hw_render->client_data);
|
|
}
|
|
|
|
pvr_destroy_renderpass_hwsetup(device, pass->hw_setup);
|
|
|
|
err_free_pass:
|
|
vk_object_base_finish(&pass->base);
|
|
vk_free2(&device->vk.alloc, pAllocator, pass);
|
|
|
|
return result;
|
|
}
|
|
|
|
void pvr_DestroyRenderPass(VkDevice _device,
|
|
VkRenderPass _pass,
|
|
const VkAllocationCallbacks *pAllocator)
|
|
{
|
|
PVR_FROM_HANDLE(pvr_device, device, _device);
|
|
PVR_FROM_HANDLE(pvr_render_pass, pass, _pass);
|
|
|
|
if (!pass)
|
|
return;
|
|
|
|
for (uint32_t i = 0; i < pass->hw_setup->render_count; i++) {
|
|
struct pvr_renderpass_hwsetup_render *hw_render =
|
|
&pass->hw_setup->renders[i];
|
|
|
|
pvr_load_op_destroy(device, pAllocator, hw_render->client_data);
|
|
}
|
|
|
|
pvr_destroy_renderpass_hwsetup(device, pass->hw_setup);
|
|
vk_object_base_finish(&pass->base);
|
|
vk_free2(&device->vk.alloc, pAllocator, pass);
|
|
}
|
|
|
|
void pvr_GetRenderAreaGranularity(VkDevice _device,
|
|
VkRenderPass renderPass,
|
|
VkExtent2D *pGranularity)
|
|
{
|
|
PVR_FROM_HANDLE(pvr_device, device, _device);
|
|
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
|
|
|
|
/* Granularity does not depend on any settings in the render pass, so return
|
|
* the tile granularity.
|
|
*
|
|
* The default value is based on the minimum value found in all existing
|
|
* cores.
|
|
*/
|
|
pGranularity->width = PVR_GET_FEATURE_VALUE(dev_info, tile_size_x, 16);
|
|
pGranularity->height = PVR_GET_FEATURE_VALUE(dev_info, tile_size_y, 16);
|
|
}
|