121 lines
3.4 KiB
C
121 lines
3.4 KiB
C
/*
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* Copyright © 2021 Google, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef TU_PERFETTO_H_
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#define TU_PERFETTO_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef HAVE_PERFETTO
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/**
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* Render-stage id's
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*/
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enum tu_stage_id {
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SURFACE_STAGE_ID, /* Surface is a sort of meta-stage for render-target info */
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BINNING_STAGE_ID,
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GMEM_STAGE_ID,
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BYPASS_STAGE_ID,
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BLIT_STAGE_ID,
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COMPUTE_STAGE_ID,
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CLEAR_SYSMEM_STAGE_ID,
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CLEAR_GMEM_STAGE_ID,
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GMEM_LOAD_STAGE_ID,
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GMEM_STORE_STAGE_ID,
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SYSMEM_RESOLVE_STAGE_ID,
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// TODO add the rest
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NUM_STAGES
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};
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static const struct {
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const char *name;
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const char *desc;
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} stages[] = {
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[SURFACE_STAGE_ID] = {"Surface"},
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[BINNING_STAGE_ID] = {"Binning", "Perform Visibility pass and determine target bins"},
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[GMEM_STAGE_ID] = {"Render", "Rendering to GMEM"},
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[BYPASS_STAGE_ID] = {"Render", "Rendering to system memory"},
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[BLIT_STAGE_ID] = {"Blit", "Performing a Blit operation"},
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[COMPUTE_STAGE_ID] = {"Compute", "Compute job"},
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[CLEAR_SYSMEM_STAGE_ID] = {"Clear Sysmem", ""},
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[CLEAR_GMEM_STAGE_ID] = {"Clear GMEM", "Per-tile (GMEM) clear"},
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[GMEM_LOAD_STAGE_ID] = {"GMEM Load", "Per tile system memory to GMEM load"},
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[GMEM_STORE_STAGE_ID] = {"GMEM Store", "Per tile GMEM to system memory store"},
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[SYSMEM_RESOLVE_STAGE_ID] = {"SysMem Resolve", "System memory MSAA resolve"},
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// TODO add the rest
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};
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/**
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* Queue-id's
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*/
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enum {
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DEFAULT_HW_QUEUE_ID,
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};
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static const struct {
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const char *name;
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const char *desc;
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} queues[] = {
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[DEFAULT_HW_QUEUE_ID] = {"GPU Queue 0", "Default Adreno Hardware Queue"},
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};
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struct tu_perfetto_state {
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uint64_t start_ts[NUM_STAGES];
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};
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void tu_perfetto_init(void);
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struct tu_device;
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void tu_perfetto_submit(struct tu_device *dev, uint32_t submission_id);
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/* Helpers */
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struct tu_perfetto_state *
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tu_device_get_perfetto_state(struct tu_device *dev);
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int
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tu_device_get_gpu_timestamp(struct tu_device *dev,
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uint64_t *ts);
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int
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tu_device_get_suspend_count(struct tu_device *dev,
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uint64_t *suspend_count);
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uint64_t
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tu_device_ticks_to_ns(struct tu_device *dev, uint64_t ts);
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struct tu_u_trace_submission_data;
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uint32_t
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tu_u_trace_submission_data_get_submit_id(const struct tu_u_trace_submission_data *data);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* TU_PERFETTO_H_ */
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