91 lines
3.2 KiB
XML
91 lines
3.2 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<!--
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Copyright © 2020 Google, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice (including the next
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paragraph) shall be included in all copies or substantial portions of the
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Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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-->
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<!--
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The basic idea is to define a hierarchy of encodings, where various
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ranges of bits can be either:
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* patterns to match to select a sub-encoding (0, 1, x (dontcare))
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* instruction parameters (ie. dst register, type, etc)
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* range of bits that delegates to another hierarchy (ie. src reg
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encoding which has multiple sub-encodings depending on gpr/const/
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relative)
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The root of the encoding hierarchy defines the size. By the concrete
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leaf nodes of an encoding hierarchy all bits should be accounted for
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(ie. either defined fields or as 0/1/x).
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TODO:
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* add optional min/max gen fields for cases where same binary maps
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to different instructions and/or encodings on later gens
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* schema
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-->
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<isa>
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<import file="ir3-common.xml"/>
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<bitset name="#instruction" size="64">
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<doc>
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Encoding of an ir3 instruction. All instructions are 64b.
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</doc>
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<gen min="300"/>
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<encode type="struct ir3_instruction *" case-prefix="OPC_">
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<!--
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Define mapping from encode src to individual fields,
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which are common across all instruction categories
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at the root instruction level
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Not all of these apply to all instructions, but we
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can define mappings here for anything that is used
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in more than one instruction category. For things
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that are specific to a single instruction category,
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mappings should be defined at that level instead.
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-->
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<map name="DST">src->dsts[0]</map>
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<map name="SRC1">src->srcs[0]</map>
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<map name="SRC2">src->srcs[1]</map>
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<map name="SRC3">src->srcs[2]</map>
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<map name="REPEAT">src->repeat</map>
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<map name="SS">!!(src->flags & IR3_INSTR_SS)</map>
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<map name="JP">!!(src->flags & IR3_INSTR_JP)</map>
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<map name="SY">!!(src->flags & IR3_INSTR_SY)</map>
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<map name="UL">!!(src->flags & IR3_INSTR_UL)</map>
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<map name="EQ">0</map> <!-- We don't use this (yet) -->
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<map name="SAT">!!(src->flags & IR3_INSTR_SAT)</map>
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</encode>
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</bitset>
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<import file="ir3-cat0.xml"/>
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<import file="ir3-cat1.xml"/>
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<import file="ir3-cat2.xml"/>
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<import file="ir3-cat3.xml"/>
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<import file="ir3-cat4.xml"/>
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<import file="ir3-cat5.xml"/>
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<import file="ir3-cat6.xml"/>
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<import file="ir3-cat7.xml"/>
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</isa>
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