362 lines
12 KiB
C
362 lines
12 KiB
C
/*
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* Copyright © 2016 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <string.h>
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#include <stdio.h>
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#include "util/ralloc.h"
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#include "broadcom/common/v3d_device_info.h"
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#include "qpu_instr.h"
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#include "qpu_disasm.h"
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struct disasm_state {
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const struct v3d_device_info *devinfo;
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char *string;
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size_t offset;
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};
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static void
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append(struct disasm_state *disasm, const char *fmt, ...)
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{
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va_list args;
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va_start(args, fmt);
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ralloc_vasprintf_rewrite_tail(&disasm->string,
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&disasm->offset,
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fmt, args);
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va_end(args);
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}
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static void
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pad_to(struct disasm_state *disasm, int n)
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{
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/* FIXME: Do a single append somehow. */
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while (disasm->offset < n)
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append(disasm, " ");
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}
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static void
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v3d_qpu_disasm_raddr(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr, uint8_t mux)
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{
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if (mux == V3D_QPU_MUX_A) {
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append(disasm, "rf%d", instr->raddr_a);
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} else if (mux == V3D_QPU_MUX_B) {
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if (instr->sig.small_imm) {
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uint32_t val;
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ASSERTED bool ok =
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v3d_qpu_small_imm_unpack(disasm->devinfo,
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instr->raddr_b,
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&val);
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if ((int)val >= -16 && (int)val <= 15)
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append(disasm, "%d", val);
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else
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append(disasm, "0x%08x", val);
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assert(ok);
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} else {
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append(disasm, "rf%d", instr->raddr_b);
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}
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} else {
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append(disasm, "r%d", mux);
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}
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}
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static void
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v3d_qpu_disasm_waddr(struct disasm_state *disasm, uint32_t waddr, bool magic)
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{
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if (!magic) {
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append(disasm, "rf%d", waddr);
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return;
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}
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const char *name = v3d_qpu_magic_waddr_name(disasm->devinfo, waddr);
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if (name)
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append(disasm, "%s", name);
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else
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append(disasm, "waddr UNKNOWN %d", waddr);
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}
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static void
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v3d_qpu_disasm_add(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr)
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{
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bool has_dst = v3d_qpu_add_op_has_dst(instr->alu.add.op);
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int num_src = v3d_qpu_add_op_num_src(instr->alu.add.op);
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append(disasm, "%s", v3d_qpu_add_op_name(instr->alu.add.op));
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if (!v3d_qpu_sig_writes_address(disasm->devinfo, &instr->sig))
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append(disasm, "%s", v3d_qpu_cond_name(instr->flags.ac));
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append(disasm, "%s", v3d_qpu_pf_name(instr->flags.apf));
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append(disasm, "%s", v3d_qpu_uf_name(instr->flags.auf));
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append(disasm, " ");
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if (has_dst) {
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v3d_qpu_disasm_waddr(disasm, instr->alu.add.waddr,
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instr->alu.add.magic_write);
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append(disasm, v3d_qpu_pack_name(instr->alu.add.output_pack));
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}
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if (num_src >= 1) {
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if (has_dst)
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append(disasm, ", ");
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v3d_qpu_disasm_raddr(disasm, instr, instr->alu.add.a);
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append(disasm, "%s",
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v3d_qpu_unpack_name(instr->alu.add.a_unpack));
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}
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if (num_src >= 2) {
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append(disasm, ", ");
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v3d_qpu_disasm_raddr(disasm, instr, instr->alu.add.b);
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append(disasm, "%s",
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v3d_qpu_unpack_name(instr->alu.add.b_unpack));
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}
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}
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static void
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v3d_qpu_disasm_mul(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr)
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{
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bool has_dst = v3d_qpu_mul_op_has_dst(instr->alu.mul.op);
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int num_src = v3d_qpu_mul_op_num_src(instr->alu.mul.op);
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pad_to(disasm, 30);
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append(disasm, "; ");
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append(disasm, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
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if (!v3d_qpu_sig_writes_address(disasm->devinfo, &instr->sig))
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append(disasm, "%s", v3d_qpu_cond_name(instr->flags.mc));
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append(disasm, "%s", v3d_qpu_pf_name(instr->flags.mpf));
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append(disasm, "%s", v3d_qpu_uf_name(instr->flags.muf));
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if (instr->alu.mul.op == V3D_QPU_M_NOP)
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return;
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append(disasm, " ");
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if (has_dst) {
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v3d_qpu_disasm_waddr(disasm, instr->alu.mul.waddr,
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instr->alu.mul.magic_write);
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append(disasm, v3d_qpu_pack_name(instr->alu.mul.output_pack));
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}
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if (num_src >= 1) {
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if (has_dst)
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append(disasm, ", ");
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v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul.a);
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append(disasm, "%s",
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v3d_qpu_unpack_name(instr->alu.mul.a_unpack));
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}
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if (num_src >= 2) {
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append(disasm, ", ");
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v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul.b);
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append(disasm, "%s",
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v3d_qpu_unpack_name(instr->alu.mul.b_unpack));
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}
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}
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static void
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v3d_qpu_disasm_sig_addr(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr)
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{
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if (disasm->devinfo->ver < 41)
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return;
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if (!instr->sig_magic)
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append(disasm, ".rf%d", instr->sig_addr);
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else {
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const char *name =
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v3d_qpu_magic_waddr_name(disasm->devinfo,
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instr->sig_addr);
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if (name)
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append(disasm, ".%s", name);
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else
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append(disasm, ".UNKNOWN%d", instr->sig_addr);
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}
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}
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static void
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v3d_qpu_disasm_sig(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr)
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{
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const struct v3d_qpu_sig *sig = &instr->sig;
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if (!sig->thrsw &&
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!sig->ldvary &&
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!sig->ldvpm &&
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!sig->ldtmu &&
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!sig->ldtlb &&
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!sig->ldtlbu &&
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!sig->ldunif &&
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!sig->ldunifrf &&
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!sig->ldunifa &&
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!sig->ldunifarf &&
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!sig->wrtmuc) {
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return;
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}
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pad_to(disasm, 60);
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if (sig->thrsw)
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append(disasm, "; thrsw");
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if (sig->ldvary) {
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append(disasm, "; ldvary");
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v3d_qpu_disasm_sig_addr(disasm, instr);
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}
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if (sig->ldvpm)
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append(disasm, "; ldvpm");
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if (sig->ldtmu) {
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append(disasm, "; ldtmu");
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v3d_qpu_disasm_sig_addr(disasm, instr);
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}
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if (sig->ldtlb) {
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append(disasm, "; ldtlb");
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v3d_qpu_disasm_sig_addr(disasm, instr);
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}
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if (sig->ldtlbu) {
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append(disasm, "; ldtlbu");
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v3d_qpu_disasm_sig_addr(disasm, instr);
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}
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if (sig->ldunif)
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append(disasm, "; ldunif");
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if (sig->ldunifrf) {
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append(disasm, "; ldunifrf");
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v3d_qpu_disasm_sig_addr(disasm, instr);
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}
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if (sig->ldunifa)
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append(disasm, "; ldunifa");
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if (sig->ldunifarf) {
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append(disasm, "; ldunifarf");
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v3d_qpu_disasm_sig_addr(disasm, instr);
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}
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if (sig->wrtmuc)
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append(disasm, "; wrtmuc");
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}
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static void
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v3d_qpu_disasm_alu(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr)
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{
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v3d_qpu_disasm_add(disasm, instr);
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v3d_qpu_disasm_mul(disasm, instr);
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v3d_qpu_disasm_sig(disasm, instr);
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}
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static void
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v3d_qpu_disasm_branch(struct disasm_state *disasm,
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const struct v3d_qpu_instr *instr)
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{
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append(disasm, "b");
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if (instr->branch.ub)
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append(disasm, "u");
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append(disasm, "%s", v3d_qpu_branch_cond_name(instr->branch.cond));
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append(disasm, "%s", v3d_qpu_msfign_name(instr->branch.msfign));
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switch (instr->branch.bdi) {
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case V3D_QPU_BRANCH_DEST_ABS:
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append(disasm, " zero_addr+0x%08x", instr->branch.offset);
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break;
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case V3D_QPU_BRANCH_DEST_REL:
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append(disasm, " %d", instr->branch.offset);
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break;
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case V3D_QPU_BRANCH_DEST_LINK_REG:
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append(disasm, " lri");
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break;
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case V3D_QPU_BRANCH_DEST_REGFILE:
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append(disasm, " rf%d", instr->branch.raddr_a);
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break;
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}
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if (instr->branch.ub) {
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switch (instr->branch.bdu) {
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case V3D_QPU_BRANCH_DEST_ABS:
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append(disasm, ", a:unif");
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break;
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case V3D_QPU_BRANCH_DEST_REL:
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append(disasm, ", r:unif");
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break;
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case V3D_QPU_BRANCH_DEST_LINK_REG:
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append(disasm, ", lri");
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break;
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case V3D_QPU_BRANCH_DEST_REGFILE:
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append(disasm, ", rf%d", instr->branch.raddr_a);
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break;
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}
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}
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}
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const char *
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v3d_qpu_decode(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *instr)
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{
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struct disasm_state disasm = {
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.string = rzalloc_size(NULL, 1),
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.offset = 0,
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.devinfo = devinfo,
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};
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switch (instr->type) {
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case V3D_QPU_INSTR_TYPE_ALU:
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v3d_qpu_disasm_alu(&disasm, instr);
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break;
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case V3D_QPU_INSTR_TYPE_BRANCH:
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v3d_qpu_disasm_branch(&disasm, instr);
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break;
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}
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return disasm.string;
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}
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/**
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* Returns a string containing the disassembled representation of the QPU
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* instruction. It is the caller's responsibility to free the return value
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* with ralloc_free().
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*/
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const char *
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v3d_qpu_disasm(const struct v3d_device_info *devinfo, uint64_t inst)
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{
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struct v3d_qpu_instr instr;
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bool ok = v3d_qpu_instr_unpack(devinfo, inst, &instr);
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assert(ok); (void)ok;
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return v3d_qpu_decode(devinfo, &instr);
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}
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void
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v3d_qpu_dump(const struct v3d_device_info *devinfo,
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const struct v3d_qpu_instr *instr)
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{
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const char *decoded = v3d_qpu_decode(devinfo, instr);
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fprintf(stderr, "%s", decoded);
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ralloc_free((char *)decoded);
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}
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