167 lines
7.3 KiB
C++
167 lines
7.3 KiB
C++
/*
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* Copyright © 2020 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "helpers.h"
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using namespace aco;
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void create_mubuf(unsigned offset)
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{
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bld.mubuf(aco_opcode::buffer_load_dword, Definition(PhysReg(256), v1), Operand(PhysReg(0), s4),
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Operand(PhysReg(256), v1), Operand::zero(), offset, true);
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}
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void create_mimg(bool nsa, unsigned addrs, unsigned instr_dwords)
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{
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aco_ptr<MIMG_instruction> mimg{create_instruction<MIMG_instruction>(
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aco_opcode::image_sample, Format::MIMG, 3 + addrs, 1)};
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mimg->definitions[0] = Definition(PhysReg(256), v1);
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mimg->operands[0] = Operand(PhysReg(0), s8);
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mimg->operands[1] = Operand(PhysReg(0), s4);
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mimg->operands[2] = Operand(v1);
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for (unsigned i = 0; i < addrs; i++)
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mimg->operands[3 + i] = Operand(PhysReg(256 + (nsa ? i * 2 : i)), v1);
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mimg->dmask = 0x1;
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mimg->dim = ac_image_2d;
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assert(get_mimg_nsa_dwords(mimg.get()) + 2 == instr_dwords);
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bld.insert(std::move(mimg));
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}
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BEGIN_TEST(insert_nops.nsa_to_vmem_bug)
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if (!setup_cs(NULL, GFX10))
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return;
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/* no nop needed because offset&6==0 */
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//>> p_unit_test 0
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2], %0:v[4], %0:v[6], %0:v[8], %0:v[10] 2d storage: semantics: scope:invocation
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offset:8 offen storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
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create_mimg(true, 6, 4);
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create_mubuf(8);
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/* nop needed */
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//! p_unit_test 1
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2], %0:v[4], %0:v[6], %0:v[8], %0:v[10] 2d storage: semantics: scope:invocation
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//! s_nop
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offset:4 offen storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
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create_mimg(true, 6, 4);
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create_mubuf(4);
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/* no nop needed because the MIMG is not NSA */
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//! p_unit_test 2
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[1], %0:v[2], %0:v[3], %0:v[4], %0:v[5] 2d storage: semantics: scope:invocation
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offset:4 offen storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
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create_mimg(false, 6, 2);
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create_mubuf(4);
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/* no nop needed because there's already an instruction in-between */
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//! p_unit_test 3
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2], %0:v[4], %0:v[6], %0:v[8], %0:v[10] 2d storage: semantics: scope:invocation
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//! v_nop
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offset:4 offen storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
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create_mimg(true, 6, 4);
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bld.vop1(aco_opcode::v_nop);
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create_mubuf(4);
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/* no nop needed because the NSA instruction is under 4 dwords */
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//! p_unit_test 4
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2] 2d storage: semantics: scope:invocation
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offset:4 offen storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u));
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create_mimg(true, 2, 3);
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create_mubuf(4);
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/* NSA instruction and MUBUF/MTBUF in a different block */
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//! p_unit_test 5
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2], %0:v[4], %0:v[6], %0:v[8], %0:v[10] 2d storage: semantics: scope:invocation
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//! BB1
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//! /* logical preds: / linear preds: BB0, / kind: uniform, */
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//! s_nop
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offset:4 offen storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u));
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create_mimg(true, 6, 4);
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bld.reset(program->create_and_insert_block());
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create_mubuf(4);
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program->blocks[0].linear_succs.push_back(1);
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program->blocks[1].linear_preds.push_back(0);
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finish_insert_nops_test();
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END_TEST
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BEGIN_TEST(insert_nops.writelane_to_nsa_bug)
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if (!setup_cs(NULL, GFX10))
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return;
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/* nop needed */
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//>> p_unit_test 0
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//! v1: %0:v[255] = v_writelane_b32_e64 0, 0, %0:v[255]
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//! s_nop
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2] 2d storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
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bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(),
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Operand(PhysReg(511), v1));
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create_mimg(true, 2, 3);
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/* no nop needed because the MIMG is not NSA */
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//! p_unit_test 1
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//! v1: %0:v[255] = v_writelane_b32_e64 0, 0, %0:v[255]
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[1] 2d storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
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bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(),
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Operand(PhysReg(511), v1));
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create_mimg(false, 2, 2);
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/* no nop needed because there's already an instruction in-between */
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//! p_unit_test 2
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//! v1: %0:v[255] = v_writelane_b32_e64 0, 0, %0:v[255]
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//! v_nop
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2] 2d storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
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bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(),
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Operand(PhysReg(511), v1));
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bld.vop1(aco_opcode::v_nop);
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create_mimg(true, 2, 3);
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/* writelane and NSA instruction in different blocks */
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//! p_unit_test 3
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//! v1: %0:v[255] = v_writelane_b32_e64 0, 0, %0:v[255]
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//! BB1
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//! /* logical preds: / linear preds: BB0, / kind: uniform, */
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//! s_nop
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//! v1: %0:v[0] = image_sample %0:s[0-7], %0:s[0-3], v1: undef, %0:v[0], %0:v[2] 2d storage: semantics: scope:invocation
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
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bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(),
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Operand(PhysReg(511), v1));
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bld.reset(program->create_and_insert_block());
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create_mimg(true, 2, 3);
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program->blocks[0].linear_succs.push_back(1);
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program->blocks[1].linear_preds.push_back(0);
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finish_insert_nops_test();
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END_TEST
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