137 lines
4.2 KiB
C++
137 lines
4.2 KiB
C++
/*
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* Copyright © 2018 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef ACO_INSTRUCTION_SELECTION_H
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#define ACO_INSTRUCTION_SELECTION_H
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#include "aco_ir.h"
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#include "vulkan/radv_shader_args.h"
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#include <array>
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#include <unordered_map>
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#include <vector>
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namespace aco {
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enum aco_color_output_type {
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ACO_TYPE_ANY32,
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ACO_TYPE_FLOAT16,
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ACO_TYPE_INT16,
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ACO_TYPE_UINT16,
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};
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struct shader_io_state {
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uint8_t mask[VARYING_SLOT_MAX];
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Temp temps[VARYING_SLOT_MAX * 4u];
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shader_io_state()
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{
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memset(mask, 0, sizeof(mask));
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std::fill_n(temps, VARYING_SLOT_MAX * 4u, Temp(0, RegClass::v1));
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}
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};
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struct isel_context {
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const struct aco_compiler_options* options;
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const struct radv_shader_args* args;
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Program* program;
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nir_shader* shader;
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uint32_t constant_data_offset;
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Block* block;
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uint32_t first_temp_id;
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std::unordered_map<unsigned, std::array<Temp, NIR_MAX_VEC_COMPONENTS>> allocated_vec;
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Stage stage;
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struct {
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bool has_branch;
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struct {
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unsigned header_idx;
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Block* exit;
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bool has_divergent_continue = false;
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bool has_divergent_branch = false;
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} parent_loop;
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struct {
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bool is_divergent = false;
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} parent_if;
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bool exec_potentially_empty_discard =
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false; /* set to false when loop_nest_depth==0 && parent_if.is_divergent==false */
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uint16_t exec_potentially_empty_break_depth = UINT16_MAX;
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/* Set to false when loop_nest_depth==exec_potentially_empty_break_depth
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* and parent_if.is_divergent==false. Called _break but it's also used for
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* loop continues. */
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bool exec_potentially_empty_break = false;
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std::unique_ptr<unsigned[]> nir_to_aco; /* NIR block index to ACO block index */
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} cf_info;
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/* NIR range analysis. */
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struct hash_table* range_ht;
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nir_unsigned_upper_bound_config ub_config;
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Temp arg_temps[AC_MAX_ARGS];
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/* FS inputs */
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Temp persp_centroid, linear_centroid;
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/* GS inputs */
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Temp gs_wave_id;
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/* VS output information */
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bool export_clip_dists;
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unsigned num_clip_distances;
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unsigned num_cull_distances;
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/* tessellation information */
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uint64_t tcs_temp_only_inputs;
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uint32_t tcs_num_patches;
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bool tcs_in_out_eq = false;
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/* Fragment color output information */
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uint16_t output_color_types;
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/* I/O information */
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shader_io_state inputs;
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shader_io_state outputs;
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};
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inline Temp
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get_arg(isel_context* ctx, struct ac_arg arg)
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{
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assert(arg.used);
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return ctx->arg_temps[arg.arg_index];
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}
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void init_context(isel_context* ctx, nir_shader* shader);
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void cleanup_context(isel_context* ctx);
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isel_context setup_isel_context(Program* program, unsigned shader_count,
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struct nir_shader* const* shaders, ac_shader_config* config,
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const struct aco_compiler_options* options,
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const struct aco_shader_info* info,
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const struct radv_shader_args* args,
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bool is_gs_copy_shader, bool is_ps_epilog);
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} // namespace aco
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#endif /* ACO_INSTRUCTION_SELECTION_H */
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