181 lines
4.3 KiB
C
181 lines
4.3 KiB
C
/*
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* Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
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* Copyright 2010 Marek Olšák <maraeo@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#ifndef AMD_FAMILY_H
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#define AMD_FAMILY_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum radeon_family
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{
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CHIP_UNKNOWN = 0,
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/* R3xx-based cores. (GFX2) */
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CHIP_R300,
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CHIP_R350,
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CHIP_RV350,
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CHIP_RV370,
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CHIP_RV380,
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CHIP_RS400,
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CHIP_RC410,
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CHIP_RS480,
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/* R4xx-based cores. (GFX2) */
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CHIP_R420,
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CHIP_R423,
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CHIP_R430,
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CHIP_R480,
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CHIP_R481,
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CHIP_RV410,
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CHIP_RS600,
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CHIP_RS690,
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CHIP_RS740,
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/* R5xx-based cores. (GFX2) */
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CHIP_RV515,
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CHIP_R520,
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CHIP_RV530,
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CHIP_R580,
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CHIP_RV560,
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CHIP_RV570,
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/* GFX3 (R6xx) */
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CHIP_R600,
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CHIP_RV610,
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CHIP_RV630,
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CHIP_RV670,
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CHIP_RV620,
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CHIP_RV635,
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CHIP_RS780,
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CHIP_RS880,
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/* GFX3 (R7xx) */
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CHIP_RV770,
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CHIP_RV730,
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CHIP_RV710,
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CHIP_RV740,
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/* GFX4 (Evergreen) */
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CHIP_CEDAR,
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CHIP_REDWOOD,
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CHIP_JUNIPER,
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CHIP_CYPRESS,
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CHIP_HEMLOCK,
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CHIP_PALM,
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CHIP_SUMO,
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CHIP_SUMO2,
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CHIP_BARTS,
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CHIP_TURKS,
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CHIP_CAICOS,
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/* GFX5 (Northern Islands) */
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CHIP_CAYMAN,
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CHIP_ARUBA,
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/* GFX6 (Southern Islands) */
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CHIP_TAHITI,
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CHIP_PITCAIRN,
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CHIP_VERDE,
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CHIP_OLAND,
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CHIP_HAINAN,
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/* GFX7 (Sea Islands) */
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CHIP_BONAIRE,
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CHIP_KAVERI,
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CHIP_KABINI,
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CHIP_HAWAII, /* Radeon 290, 390 */
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/* GFX8 (Volcanic Islands & Polaris) */
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CHIP_TONGA, /* Radeon 285, 380 */
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CHIP_ICELAND,
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CHIP_CARRIZO,
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CHIP_FIJI, /* Radeon Fury */
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CHIP_STONEY,
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CHIP_POLARIS10, /* Radeon 470, 480, 570, 580, 590 */
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CHIP_POLARIS11, /* Radeon 460, 560 */
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CHIP_POLARIS12, /* Radeon 540, 550 */
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CHIP_VEGAM,
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/* GFX9 (Vega) */
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CHIP_VEGA10, /* Vega 56, 64 */
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CHIP_VEGA12,
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CHIP_VEGA20, /* Radeon VII, MI50 */
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CHIP_RAVEN, /* Ryzen 2000, 3000 */
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CHIP_RAVEN2, /* Ryzen 2200U, 3200U */
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CHIP_RENOIR, /* Ryzen 4000, 5000 */
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CHIP_ARCTURUS, /* MI100 */
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CHIP_ALDEBARAN, /* MI200 */
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/* GFX10.1 (RDNA 1) */
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CHIP_NAVI10, /* Radeon 5600, 5700 */
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CHIP_NAVI12, /* Radeon Pro 5600M */
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CHIP_NAVI14, /* Radeon 5300, 5500 */
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/* GFX10.3 (RDNA 2) */
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CHIP_NAVI21, /* Radeon 6800, 6900 (formerly "Sienna Cichlid") */
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CHIP_NAVI22, /* Radeon 6700 (formerly "Navy Flounder") */
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CHIP_VANGOGH, /* Steam Deck */
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CHIP_NAVI23, /* Radeon 6600 (formerly "Dimgrey Cavefish") */
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CHIP_NAVI24, /* Radeon 6400, 6500 (formerly "Beige Goby") */
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CHIP_REMBRANDT, /* Ryzen 6000 (formerly "Yellow Carp") */
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CHIP_GFX1036,
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CHIP_GFX1100,
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CHIP_GFX1101,
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CHIP_GFX1102,
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CHIP_GFX1103,
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CHIP_LAST,
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};
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enum amd_gfx_level
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{
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CLASS_UNKNOWN = 0,
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R300,
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R400,
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R500,
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R600,
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R700,
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EVERGREEN,
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CAYMAN,
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GFX6,
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GFX7,
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GFX8,
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GFX9,
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GFX10,
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GFX10_3,
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GFX11,
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NUM_GFX_VERSIONS,
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};
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enum amd_ip_type
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{
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AMD_IP_GFX = 0,
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AMD_IP_COMPUTE,
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AMD_IP_SDMA,
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AMD_IP_UVD,
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AMD_IP_VCE,
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AMD_IP_UVD_ENC,
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AMD_IP_VCN_DEC,
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AMD_IP_VCN_ENC,
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AMD_IP_VCN_UNIFIED = AMD_IP_VCN_ENC,
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AMD_IP_VCN_JPEG,
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AMD_NUM_IP_TYPES,
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};
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const char *ac_get_family_name(enum radeon_family family);
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#ifdef __cplusplus
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}
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#endif
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#endif
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