126 lines
3.8 KiB
C
126 lines
3.8 KiB
C
/*
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* Copyright 2021 Valve Corporation
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef AC_SPM_H
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#define AC_SPM_H
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#include <stdint.h>
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#include "ac_perfcounter.h"
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#define AC_SPM_MAX_COUNTER_PER_BLOCK 16
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#define AC_SPM_GLOBAL_TIMESTAMP_COUNTERS 4 /* in unit of 16-bit counters*/
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#define AC_SPM_NUM_COUNTER_PER_MUXSEL 16 /* 16 16-bit counters per muxsel */
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#define AC_SPM_MUXSEL_LINE_SIZE ((AC_SPM_NUM_COUNTER_PER_MUXSEL * 2) / 4) /* in dwords */
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#define AC_SPM_NUM_PERF_SEL 4
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enum ac_spm_segment_type {
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AC_SPM_SEGMENT_TYPE_SE0,
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AC_SPM_SEGMENT_TYPE_SE1,
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AC_SPM_SEGMENT_TYPE_SE2,
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AC_SPM_SEGMENT_TYPE_SE3,
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AC_SPM_SEGMENT_TYPE_GLOBAL,
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AC_SPM_SEGMENT_TYPE_COUNT,
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};
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struct ac_spm_counter_create_info {
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enum ac_pc_gpu_block gpu_block;
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uint32_t instance;
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uint32_t event_id;
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};
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struct ac_spm_muxsel {
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uint16_t counter : 6;
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uint16_t block : 4;
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uint16_t shader_array : 1; /* 0: SA0, 1: SA1 */
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uint16_t instance : 5;
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};
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struct ac_spm_muxsel_line {
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struct ac_spm_muxsel muxsel[AC_SPM_NUM_COUNTER_PER_MUXSEL];
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};
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struct ac_spm_counter_info {
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/* General info. */
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enum ac_pc_gpu_block gpu_block;
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uint32_t instance;
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uint32_t event_id;
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/* Muxsel info. */
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enum ac_spm_segment_type segment_type;
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bool is_even;
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struct ac_spm_muxsel muxsel;
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/* Output info. */
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uint64_t offset;
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};
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struct ac_spm_counter_select {
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uint8_t active; /* mask of used 16-bit counters. */
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uint32_t sel0;
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uint32_t sel1;
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};
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struct ac_spm_block_select {
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const struct ac_pc_block *b;
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uint32_t grbm_gfx_index;
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uint32_t num_counters;
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struct ac_spm_counter_select counters[AC_SPM_MAX_COUNTER_PER_BLOCK];
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};
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struct ac_spm_trace_data {
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/* struct radeon_winsys_bo or struct pb_buffer */
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void *bo;
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void *ptr;
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uint32_t buffer_size;
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uint16_t sample_interval;
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/* Enabled counters. */
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unsigned num_counters;
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struct ac_spm_counter_info *counters;
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/* Block/counters selection. */
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uint32_t num_block_sel;
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struct ac_spm_block_select *block_sel;
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uint32_t num_used_sq_block_sel;
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struct ac_spm_block_select sq_block_sel[16];
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/* Muxsel lines. */
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unsigned num_muxsel_lines[AC_SPM_SEGMENT_TYPE_COUNT];
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struct ac_spm_muxsel_line *muxsel_lines[AC_SPM_SEGMENT_TYPE_COUNT];
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};
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bool ac_init_spm(const struct radeon_info *info,
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const struct ac_perfcounters *pc,
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unsigned num_counters,
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const struct ac_spm_counter_create_info *counters,
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struct ac_spm_trace_data *spm_trace);
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void ac_destroy_spm(struct ac_spm_trace_data *spm_trace);
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uint32_t ac_spm_get_sample_size(const struct ac_spm_trace_data *spm_trace);
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uint32_t ac_spm_get_num_samples(const struct ac_spm_trace_data *spm_trace);
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#endif
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