188 lines
7.0 KiB
C
188 lines
7.0 KiB
C
/*
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* Copyright © 2021 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "ac_nir.h"
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#include "nir.h"
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#include "nir_builder.h"
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static nir_ssa_def *
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try_extract_additions(nir_builder *b, nir_ssa_scalar scalar, uint64_t *out_const,
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nir_ssa_def **out_offset)
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{
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if (!nir_ssa_scalar_is_alu(scalar) || nir_ssa_scalar_alu_op(scalar) != nir_op_iadd)
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return NULL;
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nir_alu_instr *alu = nir_instr_as_alu(scalar.def->parent_instr);
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nir_ssa_scalar src0 = nir_ssa_scalar_chase_alu_src(scalar, 0);
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nir_ssa_scalar src1 = nir_ssa_scalar_chase_alu_src(scalar, 1);
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for (unsigned i = 0; i < 2; ++i) {
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nir_ssa_scalar src = i ? src1 : src0;
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if (nir_ssa_scalar_is_const(src)) {
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*out_const += nir_ssa_scalar_as_uint(src);
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} else if (nir_ssa_scalar_is_alu(src) && nir_ssa_scalar_alu_op(src) == nir_op_u2u64) {
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nir_ssa_scalar offset_scalar = nir_ssa_scalar_chase_alu_src(src, 0);
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nir_ssa_def *offset = nir_channel(b, offset_scalar.def, offset_scalar.comp);
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if (*out_offset)
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*out_offset = nir_iadd(b, *out_offset, offset);
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else
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*out_offset = offset;
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} else {
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continue;
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}
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nir_ssa_def *replace_src =
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try_extract_additions(b, i == 1 ? src0 : src1, out_const, out_offset);
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return replace_src ? replace_src : nir_ssa_for_alu_src(b, alu, 1 - i);
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}
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nir_ssa_def *replace_src0 = try_extract_additions(b, src0, out_const, out_offset);
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nir_ssa_def *replace_src1 = try_extract_additions(b, src1, out_const, out_offset);
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if (!replace_src0 && !replace_src1)
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return NULL;
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replace_src0 = replace_src0 ? replace_src0 : nir_channel(b, src0.def, src0.comp);
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replace_src1 = replace_src1 ? replace_src1 : nir_channel(b, src1.def, src1.comp);
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return nir_iadd(b, replace_src0, replace_src1);
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}
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static bool
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process_instr(nir_builder *b, nir_instr *instr, void *_)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return false;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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nir_intrinsic_op op;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_global:
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case nir_intrinsic_load_global_constant:
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op = nir_intrinsic_load_global_amd;
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break;
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case nir_intrinsic_global_atomic_add:
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op = nir_intrinsic_global_atomic_add_amd;
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break;
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case nir_intrinsic_global_atomic_imin:
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op = nir_intrinsic_global_atomic_imin_amd;
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break;
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case nir_intrinsic_global_atomic_umin:
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op = nir_intrinsic_global_atomic_umin_amd;
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break;
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case nir_intrinsic_global_atomic_imax:
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op = nir_intrinsic_global_atomic_imax_amd;
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break;
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case nir_intrinsic_global_atomic_umax:
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op = nir_intrinsic_global_atomic_umax_amd;
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break;
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case nir_intrinsic_global_atomic_and:
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op = nir_intrinsic_global_atomic_and_amd;
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break;
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case nir_intrinsic_global_atomic_or:
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op = nir_intrinsic_global_atomic_or_amd;
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break;
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case nir_intrinsic_global_atomic_xor:
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op = nir_intrinsic_global_atomic_xor_amd;
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break;
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case nir_intrinsic_global_atomic_exchange:
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op = nir_intrinsic_global_atomic_exchange_amd;
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break;
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case nir_intrinsic_global_atomic_fadd:
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op = nir_intrinsic_global_atomic_fadd_amd;
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break;
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case nir_intrinsic_global_atomic_fmin:
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op = nir_intrinsic_global_atomic_fmin_amd;
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break;
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case nir_intrinsic_global_atomic_fmax:
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op = nir_intrinsic_global_atomic_fmax_amd;
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break;
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case nir_intrinsic_global_atomic_comp_swap:
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op = nir_intrinsic_global_atomic_comp_swap_amd;
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break;
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case nir_intrinsic_global_atomic_fcomp_swap:
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op = nir_intrinsic_global_atomic_fcomp_swap_amd;
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break;
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case nir_intrinsic_store_global:
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op = nir_intrinsic_store_global_amd;
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break;
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default:
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return false;
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}
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unsigned addr_src_idx = op == nir_intrinsic_store_global_amd ? 1 : 0;
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nir_src *addr_src = &intrin->src[addr_src_idx];
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uint64_t off_const = 0;
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nir_ssa_def *offset = NULL;
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nir_ssa_scalar src = {addr_src->ssa, 0};
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b->cursor = nir_after_instr(addr_src->ssa->parent_instr);
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nir_ssa_def *addr = try_extract_additions(b, src, &off_const, &offset);
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addr = addr ? addr : addr_src->ssa;
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b->cursor = nir_before_instr(&intrin->instr);
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if (off_const > UINT32_MAX) {
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addr = nir_iadd_imm(b, addr, off_const);
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off_const = 0;
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}
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nir_intrinsic_instr *new_intrin = nir_intrinsic_instr_create(b->shader, op);
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new_intrin->num_components = intrin->num_components;
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if (op != nir_intrinsic_store_global_amd)
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nir_ssa_dest_init(&new_intrin->instr, &new_intrin->dest, intrin->dest.ssa.num_components,
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intrin->dest.ssa.bit_size, NULL);
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unsigned num_src = nir_intrinsic_infos[intrin->intrinsic].num_srcs;
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for (unsigned i = 0; i < num_src; i++)
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new_intrin->src[i] = nir_src_for_ssa(intrin->src[i].ssa);
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new_intrin->src[num_src] = nir_src_for_ssa(offset ? offset : nir_imm_zero(b, 1, 32));
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new_intrin->src[addr_src_idx] = nir_src_for_ssa(addr);
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if (nir_intrinsic_has_access(intrin))
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nir_intrinsic_set_access(new_intrin, nir_intrinsic_access(intrin));
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if (nir_intrinsic_has_align_mul(intrin))
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nir_intrinsic_set_align_mul(new_intrin, nir_intrinsic_align_mul(intrin));
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if (nir_intrinsic_has_align_offset(intrin))
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nir_intrinsic_set_align_offset(new_intrin, nir_intrinsic_align_offset(intrin));
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if (nir_intrinsic_has_write_mask(intrin))
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nir_intrinsic_set_write_mask(new_intrin, nir_intrinsic_write_mask(intrin));
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nir_intrinsic_set_base(new_intrin, off_const);
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nir_builder_instr_insert(b, &new_intrin->instr);
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if (op != nir_intrinsic_store_global_amd)
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, &new_intrin->dest.ssa);
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nir_instr_remove(&intrin->instr);
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return true;
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}
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bool
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ac_nir_lower_global_access(nir_shader *shader)
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{
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return nir_shader_instructions_pass(shader, process_instr,
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nir_metadata_block_index | nir_metadata_dominance, NULL);
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}
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