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26069 Commits

Author SHA1 Message Date
Brian Paul 4d9bbabb83 docs: document Gallium glDrawPixels(GL_STENCIL_INDEX) fix 2009-09-10 14:15:07 -06:00
Brian Paul 3f4d776199 softpipe: minor indentation fix 2009-09-10 14:14:18 -06:00
Brian Paul 988db64119 softpipe: set dirty_render_cache in softpipe_clear() 
This fixes a bug seen when doing a glDrawPixels(GL_STENCIL_INDEX) right
after a glClear().  The check-for-flush test was failing because we
didn't set the dirty_render_cache flag in softpipe_clear().  So we saw
stale data when we mapped the stencil buffer.
 2009-09-10 14:11:41 -06:00
Marcin Kościelnicki 18882f4d30 nv50: Fix tiling mode for lower mipmap levels. 2009-09-10 21:06:48 +02:00
Brian Paul 79a3e298c5 docs: initial 7.5.2 release notes page 2009-09-10 12:50:08 -06:00
Ian Romanick 8fd4e4dfc3 Fix merge fail 
One of the conflicst from this merge was missed:

commit 0c309bb494
Merge: c6c44bf d27d659
Author: Brian Paul <brianp@vmware.com>
Date:   Wed Sep 9 08:33:39 2009 -0600
 2009-09-10 11:47:24 -07:00
Brian Paul d78a196121 tgsi: use new tgsi_call_record to handle execution mask stacks 
This fixes some issues when "return"ing from nested loops/conditionals.
 2009-09-10 12:45:27 -06:00
Brian Paul c5f8594aeb mesa: need to set all stencil bits to 0 before setting the 1 bits 
Plus, check for pixel transfer stencil index/offset.
 2009-09-10 12:45:27 -06:00
Ian Romanick 8398535331 Merge branch 'mesa_7_5_branch' into mesa_7_6_branch 
Conflicts:
	src/mesa/drivers/dri/intel/intel_context.c
 2009-09-10 11:24:56 -07:00
Eric Anholt acfea5c705 i965: Fix relocation delta for WM surfaces. 
This was a regression in 0f328c90db.

Bug #23688
Bug #23254
(cherry picked from commit 5604b27b93)
 2009-09-10 11:22:56 -07:00
Zhenyu Wang 2dd3da3a4a intel: add B43 chipset support 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

Hopefully this will be one of the last cherry-picks.

(cherry picked from commit ca246dd186)
 2009-09-10 11:18:41 -07:00
Eric Anholt 36dd53a3cd intel: Don't forget to map the depth read buffer in spans. 
This broke BlitFramebufferEXT(GL_DEPTH_BUFFER_BIT).
 2009-09-10 11:16:18 -07:00
Alex Deucher e669dc2b0d r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2 2009-09-10 12:04:38 -04:00
Alex Deucher 7dfe54a60e r300: add full support for two sided stencil on r5xx for dri2 2009-09-10 12:01:19 -04:00
Mathias Frohlich f89751e719 mesa: fix cut&paste typos 2009-09-10 08:50:16 -06:00
Brian Paul e9ba9ffc9a mesa: in texenvprogram code, only do saturation when really needed. 
For some env modes (like modulate or replace) we don't have to clamp
because we know the results will be in [0,1].
 2009-09-10 08:41:12 -06:00
Vinson Lee 23fefa031f gallium: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h. 
Fixes typo from commit c6c44bf481.
 2009-09-10 08:40:16 -06:00
Vinson Lee c7291f69a0 util: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h. 
Fixes typo from commit c6c44bf481.
 2009-09-10 15:33:57 +01:00
Pauli Nieminen 3d1324a66a radeon: Change debugging code to use macros instead of inline functions. 
Variadic functions can't be inlined which makes debugging to have quite large
function overead. Only aleternative method is to use variadic macros which are
inlined so compiler can optimize debugging to minimize overhead.
 2009-09-10 16:53:08 +03:00
José Fonseca 6a405b4a21 llvmpipe: Fix alpha test. 2009-09-10 13:35:39 +01:00
José Fonseca 4c3a48ad0c llvmpipe: Mask out color channels not present in the color buffer. 2009-09-10 12:37:44 +01:00
José Fonseca 48f19c0bcd llvmpipe: Fix sampling from depth textures. Respect texture compare func. 
Fixes Mesa shadowtex sample.
 2009-09-10 12:14:53 +01:00
José Fonseca c3c80c5c22 llvmpipe: Skip blending when mask is zero. 
This increases quake3 timedemo fps another 10%.
 2009-09-10 12:01:42 +01:00
José Fonseca 8e6b925d2a llvmpipe: Proper control flow builders. 
New control flow helper functions which keep track of all variables
and generate the correct Phi functions.

This re-enables skipping the fs execution of quads masked out by
the rasterizer, early z testing, and kill opcode.

This yields a performance improvement of around 20%.
 2009-09-10 11:44:03 +01:00
José Fonseca bd3b59da63 llvmpipe: Copy the texture target into the sampler static state. 
Hunk forgotten in previous commit.
 2009-09-10 09:19:51 +01:00
José Fonseca 4139bc8f43 llvmpipe: Quick hack for 1D textures. 2009-09-09 21:48:50 +01:00
José Fonseca b0b131b023 scons: Pass -mstackrealign option to gcc. 
It is impossible to have gcc generate SSE code without it, as thirdparty
applications often call us with an unaligned stack pointer.
 2009-09-09 21:48:50 +01:00
José Fonseca abc160b664 llvmpipe: Fix depth mask computation. 
Fixes depth test for 24bit depth formats.
 2009-09-09 21:48:50 +01:00
José Fonseca cdbbcdf3bd llvmpipe: Include zsbuf's format in the fragment shader key. 2009-09-09 21:48:50 +01:00
José Fonseca da912a7a16 util: Fix depth/stencil format description. 
Inverse channel order.
 2009-09-09 21:48:49 +01:00
José Fonseca 01c831576e llvmpipe: Debug function to check stack alignment. 
Doing alignment check in locus is redundant, as gcc alignment assumptions
will optimize away the check.
 2009-09-09 21:48:49 +01:00
Eric Anholt 5604b27b93 i965: Fix relocation delta for WM surfaces. 
This was a regression in 0f328c90db.

Bug #23688
Bug #23254
 2009-09-09 12:52:52 -07:00
Brian Paul 2b692cd6d6 mesa: include new u_format.csv file in tarballs 2009-09-09 12:01:39 -06:00
Pauli Nieminen e0f99b8268 radeon: Add more verbose error message for failed command buffer. 2009-09-09 18:31:52 +03:00
Brian Paul 4d85a6b393 i965: fix an overlooked merge conflict 2009-09-09 09:24:38 -06:00
Alex Deucher 49c230709c r600: check if textures are actually enabled before submission 
noticed by taiu on IRC.
 2009-09-09 11:17:24 -04:00
Brian Paul 7bf6347362 Merge branch 'mesa_7_6_branch' 2009-09-09 09:00:58 -06:00
Brian Paul 94a8157ef6 mesa: regenerate get.c form get_gen.py 2009-09-09 08:55:32 -06:00
Brian Paul 3fed69eb16 mesa: move call to init_c_cliptest() from enable.c to tnl module. 
Fixed gallium build breakage.
 2009-09-09 08:54:38 -06:00
Brian Paul 0c309bb494 Merge branch 'mesa_7_5_branch' into mesa_7_6_branch 
Conflicts:

	Makefile
	configs/default
	progs/glsl/Makefile
	src/gallium/auxiliary/util/u_simple_shaders.c
	src/gallium/state_trackers/glx/xlib/xm_api.c
	src/mesa/drivers/dri/i965/brw_draw_upload.c
	src/mesa/drivers/dri/i965/brw_vs_emit.c
	src/mesa/drivers/dri/intel/intel_context.h
	src/mesa/drivers/dri/intel/intel_pixel.c
	src/mesa/drivers/dri/intel/intel_pixel_read.c
	src/mesa/main/texenvprogram.c
	src/mesa/main/version.h
 2009-09-09 08:33:39 -06:00
aljen c6c44bf481 gallium: Added HaikuOS platform 2009-09-09 08:24:18 -06:00
Brian Paul 89a765e92b mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels() 
Works around a bug found on i965.  See bug 23670.
 2009-09-09 08:23:14 -06:00
Vinson Lee d27d659043 scons: Set default_dri to no for Mac OS. 
Mac OS does not have libdrm.
 2009-09-09 08:21:07 -06:00
Alex Deucher da9ed257a3 r600: fix ftp for dri1 
We use t->bo for dri1 since r600 uses CS for dri1.
 2009-09-09 01:43:17 -04:00
Zhenyu Wang ca246dd186 intel: add B43 chipset support 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2009-09-09 13:28:59 +08:00
Dave Airlie 5aaa45de4c r600: don't setup hardware state if TFP 
if we have a BO here it means TFP and we should have set it
up already.

tested by b0le on #radeon
 2009-09-09 15:02:16 +10:00
Brian Paul 8947cf6728 progs/tests: added Z invert option 2009-09-08 16:47:30 -06:00
Brian Paul f78eafcacb mesa: bump version to 7.7 2009-09-08 16:46:06 -06:00
Brian Paul 97cbaab541 gallium: added r8g8b8_get/put_tile_rgba() 2009-09-08 16:45:34 -06:00
Brian Paul 079ae4c38c progs/demos: added RGB invert option 2009-09-08 16:45:07 -06:00