Commit Graph

150367 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 35ff537814 pan/bi: Constant fold swizzles on constants
This lets us avoid generating SWZ instructions. Those instructions could
be constant folded but that complicates the replication analysis
introduced in the next commit.

Almost no shader-db changes.

quadwords HURT:   shaders/glmark/1-22.shader_test MESA_SHADER_FRAGMENT: 718 -> 722 (0.56%)

total quadwords in shared programs: 68169 -> 68173 (<.01%)
quadwords in affected programs: 718 -> 722 (0.56%)
helped: 0
HURT: 1

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14576>
2022-02-19 03:02:10 +00:00
Alyssa Rosenzweig 62533a6e64 pan/bi: Lower swizzles on MUX.v2i16
We'll generate this in a moment.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14576>
2022-02-19 03:02:10 +00:00
Alyssa Rosenzweig 8bd4976d98 pan/bi: Lower swizzles on CSEL.i32/MUX.i32
This is counter-intuitive, but required for correct operation when
CSEL.i32 takes a 1-bit (stored 16-bit) boolean argument. The impedance
mismatch ultimately is between CSEL.b32 (nir's bcsel, nonexistant in the
hardware) and the lowering CSEL.i32. However, a similar problem exists
even with MUX.i32 which lacks a good way of zero/sign-extending
booleans.

Cherry-picked from my Valhall branch though the issue also affects
Bifrost. Fixes piglit shaders@glsl-vs-if-bool on Bifrost.

Unfortunately, shader-db is quite unhappy :-(

The proper fix is to use lower_bool_to_bitsize, but that can't be
backported to mesa-stable.

total instructions in shared programs: 157539 -> 158953 (0.90%)
instructions in affected programs: 55621 -> 57035 (2.54%)
helped: 2
HURT: 259
helped stats (abs) min: 2.0 max: 2.0 x̄: 2.00 x̃: 2
helped stats (rel) min: 2.11% max: 2.67% x̄: 2.39% x̃: 2.39%
HURT stats (abs)   min: 1.0 max: 40.0 x̄: 5.47 x̃: 2
HURT stats (rel)   min: 0.36% max: 16.13% x̄: 2.55% x̃: 1.59%
95% mean confidence interval for instructions value: 4.44 6.40
95% mean confidence interval for instructions %-change: 2.21% 2.82%
Instructions are HURT.

total tuples in shared programs: 132322 -> 132907 (0.44%)
tuples in affected programs: 31806 -> 32391 (1.84%)
helped: 5
HURT: 152
helped stats (abs) min: 1.0 max: 2.0 x̄: 1.40 x̃: 1
helped stats (rel) min: 0.39% max: 3.03% x̄: 1.70% x̃: 1.61%
HURT stats (abs)   min: 1.0 max: 42.0 x̄: 3.89 x̃: 2
HURT stats (rel)   min: 0.29% max: 18.18% x̄: 2.50% x̃: 1.79%
95% mean confidence interval for tuples value: 2.88 4.58
95% mean confidence interval for tuples %-change: 1.87% 2.85%
Tuples are HURT.

total clauses in shared programs: 28672 -> 28698 (0.09%)
clauses in affected programs: 869 -> 895 (2.99%)
helped: 1
HURT: 24
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 5.88% max: 5.88% x̄: 5.88% x̃: 5.88%
HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.12 x̃: 1
HURT stats (rel)   min: 0.49% max: 33.33% x̄: 8.46% x̃: 3.59%
95% mean confidence interval for clauses value: 0.82 1.26
95% mean confidence interval for clauses %-change: 3.84% 11.93%
Clauses are HURT.

total cycles in shared programs: 15119.04 -> 15137.88 (0.12%)
cycles in affected programs: 922.87 -> 941.71 (2.04%)
helped: 4
HURT: 79
helped stats (abs) min: 0.0416669999999999 max: 0.0833330000000001 x̄: 0.05 x̃: 0
helped stats (rel) min: 0.40% max: 3.17% x̄: 1.57% x̃: 1.35%
HURT stats (abs)   min: 0.041665999999999315 max: 1.75 x̄: 0.24 x̃: 0
HURT stats (rel)   min: 0.30% max: 20.00% x̄: 2.83% x̃: 2.12%
95% mean confidence interval for cycles value: 0.17 0.29
95% mean confidence interval for cycles %-change: 1.86% 3.37%
Cycles are HURT.

total arith in shared programs: 4922.71 -> 4947.71 (0.51%)
arith in affected programs: 1423.79 -> 1448.79 (1.76%)
helped: 5
HURT: 177
helped stats (abs) min: 0.0416669999999999 max: 0.0833330000000001 x̄: 0.06 x̃: 0
helped stats (rel) min: 0.40% max: 3.17% x̄: 1.82% x̃: 1.67%
HURT stats (abs)   min: 0.041665999999999315 max: 1.75 x̄: 0.14 x̃: 0
HURT stats (rel)   min: 0.30% max: 22.22% x̄: 2.50% x̃: 1.52%
95% mean confidence interval for arith value: 0.11 0.17
95% mean confidence interval for arith %-change: 1.86% 2.90%
Arith are HURT.

total quadwords in shared programs: 120605 -> 120956 (0.29%)
quadwords in affected programs: 26535 -> 26886 (1.32%)
helped: 6
HURT: 143
helped stats (abs) min: 1.0 max: 7.0 x̄: 2.83 x̃: 1
helped stats (rel) min: 0.93% max: 6.33% x̄: 2.29% x̃: 1.71%
HURT stats (abs)   min: 1.0 max: 21.0 x̄: 2.57 x̃: 2
HURT stats (rel)   min: 0.34% max: 13.79% x̄: 2.02% x̃: 1.22%
95% mean confidence interval for quadwords value: 1.86 2.86
95% mean confidence interval for quadwords %-change: 1.45% 2.24%
Quadwords are HURT.

total threads in shared programs: 4670 -> 4669 (-0.02%)
threads in affected programs: 2 -> 1 (-50.00%)
helped: 0
HURT: 1

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14576>
2022-02-19 03:02:10 +00:00
Emma Anholt a2b7d9b9cd ci/freedreno: Add a known spilling hangcheck flake.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15085>
2022-02-19 02:37:13 +00:00
Emma Anholt b39d5e9705 ci/freedreno: Cut down pre-merge a630 VK coverage.
We've got lots of VK coverage on 618, so take some of the load off (but
leave a little bit of testing just to make sure we don't totally break
630).  This should help with our Marge times since we've added some other
coverage to 630 that's started overloading the runners.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15085>
2022-02-19 02:37:13 +00:00
Emma Anholt 04790ec8bb ci/freedreno: Move a 60s timeout test to skips instead of flakes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15085>
2022-02-19 02:37:13 +00:00
Connor Abbott 7e8d885919 spirv: Rewrite determinant calculation
The old calculation for mat3 was clever, but it turns out that a
straightforward application of subdeterminants similar to how mat4 is
handled is more efficient: on a scalar architecture with some sort of
combined multiply+add instruction with a negate modifier (both fairly
common), the new determinant is 9 instructions vs. 15 for the old one,
and without the multiply-add it's 14 instructions vs. 18 for the old
one.  When used as a routine for inverse() the savings are compounded,
because we now use the same method as used to compute the adjucate
matrix and so CSE can combine most of the calculations with the adjucate
matrix ones.

Once mat3 and mat4 use the same method for computing determinants, we
can combine them into a single recursive function. I also pulled up the
mat_subdet() function because it was doing basically what we need, so
it's now shared between determinant and inverse. This shrinks the
implementation significantly, as can be seen from the diffstat.

The real reason I want to change this, though, is that it fixes
dEQP-VK.glsl.builtin.precision_fp16_storage16b.inverse.compute.mat3 with
turnip. Qualcomm uses round-to-zero for 16-bit frcp, which combined with
some inaccuracy in the old method of calculating the determinant led us
to fail. Qualcomm's driver uses something like the new method to
calculate the determinant in the inverse. We could argue that Mesa's
method should be allowed, because round-to-zero for floating-point
division is within spec and there are no precision guarantees given for
determinant() or inverse(). However we might as well use the more
efficient method.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14652>
2022-02-19 02:03:25 +00:00
Connor Abbott c21065c87a util/blob: Clarify rules on blob::data
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15028>
2022-02-19 01:25:46 +00:00
Connor Abbott 6761550357 nir/serialize: Don't access blob->data directly
It won't work if the blob is fixed-size and we overrun the size, which
will be the case with the Vulkan pipeline cache.

This gets a bit tricky for the repeated-header optimization, because we
can't read the header from the blob. Instead we have to store the header
itself.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15028>
2022-02-19 01:25:46 +00:00
Alyssa Rosenzweig 9168dcbbc1 pan/bi: Disambiguate IDVS variants in shader-db
Label IDVS variants as being MESA_SHADER_{POSITION, VARYING} stages;
reserve the MESA_SHADER_VERTEX label for non-IDVS shaders. This reduces
confusion where a single shader compiles to two MESA_SHADER_VERTEX
shaders with different stats.

While we're at it, de-vendor the blend shader stage name; these stats
are internal anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15086>
2022-02-19 00:01:07 +00:00
Alyssa Rosenzweig 01d1bf6228 asahi: Wire in pure integer texture formats
Passes dEQP-GLES3.functional.texture.format.sized.2d.r*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:33 +00:00
Alyssa Rosenzweig fded99b1c5 asahi: Support LOD clamps
Passes:

   dEQP-GLES3.functional.texture.mipmap.2d.min_lod.*
   dEQP-GLES3.functional.texture.mipmap.2d.max_lod.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:33 +00:00
Alyssa Rosenzweig cc3e98e201 asahi: Identify minimum/maximum LOD fields
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:33 +00:00
Alyssa Rosenzweig 6554790dfb asahi: Add LOD clamp packing unit tests
With GTest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig e3a5c1b478 asahi: Add LOD type
Automatically packs and unpacks float <==> clamped 4:6 fixed point, used
for min/max LOD fields on the Sampler descriptor.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig db93090ffc asahi: Allow GenXML to be used in C++
C++ requires explicit casts from integers to enums. Fixes errors like
the following when trying to use Asahi GenXML from a GTest unit test.

src/asahi/lib/agx_pack.h:554:23: error: assigning to 'enum agx_channels' from incompatible type 'uint64_t' (aka 'unsigned long long')
   values->channels = __gen_unpack_uint(cl, 0, 6);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 055c5a59f8 agx: Round and clamp array indices
Conforming with the GLSL spec. Fixes:

dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darray_fixed_fragment

(and probably others)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig a822b7b6cc agx: Naturally align uniform pushes
Required to pack correctly, e.g if we push a 16-bit value then a 64-bit
value.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 0c2bbb470a agx: Add agx_size_align_16 helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 9aeb5156bc agx: Add typed move helper
Useful for u2u16 in lowering code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 830d16e9f0 asahi: Add AGX_PUSH_ARRAY_SIZE_MINUS_1
Required to clamp array indices against the array sizes per the GLSL
spec. Metal also does this, implying it's required by the hardware for
correct operation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 7b4ea2fd38 asahi: Implement texturing with non-zero start level
Unsure if this comes up anywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 11072cfd21 asahi: Handle reloads of specific cube/mipfaces
The texture descriptor we construct for reloading needs to respect the
surface's texture/layer selection. Fix exactly the same bug as
b8c31ac06d ("lima: fix glCopyTexSubImage2D").

Fixes:

    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb
    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgba
    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgb
    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgba

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 062ca49ca7 asahi: Add agx_map_texture_{cpu,gpu} helpers
Streamline access to particular layer/levels. These patterns show up
across the driver and are easy to screw up, so add a helper.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig a8bf729f8a asahi: Support 2D array and 3D textures
As far as I can tell, these *must* be tiled. Other than that, the
implementation is completely routine. Passes

dEQP-GLES3.functional.texture.format.unsized.*2d_array*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 204e2ffe1b asahi: Track mipmap state explicitly
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig e714fae263 asahi: Pass correct tile shift to tiling routines
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 5f10ffd6e2 asahi: Handle page alignment of miptrees
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 2c490cd4e3 asahi: Align linear texture's strides to 64 bytes
Required to pack the stride, and should improve cache performance.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 5d957011ff asahi: Align allocations to effective tile size
May be smaller than 64x64.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 25f48996a6 asahi: Rename bpp to blocksize
Will matter for block compressed formats.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 856f64de24 asahi: Allow tiling of all bpps
Use the usual macro trick via Panfrost. Fixes textures with formats with
non-32-bit bpp, including:

dEQP-GLES2.functional.texture.specification.basic_teximage2d.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 2028873ef6 asahi: Dynamically configure tile size
We need to shrink the tile size when using small images (including
due to mipmapping) or when using large block sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig d103d64df6 asahi: Add some notes to XML about mipmapping
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig aea6d7f17f asahi: Handle tiling of 2D arrays and 3D
Nothing special required, just need to respect the Z coordinate.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 06b2d97666 asahi: Add 2D Array and 3D texture dimensions
Add to XML and translate in the driver.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 266382d252 asahi: Respect mip level when rendering
Use hardware mip level field.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 1a3e21a4de asahi: Identify Level field of render target descriptor
Hardware support for rendering into nonzero mip levels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 65368d2f9a asahi: Don't redefine MIN2/MAX2
The tiling function was written before the Mesa driver...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 570004175f asahi: Streamline modifier selection
We can only use linear for 2D images, not even 2D arrays. Even for 2D
images, we only want to use linear if:

* We are required to use linear due to window system requirements.
* The texture is streaming.

Otherwise, we want to use tiled textures. (Or better, compressed, but we
don't support that yet.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig 2d6233d04f nir: Check all sizes in nir_alu_instr_is_comparison
nir_alu_instr_is_comparison needs to consider all comparison opcodes regardless
of size. Otherwise, they will be missed by nir_opt_move/sink.

Without this change, lowering booleans to integers regresses register
pressure (and spills/fills) significantly in certain shaders on Panfrost,
like android/com.miHoYo.GenshinImpact/1420.shader_test.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15073>
2022-02-18 19:22:01 +00:00
Alyssa Rosenzweig 8f4b3c749e pan/bi: Test avoiding FADD.v2f16 hazards in scheduler
There are many of them, and integration testing of the scheduler won't hit every
case. Add targeted unit tests for the various scheduling hazards of this funny
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>
2022-02-18 16:15:04 +00:00
Alyssa Rosenzweig 9d95561c93 pan/bi: Test avoiding *FADD.v2f16 hazard in optimizer
This hazard exists but is obscure enough to be missed on our existing test
coverage (e.g the conformance tests). Add piles of unit tests for it.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>
2022-02-18 16:15:04 +00:00
Alyssa Rosenzweig 24d2bdb1e0 pan/bi: Avoid *FADD.v2f16 hazard in scheduler
Obscure encoding restriction. Fixes crash (assertion fail when instruction
packing) in asphalt9/2659.shader_test on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>
2022-02-18 16:15:04 +00:00
Alyssa Rosenzweig 8e0eb592d5 pan/bi: Avoid *FADD.v2f16 hazard in optimizer
This is a very obscure encoding restriction in the Bifrost ISA. Unknown if any
real apps or tests hit this, but we still need to get it right sadly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>
2022-02-18 16:15:04 +00:00
Alyssa Rosenzweig c2178d09d0 pan/va: Identify LEA_TEX_IMM table
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>
2022-02-18 15:51:46 +00:00
Alyssa Rosenzweig 839f15259a pan/va: Fix conservative branch handling
Mixed up lanes and conservative branch combine. Fix that.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>
2022-02-18 15:51:46 +00:00
Alyssa Rosenzweig 81a9c857c8 pan/va: Make subgroup 4-bits
Future proofing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>
2022-02-18 15:51:46 +00:00
Alyssa Rosenzweig 9e851e75de pan/va: Fix some units
Remove the todos.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>
2022-02-18 15:51:46 +00:00
Alyssa Rosenzweig 47733ad1e1 pan/va: Parse units from the XML
We need this information for cycle counting in Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>
2022-02-18 15:51:46 +00:00