Alyssa Rosenzweig
9de34e16e0
pan/bi: Track M values of disassembled constants
...
We'll want to route these values from the clause itself to the source
dump in order to disassemble modified embedded constants.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793 >
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig
43c6623c9e
pan/bi: Inline dump_instr
...
Tuple dumping is trivial now that we autogenerate most of it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793 >
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig
5ff3feab88
pan/bi: Annotate disassemble with format names
...
It's hard enough to keep this all straight as it is.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793 >
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig
ab5cc3e717
pan/bi: Annotate stop bit (canonically "Z-bit")
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793 >
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig
42ec4aa478
pan/bi: Use canonical syntax for special constants
...
Adds some missing constants relevant to compute shaders, etc.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749 >
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig
5a569d09f4
pan/bi: Use canonical syntax for registers/uniforms/imms
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749 >
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig
f8fc21059f
pan/bi: Use new disassembler
...
We still use the clause/register decoding, but we now use the
metaprogrammed instruction decoding for the bulk of the operation.
We add a meson rule to call out to the Python generator script during
the build process.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749 >
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig
deab75250c
pan/bi: Export dump_src
...
Needed in generated disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749 >
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig
05041811ce
pan/bi: Add bi_disasm_dest_* helpers
...
Used to print the actual register/temporary for an instruction
destination given the port arrangement.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749 >
2020-09-16 20:05:34 +00:00
Eric Anholt
4c24c8239a
panfrost: Fix remaining release-build warnings.
...
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6462 >
2020-08-28 22:45:08 +00:00
Alyssa Rosenzweig
14bb72c68b
pan/bi: Separate disasm/compiler targets
...
Likewise.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6196 >
2020-08-06 23:54:24 +00:00
Chris Forbes
1882b1e5a7
bifrost: Add support for nir_op_iabs
...
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6098 >
2020-07-28 15:40:00 +00:00
Timothy Arceri
f35283d32e
panfrost: add some missing fallthrough comments
...
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766 >
2020-07-08 03:04:03 +00:00
Alyssa Rosenzweig
bc7397f376
pan/bi: Disassemble gl_PointCoord reads.
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5290 >
2020-06-03 22:58:46 +00:00
Alyssa Rosenzweig
4096be05af
pan/bi: Add MUL.i32 to disasm
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260 >
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
ec8665615f
pan/bi: Disassemble pos=0xe
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260 >
2020-05-29 20:34:55 +00:00
Vinson Lee
df2c68ee4f
pan/bi: Initialize struct fma_op_info member extended.
...
Fix warning reported by Coverity Scan.
Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value info. Field info.extended is
uninitialized.
Fixes: 8c79c710d4
("pan/bi: Identify extended FMA opcodes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5224 >
2020-05-27 15:41:21 -07:00
Alyssa Rosenzweig
6650fa22c7
pan/bi: Add f16 TEXC.vtx op
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232 >
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
fd0324a1ce
pan/bi: Document compute_lod bit for compact tex
...
At least I assume this works this way.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232 >
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
d31bc0e21c
pan/bi: Also add compact vertex texturing
...
This implies lod=0.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232 >
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
f514bdd106
pan/bi: Add TEX.vtx opcode for vertex texturing
...
Always has an LOD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232 >
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
2925e88996
pan/bi: Add SUB.v2i16/SUB.v4i8 opcodes to disasm
...
Like their ADD counterparts. Only on ADD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
20cb039457
pan/bi: Structify DISCARD
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
5c03340fd1
pan/bi: Fix DISCARD ops in disasm
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
814f2f1d33
pan/bi: Add CSEL.8 opcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
e23d191245
pan/bi: Add FCMP.GL.v2f16 on ADD opcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
b4f2d3a51c
pan/bi: Add 64-bit int compares
...
Likewise.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
52cc7165c6
pan/bi: Add some 8-bit compares
...
Not all but enough to see the pattern.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
2f286eed2a
pan/bi: Add CSEL.64 opcode
...
Chain twice for full 64-bit CSEL.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
100edfe26d
pan/bi: Add bool->float opcodes
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
1622478fbd
pan/bi: Fix ADD.v4i8 opcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766 >
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
76d1bb03d5
pan/bi: Include TEX_COMPACT f16 opcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671 >
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
cf7b952308
pan/bi: Disassemble f16 dual tex
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671 >
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
a2c735350f
pan/bi: Document when dual-tex is triggered
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671 >
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
6fe41a12e3
pan/bi: Print tex_compact coordinates
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671 >
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
d30df466b5
pan/bi: Dump extra bits for disasm
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
db5c1ae8fd
pan/bi: Add fexp2_fast packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
40befaa965
pan/bi: Add FLOG2_U op to disassembler
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
62c8c3445e
pan/bi: Add op for ADD_FREXPM
...
Used in log2. Needs a new class as well due to scheduling silliness.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
86c0ea383d
pan/bi: Add disasm for ADD.i8
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
c12a208d78
pan/bi: Add v2f16 versions of rounding ops
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382 >
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
902f99a45d
pan/bi: Expand out FMA conversion opcodes
...
There are a *lot* of them, with lots of symmetry we can exploit to
simplify the packing logic (but not entirely). Let's add the
corresponding header structs/defines, although we don't actually poke
the disassembler at this stage.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382 >
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
d797822d31
pan/bi: Pretty-print clause types in disassembler
...
Also note that type=1 is for load_vary.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
aef0f00cbc
pan/bi: Move bi_interp_mode_name to bi_print
...
Instead of open-coding it in the middle of the disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5f7a3ba872
pan/bi: Move some print routines out of the disasm
...
These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
6a7987aba1
pan/bi: Pull out bifrost_load_var
...
We're not using this structure yet but we want everything in the ISA
ready for us.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
bbf41ffb00
pan/bi: Factor out enum bifrost_minmax_mode
...
We'll want it from the compiler-side.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5d3a4e3113
pan/bi: Gut old compiler
...
We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
d0c66869c1
pan/bi: Move some definitions from disasm to bifrost.h
...
These are generally useful outside the disassmbler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
346262ceb6
pan/bi: Structify FMA_FADD
...
Just to make it easier to work with.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00